Commit 91dca0f0 authored by Nishanth Menon's avatar Nishanth Menon Committed by Santosh Shilimkar

ARM: dts: keystone: Update SoC specific compatible flags

Update the compatible flags to allow specific SoC identification.
Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Signed-off-by: default avatarSantosh Shilimkar <ssantosh@kernel.org>
parent 01cf228b
......@@ -13,7 +13,7 @@
#include "k2e.dtsi"
/ {
compatible = "ti,k2e-evm","ti,keystone";
compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone";
model = "Texas Instruments Keystone 2 Edison EVM";
soc {
......
......@@ -9,6 +9,9 @@
*/
/ {
compatible = "ti,k2e", "ti,keystone";
model = "Texas Instruments Keystone 2 Edison SoC";
cpus {
#address-cells = <1>;
#size-cells = <0>;
......
......@@ -13,7 +13,7 @@
#include "k2hk.dtsi"
/ {
compatible = "ti,k2hk-evm","ti,keystone";
compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone";
model = "Texas Instruments Keystone 2 Kepler/Hawking EVM";
soc {
......
......@@ -9,6 +9,9 @@
*/
/ {
compatible = "ti,k2hk", "ti,keystone";
model = "Texas Instruments Keystone 2 Kepler/Hawking SoC";
cpus {
#address-cells = <1>;
#size-cells = <0>;
......
......@@ -13,7 +13,7 @@
#include "k2l.dtsi"
/ {
compatible = "ti,k2l-evm","ti,keystone";
compatible = "ti,k2l-evm", "ti,k2l", "ti,keystone";
model = "Texas Instruments Keystone 2 Lamarr EVM";
soc {
......
......@@ -9,6 +9,9 @@
*/
/ {
compatible = "ti,k2l", "ti,keystone";
model = "Texas Instruments Keystone 2 Lamarr SoC";
cpus {
#address-cells = <1>;
#size-cells = <0>;
......
......@@ -12,6 +12,7 @@
#include "skeleton.dtsi"
/ {
compatible = "ti,keystone";
model = "Texas Instruments Keystone 2 SoC";
#address-cells = <2>;
#size-cells = <2>;
......
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