Blackfin arch: do not allow L2 to be cached on BF561 SMP

Signed-off-by: Bryan Wu <cooloney@kernel.org>

Blackfin arch: do not allow L2 to be cached on BF561 SMP
Signed-off-by: Bryan Wu <cooloney@kernel.org>
94106e0f · Mike Frysinger · Bryan Wu · 1ea99255 · 94106e0f
Commit 94106e0f authored Jan 07, 2009 by Mike Frysinger Committed by Bryan Wu Jan 07, 2009
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arch/blackfin/Kconfig arch/blackfin/Kconfig +1 -1

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--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -866,7 +866,7 @@ endchoice

 config BFIN_L2_CACHEABLE
 	bool "Cache L2 SRAM"
-	depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || BF561)
+	depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || (BF561 && !SMP))
 	default n
 	help
 	  Select to make L2 SRAM cacheable in L1 data and instruction cache.