Commit 942f0c6e authored by David S. Miller's avatar David S. Miller

Merge branch 'ipa-update-config-data'

Alex Elder says:

====================
net: ipa: update configuration data

Each IPA version has a "data" file defining how various things are
configured.  This series gathers a few updates to this information:
  - The first patch makes all configuration data constant
  - The second fixes an incorrect (but seemingly harmless) value
  - The third simplifies things a bit by using implicit zero
    initialization for memory regions that are empty
  - The fourth adds definitions for memory regions that exist but
    are not yet used
  - The fifth use configuration data rather than conditional code to
    set some bus parameters
====================
parents 96a2be51 37537fa8
......@@ -9,6 +9,14 @@
#include "ipa_endpoint.h"
#include "ipa_mem.h"
/* QSB configuration for the SC7180 SoC. */
static const struct ipa_qsb_data ipa_qsb_data[] = {
[IPA_QSB_MASTER_DDR] = {
.max_writes = 8,
.max_reads = 12,
},
};
/* Endpoint configuration for the SC7180 SoC. */
static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
[IPA_ENDPOINT_AP_COMMAND_TX] = {
......@@ -206,7 +214,7 @@ static const struct ipa_mem ipa_mem_local_data[] = {
[IPA_MEM_UC_INFO] = {
.offset = 0x0080,
.size = 0x0200,
.canary_count = 2,
.canary_count = 0,
},
[IPA_MEM_V4_FILTER_HASHED] = {
.offset = 0x0288,
......@@ -253,11 +261,6 @@ static const struct ipa_mem ipa_mem_local_data[] = {
.size = 0x0140,
.canary_count = 2,
},
[IPA_MEM_AP_HEADER] = {
.offset = 0x05e8,
.size = 0x0000,
.canary_count = 0,
},
[IPA_MEM_MODEM_PROC_CTX] = {
.offset = 0x05f0,
.size = 0x0200,
......@@ -273,7 +276,7 @@ static const struct ipa_mem ipa_mem_local_data[] = {
.size = 0x0050,
.canary_count = 2,
},
[IPA_MEM_STATS_QUOTA] = {
[IPA_MEM_STATS_QUOTA_MODEM] = {
.offset = 0x0a50,
.size = 0x0060,
.canary_count = 2,
......@@ -283,11 +286,6 @@ static const struct ipa_mem ipa_mem_local_data[] = {
.size = 0x0140,
.canary_count = 0,
},
[IPA_MEM_STATS_DROP] = {
.offset = 0x0bf0,
.size = 0,
.canary_count = 0,
},
[IPA_MEM_MODEM] = {
.offset = 0x0bf0,
.size = 0x140c,
......@@ -300,7 +298,7 @@ static const struct ipa_mem ipa_mem_local_data[] = {
},
};
static struct ipa_mem_data ipa_mem_data = {
static const struct ipa_mem_data ipa_mem_data = {
.local_count = ARRAY_SIZE(ipa_mem_local_data),
.local = ipa_mem_local_data,
.imem_addr = 0x146a8000,
......@@ -310,7 +308,7 @@ static struct ipa_mem_data ipa_mem_data = {
};
/* Interconnect bandwidths are in 1000 byte/second units */
static struct ipa_interconnect_data ipa_interconnect_data[] = {
static const struct ipa_interconnect_data ipa_interconnect_data[] = {
{
.name = "memory",
.peak_bandwidth = 465000, /* 465 MBps */
......@@ -329,7 +327,7 @@ static struct ipa_interconnect_data ipa_interconnect_data[] = {
},
};
static struct ipa_clock_data ipa_clock_data = {
static const struct ipa_clock_data ipa_clock_data = {
.core_clock_rate = 100 * 1000 * 1000, /* Hz */
.interconnect_count = ARRAY_SIZE(ipa_interconnect_data),
.interconnect_data = ipa_interconnect_data,
......@@ -338,6 +336,8 @@ static struct ipa_clock_data ipa_clock_data = {
/* Configuration data for the SC7180 SoC. */
const struct ipa_data ipa_data_sc7180 = {
.version = IPA_VERSION_4_2,
.qsb_count = ARRAY_SIZE(ipa_qsb_data),
.qsb_data = ipa_qsb_data,
.endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data),
.endpoint_data = ipa_gsi_endpoint_data,
.resource_data = &ipa_resource_data,
......
......@@ -11,6 +11,18 @@
#include "ipa_endpoint.h"
#include "ipa_mem.h"
/* QSB configuration for the SDM845 SoC. */
static const struct ipa_qsb_data ipa_qsb_data[] = {
[IPA_QSB_MASTER_DDR] = {
.max_writes = 8,
.max_reads = 8,
},
[IPA_QSB_MASTER_PCIE] = {
.max_writes = 4,
.max_reads = 12,
},
};
/* Endpoint configuration for the SDM845 SoC. */
static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
[IPA_ENDPOINT_AP_COMMAND_TX] = {
......@@ -293,11 +305,6 @@ static const struct ipa_mem ipa_mem_local_data[] = {
.size = 0x0140,
.canary_count = 2,
},
[IPA_MEM_AP_HEADER] = {
.offset = 0x07c8,
.size = 0x0000,
.canary_count = 0,
},
[IPA_MEM_MODEM_PROC_CTX] = {
.offset = 0x07d0,
.size = 0x0200,
......@@ -320,7 +327,7 @@ static const struct ipa_mem ipa_mem_local_data[] = {
},
};
static struct ipa_mem_data ipa_mem_data = {
static const struct ipa_mem_data ipa_mem_data = {
.local_count = ARRAY_SIZE(ipa_mem_local_data),
.local = ipa_mem_local_data,
.imem_addr = 0x146bd000,
......@@ -330,7 +337,7 @@ static struct ipa_mem_data ipa_mem_data = {
};
/* Interconnect bandwidths are in 1000 byte/second units */
static struct ipa_interconnect_data ipa_interconnect_data[] = {
static const struct ipa_interconnect_data ipa_interconnect_data[] = {
{
.name = "memory",
.peak_bandwidth = 600000, /* 600 MBps */
......@@ -349,7 +356,7 @@ static struct ipa_interconnect_data ipa_interconnect_data[] = {
},
};
static struct ipa_clock_data ipa_clock_data = {
static const struct ipa_clock_data ipa_clock_data = {
.core_clock_rate = 75 * 1000 * 1000, /* Hz */
.interconnect_count = ARRAY_SIZE(ipa_interconnect_data),
.interconnect_data = ipa_interconnect_data,
......@@ -358,6 +365,8 @@ static struct ipa_clock_data ipa_clock_data = {
/* Configuration data for the SDM845 SoC. */
const struct ipa_data ipa_data_sdm845 = {
.version = IPA_VERSION_3_5_1,
.qsb_count = ARRAY_SIZE(ipa_qsb_data),
.qsb_data = ipa_qsb_data,
.endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data),
.endpoint_data = ipa_gsi_endpoint_data,
.resource_data = &ipa_resource_data,
......
......@@ -49,6 +49,22 @@
#define IPA_RESOURCE_GROUP_SRC_MAX 5
#define IPA_RESOURCE_GROUP_DST_MAX 5
/** enum ipa_qsb_master_id - array index for IPA QSB configuration data */
enum ipa_qsb_master_id {
IPA_QSB_MASTER_DDR,
IPA_QSB_MASTER_PCIE,
};
/**
* struct ipa_qsb_data - Qualcomm System Bus configuration data
* @max_writes: Maximum outstanding write requests for this master
* @max_reads: Maximum outstanding read requests for this master
*/
struct ipa_qsb_data {
u8 max_writes;
u8 max_reads;
};
/**
* struct gsi_channel_data - GSI channel configuration data
* @tre_count: number of TREs in the channel ring
......@@ -285,14 +301,18 @@ struct ipa_clock_data {
/**
* struct ipa_data - combined IPA/GSI configuration data
* @version: IPA hardware version
* @endpoint_count: number of entries in endpoint_data array
* @qsb_count: number of entries in the qsb_data array
* @qsb_data: Qualcomm System Bus configuration data
* @endpoint_count: number of entries in the endpoint_data array
* @endpoint_data: IPA endpoint/GSI channel data
* @resource_data: IPA resource configuration data
* @mem_count: number of entries in mem_data array
* @mem_count: number of entries in the mem_data array
* @mem_data: IPA-local shared memory region data
*/
struct ipa_data {
enum ipa_version version;
u32 qsb_count; /* # entries in qsb_data[] */
const struct ipa_qsb_data *qsb_data;
u32 endpoint_count; /* # entries in endpoint_data[] */
const struct ipa_gsi_endpoint_data *endpoint_data;
const struct ipa_resource_data *resource_data;
......
......@@ -28,6 +28,7 @@ struct ipa_mem_data;
* The set of memory regions is defined in configuration data. They are
* subject to these constraints:
* - a zero offset and zero size represents and undefined region
* - a region's size does not include space for its "canary" values
* - a region's offset is defined to be *past* all "canary" values
* - offset must be large enough to account for all canaries
* - a region's size may be zero, but may still have canaries
......@@ -56,9 +57,16 @@ enum ipa_mem_id {
IPA_MEM_AP_HEADER, /* 0 canaries */
IPA_MEM_MODEM_PROC_CTX, /* 2 canaries */
IPA_MEM_AP_PROC_CTX, /* 0 canaries */
IPA_MEM_NAT_TABLE, /* 4 canaries (IPA v4.5 and above) */
IPA_MEM_PDN_CONFIG, /* 2 canaries (IPA v4.0 and above) */
IPA_MEM_STATS_QUOTA, /* 2 canaries (IPA v4.0 and above) */
IPA_MEM_STATS_QUOTA_MODEM, /* 2 canaries (IPA v4.0 and above) */
IPA_MEM_STATS_QUOTA_AP, /* 0 canaries (IPA v4.0 and above) */
IPA_MEM_STATS_TETHERING, /* 0 canaries (IPA v4.0 and above) */
IPA_MEM_STATS_V4_FILTER, /* 0 canaries (IPA v4.0-v4.2) */
IPA_MEM_STATS_V6_FILTER, /* 0 canaries (IPA v4.0-v4.2) */
IPA_MEM_STATS_V4_ROUTE, /* 0 canaries (IPA v4.0-v4.2) */
IPA_MEM_STATS_V6_ROUTE, /* 0 canaries (IPA v4.0-v4.2) */
IPA_MEM_STATS_FILTER_ROUTE, /* 0 canaries (IPA v4.5 and above) */
IPA_MEM_STATS_DROP, /* 0 canaries (IPA v4.0 and above) */
IPA_MEM_MODEM, /* 0 canaries */
IPA_MEM_UC_EVENT_RING, /* 1 canary */
......
......@@ -378,7 +378,7 @@ init_modem_driver_req(struct ipa_qmi *ipa_qmi)
/* None of the stats fields are valid (IPA v4.0 and above) */
if (ipa->version != IPA_VERSION_3_5_1) {
mem = &ipa->mem[IPA_MEM_STATS_QUOTA];
mem = &ipa->mem[IPA_MEM_STATS_QUOTA_MODEM];
if (mem->size) {
req.hw_stats_quota_base_addr_valid = 1;
req.hw_stats_quota_base_addr =
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment