Commit 95d909e8 authored by Fabio Estevam's avatar Fabio Estevam Committed by Ben Hutchings

ASoC: sglt5000: Fix the default value of CHIP_SSS_CTRL

commit 016fcab8 upstream.

According to the sgtl5000 reference manual, the default value of CHIP_SSS_CTRL
is 0x10.
Reported-by: default avatarOskar Schirmer <oskar@scara.com>
Signed-off-by: default avatarFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
[bwh: Backported to 3.2: format of register defaults array is different]
Signed-off-by: default avatarBen Hutchings <ben@decadent.org.uk>
parent 9371cadb
...@@ -38,7 +38,7 @@ ...@@ -38,7 +38,7 @@
static const u16 sgtl5000_regs[SGTL5000_MAX_REG_OFFSET] = { static const u16 sgtl5000_regs[SGTL5000_MAX_REG_OFFSET] = {
[SGTL5000_CHIP_CLK_CTRL] = 0x0008, [SGTL5000_CHIP_CLK_CTRL] = 0x0008,
[SGTL5000_CHIP_I2S_CTRL] = 0x0010, [SGTL5000_CHIP_I2S_CTRL] = 0x0010,
[SGTL5000_CHIP_SSS_CTRL] = 0x0008, [SGTL5000_CHIP_SSS_CTRL] = 0x0010,
[SGTL5000_CHIP_DAC_VOL] = 0x3c3c, [SGTL5000_CHIP_DAC_VOL] = 0x3c3c,
[SGTL5000_CHIP_PAD_STRENGTH] = 0x015f, [SGTL5000_CHIP_PAD_STRENGTH] = 0x015f,
[SGTL5000_CHIP_ANA_HP_CTRL] = 0x1818, [SGTL5000_CHIP_ANA_HP_CTRL] = 0x1818,
......
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