Commit 95e838c9 authored by Federico Vaga's avatar Federico Vaga Committed by Greg Kroah-Hartman

ipoctal: clear break interrupt as soon as it occurs

In some condition we receive the break interrupt but nothing is putted
in the Rx FIFO and the correspondend bit in the status register is not
set. Thus, no-one clear the interrupt and the handler will be called
forever.

This patch clear the break interrupt as soon as it occurs. Then, if the
break character '\0' is putted in the fifo we will manage it.

We can also unmask the Break interrupt but its bit in ISR is still set
on break. So I think is better to keep the registers clean.
Signed-off-by: default avatarFederico Vaga <federico.vaga@cern.ch>
Acked-by: default avatarSamuel Iglesias Gonsalvez <siglesias@igalia.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 1451f414
......@@ -175,7 +175,6 @@ static void ipoctal_irq_rx(struct ipoctal_channel *channel, u8 sr)
flag = TTY_FRAME;
}
if (sr & SR_RECEIVED_BREAK) {
iowrite8(CR_CMD_RESET_BREAK_CHANGE, &channel->regs->w.cr);
channel->stats.rcv_break++;
flag = TTY_BREAK;
}
......@@ -220,6 +219,9 @@ static void ipoctal_irq_channel(struct ipoctal_channel *channel)
isr = ioread8(&channel->block_regs->r.isr);
sr = ioread8(&channel->regs->r.sr);
if (isr & (IMR_DELTA_BREAK_A | IMR_DELTA_BREAK_B))
iowrite8(CR_CMD_RESET_BREAK_CHANGE, &channel->regs->w.cr);
if ((sr & SR_TX_EMPTY) && (channel->nb_bytes == 0)) {
iowrite8(CR_DISABLE_TX, &channel->regs->w.cr);
/* In case of RS-485, change from TX to RX when finishing TX.
......
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