Commit 96a6af54 authored by Matthias Brugger's avatar Matthias Brugger Committed by Herbert Xu

hwrng: iproc-rng200 - Fix disable of the block.

When trying to disable the block we bitwise or the control
register with value zero. This is confusing as using bitwise or with
value zero doesn't have any effect at all. Drop this as we already set
the enable bit to zero by appling inverted RNG_RBGEN_MASK.
Signed-off-by: default avatarMatthias Brugger <mbrugger@suse.com>
Acked-by: default avatarScott Branden <scott.branden@broadcom.com>
Acked-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 5318d3db
......@@ -28,7 +28,6 @@
#define RNG_CTRL_OFFSET 0x00
#define RNG_CTRL_RNG_RBGEN_MASK 0x00001FFF
#define RNG_CTRL_RNG_RBGEN_ENABLE 0x00000001
#define RNG_CTRL_RNG_RBGEN_DISABLE 0x00000000
#define RNG_SOFT_RESET_OFFSET 0x04
#define RNG_SOFT_RESET 0x00000001
......@@ -61,7 +60,6 @@ static void iproc_rng200_restart(void __iomem *rng_base)
/* Disable RBG */
val = ioread32(rng_base + RNG_CTRL_OFFSET);
val &= ~RNG_CTRL_RNG_RBGEN_MASK;
val |= RNG_CTRL_RNG_RBGEN_DISABLE;
iowrite32(val, rng_base + RNG_CTRL_OFFSET);
/* Clear all interrupt status */
......@@ -174,7 +172,6 @@ static void iproc_rng200_cleanup(struct hwrng *rng)
/* Disable RNG hardware */
val = ioread32(priv->base + RNG_CTRL_OFFSET);
val &= ~RNG_CTRL_RNG_RBGEN_MASK;
val |= RNG_CTRL_RNG_RBGEN_DISABLE;
iowrite32(val, priv->base + RNG_CTRL_OFFSET);
}
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment