Merge tetrachloride.(none):/mnt/raid/src/kernel/2.5/bk-linus

into tetrachloride.(none):/mnt/raid/src/kernel/2.5/agpgart

drivers/char/agp/Kconfig

@@ -141,7 +141,7 @@ config AGP_ALPHA_CORE
 
 # Put AGP 3.0 entries below here.
 
-config AGP_I7505
+config AGP_I7x05
 	tristate "Intel 7205/7505 support (AGP 3.0)"
 	depends on AGP3
 	help

drivers/char/agp/Makefile

@@ -19,5 +19,4 @@ obj-$(CONFIG_AGP_HP_ZX1)	+= hp-agp.o
 obj-$(CONFIG_AGP_AMD_8151)	+= amd-k8-agp.o
 obj-$(CONFIG_AGP_ALPHA_CORE)	+= alpha-agp.o
 
-obj-$(CONFIG_AGP_I7x05)		+= i7x05-agp.o
 

drivers/char/agp/agp.h

 /*
  * AGPGART
- * Copyright (C) 2002 Dave Jones
+ * Copyright (C) 2002-2003 Dave Jones
  * Copyright (C) 1999 Jeff Hartmann
  * Copyright (C) 1999 Precision Insight, Inc.
  * Copyright (C) 1999 Xi Graphics, Inc.
@@ -46,7 +46,7 @@ static void __attribute__((unused)) global_cache_flush(void)
 		panic(PFX "timed out waiting for the other CPUs!\n");
 }
 #else
-static inline void global_cache_flush(void)
+static void global_cache_flush(void)
 {
 	flush_agp_cache();
 }
@@ -281,6 +281,7 @@ struct agp_bridge_data {
 #define INTEL_I7505_ATTBASE	0x78
 #define INTEL_I7505_ERRSTS	0x42
 #define INTEL_I7505_AGPCTRL	0x70
+#define INTEL_I7505_MCHCFG	0x50
 
 /* VIA register */
 #define VIA_APBASE	0x10
@@ -380,8 +381,7 @@ struct agp_driver {
 
 
 /* Generic routines. */
-void agp_generic_agp_enable(u32 mode);
-void agp_generic_agp_3_0_enable(u32 mode);
+void agp_generic_enable(u32 mode);
 int agp_generic_create_gatt_table(void);
 int agp_generic_free_gatt_table(void);
 agp_memory *agp_create_memory(int scratch_pages);
@@ -399,5 +399,6 @@ int agp_register_driver (struct agp_driver *drv);
 int agp_unregister_driver(struct agp_driver *drv);
 u32 agp_collect_device_status(u32 mode, u32 command);
 void agp_device_command(u32 command, int agp_v3);
+int agp_3_0_node_enable(u32 mode, u32 minor);
 
 #endif				/* _AGP_BACKEND_PRIV_H */

drivers/char/agp/ali-agp.c

@@ -208,7 +208,7 @@ static int __init ali_generic_setup (struct pci_dev *pdev)
 	agp_bridge->cleanup = ali_cleanup;
 	agp_bridge->tlb_flush = ali_tlbflush;
 	agp_bridge->mask_memory = ali_mask_memory;
-	agp_bridge->agp_enable = agp_generic_agp_enable;
+	agp_bridge->agp_enable = agp_generic_enable;
 	agp_bridge->cache_flush = ali_cache_flush;
 	agp_bridge->create_gatt_table = agp_generic_create_gatt_table;
 	agp_bridge->free_gatt_table = agp_generic_free_gatt_table;

drivers/char/agp/amd-k7-agp.c

@@ -368,7 +368,7 @@ static int __init amd_irongate_setup (struct pci_dev *pdev)
 	agp_bridge->cleanup = amd_irongate_cleanup;
 	agp_bridge->tlb_flush = amd_irongate_tlbflush;
 	agp_bridge->mask_memory = amd_irongate_mask_memory;
-	agp_bridge->agp_enable = agp_generic_agp_enable;
+	agp_bridge->agp_enable = agp_generic_enable;
 	agp_bridge->cache_flush = global_cache_flush;
 	agp_bridge->create_gatt_table = amd_create_gatt_table;
 	agp_bridge->free_gatt_table = amd_free_gatt_table;

drivers/char/agp/amd-k8-agp.c

 /* 
- * Copyright 2001,2002 SuSE Labs
+ * Copyright 2001-2003 SuSE Labs
  * Distributed under the GNU public license, v2.
  * 
  * This is a GART driver for the AMD K8 northbridge and the AMD 8151 
@@ -224,7 +224,7 @@ static unsigned long amd_8151_mask_memory(unsigned long addr, int type)
 
 static struct gatt_mask amd_8151_masks[] =
 {
-	{0x00000001, 0}
+	{.mask = 0x00000001, .type = 0}
 };
 
 
@@ -265,7 +265,7 @@ static void agp_x86_64_agp_enable(u32 mode)
 	/* If not enough, go to AGP v2 setup */
 	if (v3_devs<2) {
 		printk (KERN_INFO "AGP: Only %d devices found, not enough, trying AGPv2\n", v3_devs);
-		return agp_generic_agp_enable(mode);
+		return agp_generic_enable(mode);
 	} else {
 		printk (KERN_INFO "AGP: Enough AGPv3 devices found, setting up...\n");
 	}

drivers/char/agp/backend.c

 /*
  * AGPGART driver backend routines.
- * Copyright (C) 2002 Dave Jones.
+ * Copyright (C) 2002-2003 Dave Jones.
  * Copyright (C) 1999 Jeff Hartmann.
  * Copyright (C) 1999 Precision Insight, Inc.
  * Copyright (C) 1999 Xi Graphics, Inc.

drivers/char/agp/frontend.c

 /*
  * AGPGART driver frontend
- * Copyright (C) 2002 Dave Jones
+ * Copyright (C) 2002-2003 Dave Jones
  * Copyright (C) 1999 Jeff Hartmann
  * Copyright (C) 1999 Precision Insight, Inc.
  * Copyright (C) 1999 Xi Graphics, Inc.

drivers/char/agp/generic-3.0.c

@@ -319,10 +319,10 @@ static int agp_3_0_nonisochronous_node_enable(struct agp_3_0_dev *dev_list, unsi
  * Fully configure and enable an AGP 3.0 host bridge and all the devices
  * lying behind it.
  */
-static int agp_3_0_node_enable(u32 mode, u32 minor)
+int agp_3_0_node_enable(u32 mode, u32 minor)
 {
 	struct pci_dev *td = agp_bridge->dev, *dev;
-	u8 bus_num, mcapndx;
+	u8 mcapndx;
 	u32 isoch, arqsz, cal_cycle, tmp, rate;
 	u32 tstatus, tcmd, mcmd, mstatus, ncapid;
 	u32 mmajor, mminor;
@@ -343,23 +343,30 @@ static int agp_3_0_node_enable(u32 mode, u32 minor)
 	head = &dev_list->list;
 	INIT_LIST_HEAD(head);
 
-	/* 
-	 * Find all the devices on this bridge's secondary bus and add them
-	 * to dev_list. 
-	 */
-	pci_read_config_byte(td, PCI_SECONDARY_BUS, &bus_num);
-	pci_for_each_dev(dev) {
-		if(dev->bus->number == bus_num) {
-			if((cur = kmalloc(sizeof(*cur), GFP_KERNEL)) == NULL) {
-				ret = -ENOMEM;
-				goto free_and_exit;
-			}
-			
-			cur->dev = dev;
-
-			pos = &cur->list;
-			list_add(pos, head);
-			ndevs++;
+	/* Find all AGP devices, and add them to dev_list. */
+	pci_for_each_dev(dev) { 
+		switch ((dev->class >>8) & 0xff00) {
+			case 0x0001:    /* Unclassified device */
+			case 0x0300:    /* Display controller */
+			case 0x0400:    /* Multimedia controller */
+			case 0x0600:    /* Bridge */
+				mcapndx = pci_find_capability(dev, PCI_CAP_ID_AGP);
+				if (mcapndx == 0)
+					continue;
+
+				if((cur = kmalloc(sizeof(*cur), GFP_KERNEL)) == NULL) {
+					ret = -ENOMEM;
+					goto free_and_exit;
+				}
+				cur->dev = dev;
+
+				pos = &cur->list;
+				list_add(pos, head);
+				ndevs++;
+				continue;
+
+			default:
+				continue;
 		}
 	}
 
@@ -518,33 +525,5 @@ static int agp_3_0_node_enable(u32 mode, u32 minor)
 	return ret;
 }
 
-/* 
- * Entry point to AGP 3.0 host bridge init.  Check to see if we 
- * have an AGP 3.0 device operating in 3.0 mode.  Call 
- * agp_3_0_node_enable or agp_generic_agp_enable if we don't 
- * (AGP 3.0 devices are required to operate as AGP 2.0 devices 
- * when not using 3.0 electricals.
- */
-void agp_generic_agp_3_0_enable(u32 mode)
-{
-	u32 ncapid, major, minor, agp_3_0;
-
-	pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx, &ncapid);
-
-	major = (ncapid >> 20) & 0xf;
-	minor = (ncapid >> 16) & 0xf;
-
-	printk(KERN_INFO PFX "Found an AGP %d.%d compliant device.\n",major, minor);
-
-	if(major >= 3) {
-		pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx + 0x4, &agp_3_0);
-		/* 
-		 * Check to see if we are operating in 3.0 mode 
-		 */
-		if((agp_3_0 >> 3) & 0x1)
-			agp_3_0_node_enable(mode, minor);
-	}
-}
-
-EXPORT_SYMBOL(agp_generic_agp_3_0_enable);
+EXPORT_SYMBOL_GPL(agp_3_0_node_enable);
 

drivers/char/agp/generic.c

@@ -34,6 +34,7 @@
 #include <linux/miscdevice.h>
 #include <linux/pm.h>
 #include <linux/agp_backend.h>
+#include <linux/vmalloc.h>
 #include "agp.h"
 
 __u32 *agp_gatt_table; 
@@ -392,21 +393,39 @@ void agp_device_command(u32 command, int agp_v3)
 	}
 }
 
-void agp_generic_agp_enable(u32 mode)
+void agp_generic_enable(u32 mode)
 {
-	u32 command;
+	u32 command, ncapid, major, minor;
+
+	pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx, &ncapid);
+	major = (ncapid >> 20) & 0xf;
+	minor = (ncapid >> 16) & 0xf;
+	printk(KERN_INFO PFX "Found an AGP %d.%d compliant device.\n",major, minor);
+
+#ifdef CONFIG_AGP3
+	if(major >= 3) {
+		u32 agp_3_0;
+
+		pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx + 0x4, &agp_3_0);
+		/* Check to see if we are operating in 3.0 mode */
+		if((agp_3_0 >> 3) & 0x1) {
+			agp_3_0_node_enable(mode, minor);
+			return;
+		} else {
+			printk (KERN_INFO PFX "not in AGP 3.0 mode, falling back to 2.x\n");
+		}
+	}
+#endif
 
+	/* AGP v<3 */
 	pci_read_config_dword(agp_bridge->dev,
-			      agp_bridge->capndx + PCI_AGP_STATUS,
-			      &command);
+		      agp_bridge->capndx + PCI_AGP_STATUS, &command);
 
 	command = agp_collect_device_status(mode, command);
 	command |= 0x100;
 
 	pci_write_config_dword(agp_bridge->dev,
-			       agp_bridge->capndx + PCI_AGP_COMMAND,
-			       command);
-
+		       agp_bridge->capndx + PCI_AGP_COMMAND, command);
 	agp_device_command(command, 0);
 }
 
@@ -745,7 +764,7 @@ EXPORT_SYMBOL(agp_generic_alloc_page);
 EXPORT_SYMBOL(agp_generic_destroy_page);
 EXPORT_SYMBOL(agp_generic_suspend);
 EXPORT_SYMBOL(agp_generic_resume);
-EXPORT_SYMBOL(agp_generic_agp_enable);
+EXPORT_SYMBOL(agp_generic_enable);
 EXPORT_SYMBOL(agp_generic_create_gatt_table);
 EXPORT_SYMBOL(agp_generic_free_gatt_table);
 EXPORT_SYMBOL(agp_generic_insert_memory);

drivers/char/agp/hp-agp.c

@@ -339,7 +339,7 @@ static int __init hp_zx1_setup (struct pci_dev *pdev __attribute__((unused)))
 	agp_bridge->cleanup = hp_zx1_cleanup;
 	agp_bridge->tlb_flush = hp_zx1_tlbflush;
 	agp_bridge->mask_memory = hp_zx1_mask_memory;
-	agp_bridge->agp_enable = agp_generic_agp_enable;
+	agp_bridge->agp_enable = agp_generic_enable;
 	agp_bridge->cache_flush = global_cache_flush;
 	agp_bridge->create_gatt_table = hp_zx1_create_gatt_table;
 	agp_bridge->free_gatt_table = hp_zx1_free_gatt_table;
@@ -369,7 +369,7 @@ static int __init agp_find_supported_device(struct pci_dev *dev)
 }
 
 static struct agp_driver hp_agp_driver = {
-	.owner = THIS_MODULE;
+	.owner = THIS_MODULE,
 };
 
 static int __init agp_hp_probe (struct pci_dev *dev, const struct pci_device_id *ent)
@@ -394,7 +394,7 @@ static struct pci_device_id agp_hp_pci_table[] __initdata = {
 	{ }
 };
 
-MODULE_DEVICE_TABLE(pci, agp_pci_table);
+MODULE_DEVICE_TABLE(pci, agp_hp_pci_table);
 
 static struct __initdata pci_driver agp_hp_pci_driver = {
 	.name		= "agpgart-hp",

drivers/char/agp/i460-agp.c

@@ -536,7 +536,7 @@ static int __init intel_i460_setup (struct pci_dev *pdev __attribute__((unused))
 	agp_bridge->cleanup = i460_cleanup;
 	agp_bridge->tlb_flush = i460_tlb_flush;
 	agp_bridge->mask_memory = i460_mask_memory;
-	agp_bridge->agp_enable = agp_generic_agp_enable;
+	agp_bridge->agp_enable = agp_generic_enable;
 	agp_bridge->cache_flush = global_cache_flush;
 	agp_bridge->create_gatt_table = i460_create_gatt_table;
 	agp_bridge->free_gatt_table = i460_free_gatt_table;
@@ -560,7 +560,7 @@ static int __init intel_i460_setup (struct pci_dev *pdev __attribute__((unused))
 }
 
 static struct agp_driver i460_agp_driver = {
-	.owner = THIS_MODULE;
+	.owner = THIS_MODULE,
 };
 
 static int __init agp_intel_i460_probe (struct pci_dev *dev, const struct pci_device_id *ent)

drivers/char/agp/i7x05-agp.c

-#include <linux/module.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-#include <linux/agp_backend.h>
-#include "agp.h"
-
-static int intel_7505_fetch_size(void)
-{
-	int i;
-	u16 tmp;
-	aper_size_info_16 *values;
-
-	/* 
-	 * For AGP 3.0 APSIZE is now 16 bits
-	 */
-	pci_read_config_word (agp_bridge->dev, INTEL_I7505_APSIZE, &tmp);
-	tmp = (tmp & 0xfff);
-	
-	values = A_SIZE_16(agp_bridge->aperture_sizes);
-
-	for (i=0; i < agp_bridge->num_aperture_sizes; i++) {
-		if (tmp == values[i].size_value) {
-			agp_bridge->previous_size = agp_bridge->current_size =
-					(void *)(values + i);
-			agp_bridge->aperture_size_idx = i;
-			return values[i].size;
-		}
-	}
-	return 0;
-}
-
-
-static void intel_7505_tlbflush(agp_memory *mem)
-{
-	u32 temp;
-	pci_read_config_dword(agp_bridge->dev, INTEL_I7505_AGPCTRL, &temp);
-	pci_write_config_dword(agp_bridge->dev, INTEL_I7505_AGPCTRL, temp & ~(1 << 7));
-	pci_read_config_dword(agp_bridge->dev, INTEL_I7505_AGPCTRL, &temp);
-	pci_write_config_dword(agp_bridge->dev, INTEL_I7505_AGPCTRL, temp | (1 << 7));
-}
-
-static void intel_7505_cleanup(void)
-{
-	aper_size_info_16 *previous_size;
-
-	previous_size = A_SIZE_16(agp_bridge->previous_size);
-	pci_write_config_byte(agp_bridge->dev, INTEL_I7505_APSIZE,
-			      previous_size->size_value);
-}
-
-
-static int intel_7505_configure(void)
-{
-	u32 temp;
-	aper_size_info_16 *current_size;
-	
-	current_size = A_SIZE_16(agp_bridge->current_size);
-
-	/* aperture size */
-	pci_write_config_word(agp_bridge->dev, INTEL_I7505_APSIZE,
-			      current_size->size_value);
-
-	/* address to map to */
-	pci_read_config_dword(agp_bridge->dev, INTEL_I7505_NAPBASELO, &temp);
-	agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
-
-	/* attbase */ 
-	pci_write_config_dword(agp_bridge->dev, INTEL_I7505_ATTBASE,
-			       agp_bridge->gatt_bus_addr);
-
-	/* agpctrl */
-	pci_write_config_dword(agp_bridge->dev, INTEL_I7505_AGPCTRL, 0x0000);
-
-	/* clear error registers */
-	pci_write_config_byte(agp_bridge->dev, INTEL_I7505_ERRSTS, 0xff);
-	return 0;
-}
-
-static aper_size_info_16 intel_7505_sizes[7] =
-{
-	{256, 65536, 6, 0xf00},
-	{128, 32768, 5, 0xf20},
-	{64, 16384, 4, 0xf30},
-	{32, 8192, 3, 0xf38},
-	{16, 4096, 2, 0xf3c},
-	{8, 2048, 1, 0xf3e},
-	{4, 1024, 0, 0xf3f}
-};
-
-static void i7505_setup (u32 mode)
-{
-	if ((agp_generic_agp_3_0_enable)==FALSE)
-		agp_generic_agp_enable(mode);
-}
-
-static int __init intel_7505_setup (struct pci_dev *pdev)
-{
-	agp_bridge->masks = intel_generic_masks;
-	agp_bridge->aperture_sizes = (void *) intel_7505_sizes;
-	agp_bridge->size_type = U16_APER_SIZE;
-	agp_bridge->num_aperture_sizes = 7;
-	agp_bridge->dev_private_data = NULL;
-	agp_bridge->needs_scratch_page = FALSE;
-	agp_bridge->configure = intel_7505_configure;
-	agp_bridge->fetch_size = intel_7505_fetch_size;
-	agp_bridge->cleanup = intel_7505_cleanup;
-	agp_bridge->tlb_flush = intel_7505_tlbflush;
-	agp_bridge->mask_memory = intel_mask_memory;
-	agp_bridge->agp_enable = i7505_enable;
-	agp_bridge->cache_flush = global_cache_flush;
-	agp_bridge->create_gatt_table = agp_generic_create_gatt_table;
-	agp_bridge->free_gatt_table = agp_generic_free_gatt_table;
-	agp_bridge->insert_memory = agp_generic_insert_memory;
-	agp_bridge->remove_memory = agp_generic_remove_memory;
-	agp_bridge->alloc_by_type = agp_generic_alloc_by_type;
-	agp_bridge->free_by_type = agp_generic_free_by_type;
-	agp_bridge->agp_alloc_page = agp_generic_alloc_page;
-	agp_bridge->agp_destroy_page = agp_generic_destroy_page;
-	agp_bridge->suspend = agp_generic_suspend;
-	agp_bridge->resume = agp_generic_resume;
-	agp_bridge->cant_use_aperture = 0;
-	return 0;
-}
-
-struct agp_device_ids i7x05_agp_device_ids[] __initdata =
-{
-	{
-		.device_id	= PCI_DEVICE_ID_INTEL_7505_0,
-		.chipset	= INTEL_I7505,
-		.chipset_name	= "i7505",
-	},
-	{
-		.device_id	= PCI_DEVICE_ID_INTEL_7205_0,
-		.chipset	= INTEL_I7505,
-		.chipset_name	= "i7205",
-	},
-	{ }, /* dummy final entry, always present */
-};
-
-/* scan table above for supported devices */
-static int __init agp_lookup_host_bridge (struct pci_dev *pdev)
-{
-	int j=0;
-	struct agp_device_ids *devs;
-	
-	devs = i7x05_agp_device_ids;
-
-	while (devs[j].chipset_name != NULL) {
-		if (pdev->device == devs[j].device_id) {
-			printk (KERN_INFO PFX "Detected Intel %s chipset\n",
-				devs[j].chipset_name);
-			agp_bridge->type = devs[j].chipset;
-
-			if (devs[j].chipset_setup != NULL)
-				return devs[j].chipset_setup(pdev);
-			else
-				return intel_7505_setup(pdev);
-		}
-		j++;
-	}
-
-	printk(KERN_ERR PFX "Unsupported Intel chipset (device id: %04x),",
-		pdev->device);
-	return -ENODEV;
-}
-
-static struct agp_driver i7x05_agp_driver = {
-	.owner = THIS_MODULE;
-};
-
-static int __init agp_i7x05_probe (struct pci_dev *dev, const struct pci_device_id *ent)
-{
-	u8 cap_ptr = 0;
-
-	cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP);
-	if (cap_ptr == 0)
-		return -ENODEV;
-
-	if (agp_lookup_host_bridge(dev) != -ENODEV) {
-		agp_bridge->dev = dev;
-		agp_bridge->capndx = cap_ptr;
-		/* Fill in the mode register */
-		pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+PCI_AGP_STATUS, &agp_bridge->mode)
-		i7x05_agp_driver.dev = dev;
-		agp_register_driver(&i7x05_agp_driver);
-		return 0;
-	}
-	return -ENODEV;
-}
-
-
-static struct pci_device_id agp_i7x05_pci_table[] __initdata = {
-	{
-	.class		= (PCI_CLASS_BRIDGE_HOST << 8),
-	.class_mask	= ~0,
-	.vendor		= PCI_VENDOR_ID_INTEL,
-	.device		= PCI_ANY_ID,
-	.subvendor	= PCI_ANY_ID,
-	.subdevice	= PCI_ANY_ID,
-	},
-	{ }
-};
-
-MODULE_DEVICE_TABLE(pci, agp_i7x05_pci_table);
-
-static struct __initdata pci_driver agp_i7x05_pci_driver = {
-	.name		= "agpgart-i7x05",
-	.id_table	= agp_i7x05_pci_table,
-	.probe		= agp_i7x05_probe,
-};
-
-int __init agp_i7x05_init(void)
-{
-	int ret_val;
-
-	ret_val = pci_module_init(&agp_i7x05_pci_driver);
-	if (ret_val)
-		agp_bridge->type = NOT_SUPPORTED;
-
-	return ret_val;
-}
-
-static void __exit agp_i7x05_cleanup(void)
-{
-	agp_unregister_driver(&i7x05_agp_driver);
-	pci_unregister_driver(&agp_i7x05_pci_driver);
-}
-
-module_init(agp_i7x05_init);
-module_exit(agp_i7x05_cleanup);
-
-MODULE_AUTHOR("Matthew E Tolentino <matthew.e.tolentino@intel.com>");
-MODULE_LICENSE("GPL and additional rights");
-

drivers/char/agp/intel-agp.c

@@ -960,6 +960,34 @@ static int intel_830mp_configure(void)
 	return 0;
 }
 
+static int intel_7505_configure(void)
+{
+	u32 temp;
+	u16 temp2;
+	struct aper_size_info_8 *current_size;
+
+	current_size = A_SIZE_8(agp_bridge->current_size);
+
+	/* aperture size */
+	pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
+
+	/* address to map to */
+	pci_read_config_dword(agp_bridge->dev, INTEL_APBASE, &temp);
+	agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
+
+	/* attbase - aperture base */
+	pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
+
+	/* agpctrl */
+	pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
+
+	/* mchcfg */
+	pci_read_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, &temp2);
+	pci_write_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, temp2 | (1 << 9));
+	
+	return 0;
+}
+
 static unsigned long intel_mask_memory(unsigned long addr, int type)
 {
 	/* Memory type is ignored */
@@ -1026,7 +1054,7 @@ static int __init intel_generic_setup (struct pci_dev *pdev)
 	agp_bridge->cleanup = intel_cleanup;
 	agp_bridge->tlb_flush = intel_tlbflush;
 	agp_bridge->mask_memory = intel_mask_memory;
-	agp_bridge->agp_enable = agp_generic_agp_enable;
+	agp_bridge->agp_enable = agp_generic_enable;
 	agp_bridge->cache_flush = global_cache_flush;
 	agp_bridge->create_gatt_table = agp_generic_create_gatt_table;
 	agp_bridge->free_gatt_table = agp_generic_free_gatt_table;
@@ -1055,7 +1083,7 @@ static int __init intel_815_setup (struct pci_dev *pdev)
 	agp_bridge->cleanup = intel_8xx_cleanup;
 	agp_bridge->tlb_flush = intel_8xx_tlbflush;
 	agp_bridge->mask_memory = intel_mask_memory;
-	agp_bridge->agp_enable = agp_generic_agp_enable;
+	agp_bridge->agp_enable = agp_generic_enable;
 	agp_bridge->cache_flush = global_cache_flush;
 	agp_bridge->create_gatt_table = agp_generic_create_gatt_table;
 	agp_bridge->free_gatt_table = agp_generic_free_gatt_table;
@@ -1085,7 +1113,7 @@ static int __init intel_820_setup (struct pci_dev *pdev)
 	agp_bridge->cleanup = intel_820_cleanup;
 	agp_bridge->tlb_flush = intel_820_tlbflush;
 	agp_bridge->mask_memory = intel_mask_memory;
-	agp_bridge->agp_enable = agp_generic_agp_enable;
+	agp_bridge->agp_enable = agp_generic_enable;
 	agp_bridge->cache_flush = global_cache_flush;
 	agp_bridge->create_gatt_table = agp_generic_create_gatt_table;
 	agp_bridge->free_gatt_table = agp_generic_free_gatt_table;
@@ -1114,7 +1142,7 @@ static int __init intel_830mp_setup (struct pci_dev *pdev)
 	agp_bridge->cleanup = intel_8xx_cleanup;
 	agp_bridge->tlb_flush = intel_8xx_tlbflush;
 	agp_bridge->mask_memory = intel_mask_memory;
-	agp_bridge->agp_enable = agp_generic_agp_enable;
+	agp_bridge->agp_enable = agp_generic_enable;
 	agp_bridge->cache_flush = global_cache_flush;
 	agp_bridge->create_gatt_table = agp_generic_create_gatt_table;
 	agp_bridge->free_gatt_table = agp_generic_free_gatt_table;
@@ -1143,7 +1171,7 @@ static int __init intel_840_setup (struct pci_dev *pdev)
 	agp_bridge->cleanup = intel_8xx_cleanup;
 	agp_bridge->tlb_flush = intel_8xx_tlbflush;
 	agp_bridge->mask_memory = intel_mask_memory;
-	agp_bridge->agp_enable = agp_generic_agp_enable;
+	agp_bridge->agp_enable = agp_generic_enable;
 	agp_bridge->cache_flush = global_cache_flush;
 	agp_bridge->create_gatt_table = agp_generic_create_gatt_table;
 	agp_bridge->free_gatt_table = agp_generic_free_gatt_table;
@@ -1172,7 +1200,7 @@ static int __init intel_845_setup (struct pci_dev *pdev)
 	agp_bridge->cleanup = intel_8xx_cleanup;
 	agp_bridge->tlb_flush = intel_8xx_tlbflush;
 	agp_bridge->mask_memory = intel_mask_memory;
-	agp_bridge->agp_enable = agp_generic_agp_enable;
+	agp_bridge->agp_enable = agp_generic_enable;
 	agp_bridge->cache_flush = global_cache_flush;
 	agp_bridge->create_gatt_table = agp_generic_create_gatt_table;
 	agp_bridge->free_gatt_table = agp_generic_free_gatt_table;
@@ -1201,7 +1229,7 @@ static int __init intel_850_setup (struct pci_dev *pdev)
 	agp_bridge->cleanup = intel_8xx_cleanup;
 	agp_bridge->tlb_flush = intel_8xx_tlbflush;
 	agp_bridge->mask_memory = intel_mask_memory;
-	agp_bridge->agp_enable = agp_generic_agp_enable;
+	agp_bridge->agp_enable = agp_generic_enable;
 	agp_bridge->cache_flush = global_cache_flush;
 	agp_bridge->create_gatt_table = agp_generic_create_gatt_table;
 	agp_bridge->free_gatt_table = agp_generic_free_gatt_table;
@@ -1230,7 +1258,7 @@ static int __init intel_860_setup (struct pci_dev *pdev)
 	agp_bridge->cleanup = intel_8xx_cleanup;
 	agp_bridge->tlb_flush = intel_8xx_tlbflush;
 	agp_bridge->mask_memory = intel_mask_memory;
-	agp_bridge->agp_enable = agp_generic_agp_enable;
+	agp_bridge->agp_enable = agp_generic_enable;
 	agp_bridge->cache_flush = global_cache_flush;
 	agp_bridge->create_gatt_table = agp_generic_create_gatt_table;
 	agp_bridge->free_gatt_table = agp_generic_free_gatt_table;
@@ -1246,6 +1274,34 @@ static int __init intel_860_setup (struct pci_dev *pdev)
 	return 0;
 }
 
+static int __init intel_7505_setup (struct pci_dev *pdev)
+{
+	agp_bridge->masks = intel_generic_masks;
+	agp_bridge->aperture_sizes = (void *) intel_8xx_sizes;
+	agp_bridge->size_type = U8_APER_SIZE;
+	agp_bridge->num_aperture_sizes = 7;
+	agp_bridge->dev_private_data = NULL;
+	agp_bridge->needs_scratch_page = FALSE;
+	agp_bridge->configure = intel_7505_configure;
+	agp_bridge->fetch_size = intel_8xx_fetch_size;
+	agp_bridge->cleanup = intel_8xx_cleanup;
+	agp_bridge->tlb_flush = intel_8xx_tlbflush;
+	agp_bridge->mask_memory = intel_mask_memory;
+	agp_bridge->agp_enable = agp_generic_enable;
+	agp_bridge->cache_flush = global_cache_flush;
+	agp_bridge->create_gatt_table = agp_generic_create_gatt_table;
+	agp_bridge->free_gatt_table = agp_generic_free_gatt_table;
+	agp_bridge->insert_memory = agp_generic_insert_memory;
+	agp_bridge->remove_memory = agp_generic_remove_memory;
+	agp_bridge->alloc_by_type = agp_generic_alloc_by_type;
+	agp_bridge->free_by_type = agp_generic_free_by_type;
+	agp_bridge->agp_alloc_page = agp_generic_alloc_page;
+	agp_bridge->agp_destroy_page = agp_generic_destroy_page;
+	agp_bridge->suspend = agp_generic_suspend;
+	agp_bridge->resume = agp_generic_resume;
+	agp_bridge->cant_use_aperture = 0;
+	return 0;
+}
 struct agp_device_ids intel_agp_device_ids[] __initdata =
 {
 	{
@@ -1329,6 +1385,18 @@ struct agp_device_ids intel_agp_device_ids[] __initdata =
 		.chipset_name	= "865G",
 		.chipset_setup	= intel_845_setup
 	},
+	{
+		.device_id	= PCI_DEVICE_ID_INTEL_7505_0,
+		.chipset	= INTEL_E7505,
+		.chipset_name	= "E7505",
+		.chipset_setup	= intel_7505_setup
+	},
+	{
+		.device_id	= PCI_DEVICE_ID_INTEL_7205_0,
+		.chipset	= INTEL_E7505,
+		.chipset_name	= "E7205",
+		.chipset_setup	= intel_7505_setup
+	},
 	{ }, /* dummy final entry, always present */
 };
 

drivers/char/agp/sis-agp.c

@@ -99,7 +99,7 @@ static int __init sis_generic_setup (struct pci_dev *pdev)
 	agp_bridge->cleanup = sis_cleanup;
 	agp_bridge->tlb_flush = sis_tlbflush;
 	agp_bridge->mask_memory = sis_mask_memory;
-	agp_bridge->agp_enable = agp_generic_agp_enable;
+	agp_bridge->agp_enable = agp_generic_enable;
 	agp_bridge->cache_flush = global_cache_flush;
 	agp_bridge->create_gatt_table = agp_generic_create_gatt_table;
 	agp_bridge->free_gatt_table = agp_generic_free_gatt_table;

drivers/char/agp/via-agp.c

@@ -186,7 +186,7 @@ static int __init via_generic_agp3_setup (struct pci_dev *pdev)
 	agp_bridge->num_aperture_sizes = 10;
 	agp_bridge->dev_private_data = NULL;
 	agp_bridge->needs_scratch_page = FALSE;
-	agp_bridge->agp_enable = agp_generic_agp_3_0_enable;
+	agp_bridge->agp_enable = agp_generic_enable;
 	agp_bridge->configure = via_configure_agp3;
 	agp_bridge->fetch_size = via_fetch_size_agp3;
 	agp_bridge->cleanup = via_cleanup_agp3;
@@ -248,7 +248,7 @@ static int __init via_generic_setup (struct pci_dev *pdev)
 	agp_bridge->cleanup = via_cleanup;
 	agp_bridge->tlb_flush = via_tlbflush;
 	agp_bridge->mask_memory = via_mask_memory;
-	agp_bridge->agp_enable = agp_generic_agp_enable;
+	agp_bridge->agp_enable = agp_generic_enable;
 	agp_bridge->cache_flush = global_cache_flush;
 	agp_bridge->create_gatt_table = agp_generic_create_gatt_table;
 	agp_bridge->free_gatt_table = agp_generic_free_gatt_table;
@@ -319,10 +319,10 @@ static struct agp_device_ids via_agp_device_ids[] __initdata =
 	},
 
 	/* VT8361 */
-/*	{
+	{
 		.device_id	= PCI_DEVICE_ID_VIA_8361,	// 0x3112
 		.chipset_name	= "Apollo KLE133",
-	}, */
+	},
 
 	/* VT8365 / VT8362 */
 	{
@@ -331,10 +331,10 @@ static struct agp_device_ids via_agp_device_ids[] __initdata =
 	},
 
 	/* VT8753A */
-/*	{
-		.device_id	= PCI_DEVICE_ID_VIA_8753_0,	// 0x3128
+	{
+		.device_id	= PCI_DEVICE_ID_VIA_8753_0,
 		.chipset_name	= "P4X266",
-	},	*/	
+	},
 
 	/* VT8366 */
 	{
@@ -349,16 +349,16 @@ static struct agp_device_ids via_agp_device_ids[] __initdata =
 	},
 
 	/* KM266 / PM266 */
-/*	{
-		.device_id	= PCI_DEVICE_ID_VIA_KM266,	// 0x3116
+	{
+		.device_id	= PCI_DEVICE_ID_VIA_KM266,
 		.chipset_name	= "KM266/PM266",
-	},	*/
+	},
 
 	/* CLE266 */
-/*	{
-		.device_id	= PCI_DEVICE_ID_VIA_CLE266,	// 0x3123
+	{
+		.device_id	= PCI_DEVICE_ID_VIA_CLE266,
 		.chipset_name	= "CLE266",
-	},	*/
+	},
 
 	{
 		.device_id	= PCI_DEVICE_ID_VIA_8377_0,
@@ -374,16 +374,16 @@ static struct agp_device_ids via_agp_device_ids[] __initdata =
 	},
 
 	/* VT8752*/
-/*	{
-		.device_id	= PCI_DEVICE_ID_VIA_8752,	// 0x3148
+	{
+		.device_id	= PCI_DEVICE_ID_VIA_8752,
 		.chipset_name	= "ProSavage DDR P4M266",
-	},	*/
+	},
 
 	/* KN266/PN266 */
-/*	{
-		.device_id	= PCI_DEVICE_ID_KN266,	// 0x3156
+	{
+		.device_id	= PCI_DEVICE_ID_VIA_KN266,
 		.chipset_name	= "KN266/PN266",
-	},	*/
+	},
 
 	/* VT8754 */
 	{
@@ -392,28 +392,28 @@ static struct agp_device_ids via_agp_device_ids[] __initdata =
 	},
 
 	/* P4N333 */
-/*	{
-		.device_id	= PCI_DEVICE_ID_VIA_P4N333,	// 0x3178
+	{
+		.device_id	= PCI_DEVICE_ID_VIA_P4N333,
 		.chipset_name	= "P4N333",
-	}, */
+	},
 
 	/* P4X600 */
-/*	{
-		.device_id	= PCI_DEVICE_ID_VIA_P4X600,	// 0x0198
+	{
+		.device_id	= PCI_DEVICE_ID_VIA_P4X600,
 		.chipset_name	= "P4X600",
-	},	*/
+	},
 
 	/* KM400 */
-/*	{
-		.device_id	= PCI_DEVICE_ID_VIA_KM400,	// 0x3205
+	{
+		.device_id	= PCI_DEVICE_ID_VIA_KM400,
 		.chipset_name	= "KM400",
-	},	*/
+	},
 
 	/* P4M400 */
-/*	{
-		.device_id	= PCI_DEVICE_ID_VIA_P4M400,	// 0x3209
+	{
+		.device_id	= PCI_DEVICE_ID_VIA_P4M400,
 		.chipset_name	= "PM400",
-	},	*/
+	},
 
 	{ }, /* dummy final entry, always present */
 };

drivers/char/drm/drm_bufs.h

@@ -106,7 +106,7 @@ int DRM(addmap)( struct inode *inode, struct file *filp,
 	switch ( map->type ) {
 	case _DRM_REGISTERS:
 	case _DRM_FRAME_BUFFER:
-#if !defined(__sparc__) && !defined(__alpha__)
+#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__)
 		if ( map->offset + map->size < map->offset ||
 		     map->offset < virt_to_phys(high_memory) ) {
 			DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );

include/linux/agp_backend.h

@@ -53,7 +53,7 @@ enum chipset_type {
 	INTEL_I850,
 	INTEL_I860,
 	INTEL_460GX,
-	INTEL_I7505,
+	INTEL_E7505,
 	VIA_GENERIC,
 	SIS_GENERIC,
 	AMD_GENERIC,

include/linux/pci_ids.h

@@ -1074,6 +1074,7 @@
 #define PCI_DEVICE_ID_TTI_HPT374	0x0008
 
 #define PCI_VENDOR_ID_VIA		0x1106
+#define PCI_DEVICE_ID_VIA_P4X600	0x0198
 #define PCI_DEVICE_ID_VIA_8363_0	0x0305 
 #define PCI_DEVICE_ID_VIA_8371_0	0x0391
 #define PCI_DEVICE_ID_VIA_8501_0	0x0501
@@ -1113,11 +1114,19 @@
 #define PCI_DEVICE_ID_VIA_8653_0	0x3101
 #define PCI_DEVICE_ID_VIA_8622		0x3102 
 #define PCI_DEVICE_ID_VIA_8233C_0	0x3109
-#define PCI_DEVICE_ID_VIA_8361		0x3112 
+#define PCI_DEVICE_ID_VIA_8361		0x3112
+#define PCI_DEVICE_ID_VIA_KM266		0x3116
+#define PCI_DEVICE_ID_VIA_CLE266	0x3123
+#define PCI_DEVICE_ID_VIA_8753_0	0x3128
 #define PCI_DEVICE_ID_VIA_8233A		0x3147
+#define PCI_DEVICE_ID_VIA_8752		0x3148
+#define PCI_DEVICE_ID_VIA_KN266		0x3156
 #define PCI_DEVICE_ID_VIA_8754		0x3168
 #define PCI_DEVICE_ID_VIA_8235		0x3177
+#define PCI_DEVICE_ID_VIA_P4N333	0x3178
 #define PCI_DEVICE_ID_VIA_8377_0	0x3189
+#define PCI_DEVICE_ID_VIA_KM400		0x3205
+#define PCI_DEVICE_ID_VIA_P4M400	0x3209
 #define PCI_DEVICE_ID_VIA_86C100A	0x6100
 #define PCI_DEVICE_ID_VIA_8231		0x8231
 #define PCI_DEVICE_ID_VIA_8231_4	0x8235