Commit 99714195 authored by Shiju Jose's avatar Shiju Jose Committed by David S. Miller

net: hns3: Add support to enable and disable hw errors

This patch adds functions to enable and disable hw errors.
Signed-off-by: default avatarShiju Jose <shiju.jose@huawei.com>
Signed-off-by: default avatarSalil Mehta <salil.mehta@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 6ae4e733
...@@ -7,6 +7,28 @@ static const struct hclge_hw_blk hw_blk[] = { ...@@ -7,6 +7,28 @@ static const struct hclge_hw_blk hw_blk[] = {
{ /* sentinel */ } { /* sentinel */ }
}; };
int hclge_hw_error_set_state(struct hclge_dev *hdev, bool state)
{
struct device *dev = &hdev->pdev->dev;
int ret = 0;
int i = 0;
while (hw_blk[i].name) {
if (!hw_blk[i].enable_error) {
i++;
continue;
}
ret = hw_blk[i].enable_error(hdev, state);
if (ret) {
dev_err(dev, "fail(%d) to en/disable err int\n", ret);
return ret;
}
i++;
}
return ret;
}
pci_ers_result_t hclge_process_ras_hw_error(struct hnae3_ae_dev *ae_dev) pci_ers_result_t hclge_process_ras_hw_error(struct hnae3_ae_dev *ae_dev)
{ {
struct hclge_dev *hdev = ae_dev->priv; struct hclge_dev *hdev = ae_dev->priv;
......
...@@ -21,9 +21,11 @@ enum hclge_err_int_type { ...@@ -21,9 +21,11 @@ enum hclge_err_int_type {
struct hclge_hw_blk { struct hclge_hw_blk {
u32 msk; u32 msk;
const char *name; const char *name;
int (*enable_error)(struct hclge_dev *hdev, bool en);
void (*process_error)(struct hclge_dev *hdev, void (*process_error)(struct hclge_dev *hdev,
enum hclge_err_int_type type); enum hclge_err_int_type type);
}; };
int hclge_hw_error_set_state(struct hclge_dev *hdev, bool state);
pci_ers_result_t hclge_process_ras_hw_error(struct hnae3_ae_dev *ae_dev); pci_ers_result_t hclge_process_ras_hw_error(struct hnae3_ae_dev *ae_dev);
#endif #endif
...@@ -6759,6 +6759,13 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev) ...@@ -6759,6 +6759,13 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
goto err_mdiobus_unreg; goto err_mdiobus_unreg;
} }
ret = hclge_hw_error_set_state(hdev, true);
if (ret) {
dev_err(&pdev->dev,
"hw error interrupts enable failed, ret =%d\n", ret);
goto err_mdiobus_unreg;
}
hclge_dcb_ops_set(hdev); hclge_dcb_ops_set(hdev);
timer_setup(&hdev->service_timer, hclge_service_timer, 0); timer_setup(&hdev->service_timer, hclge_service_timer, 0);
...@@ -6896,6 +6903,7 @@ static void hclge_uninit_ae_dev(struct hnae3_ae_dev *ae_dev) ...@@ -6896,6 +6903,7 @@ static void hclge_uninit_ae_dev(struct hnae3_ae_dev *ae_dev)
hclge_enable_vector(&hdev->misc_vector, false); hclge_enable_vector(&hdev->misc_vector, false);
synchronize_irq(hdev->misc_vector.vector_irq); synchronize_irq(hdev->misc_vector.vector_irq);
hclge_hw_error_set_state(hdev, false);
hclge_destroy_cmd_queue(&hdev->hw); hclge_destroy_cmd_queue(&hdev->hw);
hclge_misc_irq_uninit(hdev); hclge_misc_irq_uninit(hdev);
hclge_pci_uninit(hdev); hclge_pci_uninit(hdev);
......
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