Commit 9a317425 authored by Andy Gospodarek's avatar Andy Gospodarek Committed by David S. Miller

net/mlx5e: Change Mellanox references in DIM code

Change all appropriate mlx5_am* and MLX5_AM* references to net_dim and
NET_DIM, respectively, in code that handles dynamic interrupt
moderation.  Also change all references from 'am' to 'dim' when used as
local variables and add generic profile references.
Signed-off-by: default avatarAndy Gospodarek <gospo@broadcom.com>
Acked-by: default avatarTal Gilboa <talgi@mellanox.com>
Acked-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent b9c872f2
...@@ -238,8 +238,8 @@ struct mlx5e_params { ...@@ -238,8 +238,8 @@ struct mlx5e_params {
u16 num_channels; u16 num_channels;
u8 num_tc; u8 num_tc;
bool rx_cqe_compress_def; bool rx_cqe_compress_def;
struct mlx5e_cq_moder rx_cq_moderation; struct net_dim_cq_moder rx_cq_moderation;
struct mlx5e_cq_moder tx_cq_moderation; struct net_dim_cq_moder tx_cq_moderation;
bool lro_en; bool lro_en;
u32 lro_wqe_sz; u32 lro_wqe_sz;
u16 tx_max_inline; u16 tx_max_inline;
...@@ -249,7 +249,7 @@ struct mlx5e_params { ...@@ -249,7 +249,7 @@ struct mlx5e_params {
u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE]; u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE];
bool vlan_strip_disable; bool vlan_strip_disable;
bool scatter_fcs_en; bool scatter_fcs_en;
bool rx_am_enabled; bool rx_dim_enabled;
u32 lro_timeout; u32 lro_timeout;
u32 pflags; u32 pflags;
struct bpf_prog *xdp_prog; struct bpf_prog *xdp_prog;
...@@ -528,7 +528,7 @@ struct mlx5e_rq { ...@@ -528,7 +528,7 @@ struct mlx5e_rq {
unsigned long state; unsigned long state;
int ix; int ix;
struct mlx5e_rx_am am; /* Adaptive Moderation */ struct net_dim dim; /* Dynamic Interrupt Moderation */
/* XDP */ /* XDP */
struct bpf_prog *xdp_prog; struct bpf_prog *xdp_prog;
...@@ -1080,4 +1080,5 @@ void mlx5e_build_nic_params(struct mlx5_core_dev *mdev, ...@@ -1080,4 +1080,5 @@ void mlx5e_build_nic_params(struct mlx5_core_dev *mdev,
struct mlx5e_params *params, struct mlx5e_params *params,
u16 max_channels); u16 max_channels);
u8 mlx5e_params_calculate_tx_min_inline(struct mlx5_core_dev *mdev); u8 mlx5e_params_calculate_tx_min_inline(struct mlx5_core_dev *mdev);
void mlx5e_rx_dim_work(struct work_struct *work);
#endif /* __MLX5_EN_H__ */ #endif /* __MLX5_EN_H__ */
...@@ -32,16 +32,16 @@ ...@@ -32,16 +32,16 @@
#include "en.h" #include "en.h"
void mlx5e_rx_am_work(struct work_struct *work) void mlx5e_rx_dim_work(struct work_struct *work)
{ {
struct mlx5e_rx_am *am = container_of(work, struct mlx5e_rx_am, struct net_dim *dim = container_of(work, struct net_dim,
work); work);
struct mlx5e_rq *rq = container_of(am, struct mlx5e_rq, am); struct mlx5e_rq *rq = container_of(dim, struct mlx5e_rq, dim);
struct mlx5e_cq_moder cur_profile = mlx5e_am_get_profile(am->mode, struct net_dim_cq_moder cur_profile = net_dim_get_profile(dim->mode,
am->profile_ix); dim->profile_ix);
mlx5_core_modify_cq_moderation(rq->mdev, &rq->cq.mcq, mlx5_core_modify_cq_moderation(rq->mdev, &rq->cq.mcq,
cur_profile.usec, cur_profile.pkts); cur_profile.usec, cur_profile.pkts);
am->state = MLX5E_AM_START_MEASURE; dim->state = NET_DIM_START_MEASURE;
} }
...@@ -465,7 +465,7 @@ int mlx5e_ethtool_get_coalesce(struct mlx5e_priv *priv, ...@@ -465,7 +465,7 @@ int mlx5e_ethtool_get_coalesce(struct mlx5e_priv *priv,
coal->rx_max_coalesced_frames = priv->channels.params.rx_cq_moderation.pkts; coal->rx_max_coalesced_frames = priv->channels.params.rx_cq_moderation.pkts;
coal->tx_coalesce_usecs = priv->channels.params.tx_cq_moderation.usec; coal->tx_coalesce_usecs = priv->channels.params.tx_cq_moderation.usec;
coal->tx_max_coalesced_frames = priv->channels.params.tx_cq_moderation.pkts; coal->tx_max_coalesced_frames = priv->channels.params.tx_cq_moderation.pkts;
coal->use_adaptive_rx_coalesce = priv->channels.params.rx_am_enabled; coal->use_adaptive_rx_coalesce = priv->channels.params.rx_dim_enabled;
return 0; return 0;
} }
...@@ -519,7 +519,7 @@ int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv, ...@@ -519,7 +519,7 @@ int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
new_channels.params.tx_cq_moderation.pkts = coal->tx_max_coalesced_frames; new_channels.params.tx_cq_moderation.pkts = coal->tx_max_coalesced_frames;
new_channels.params.rx_cq_moderation.usec = coal->rx_coalesce_usecs; new_channels.params.rx_cq_moderation.usec = coal->rx_coalesce_usecs;
new_channels.params.rx_cq_moderation.pkts = coal->rx_max_coalesced_frames; new_channels.params.rx_cq_moderation.pkts = coal->rx_max_coalesced_frames;
new_channels.params.rx_am_enabled = !!coal->use_adaptive_rx_coalesce; new_channels.params.rx_dim_enabled = !!coal->use_adaptive_rx_coalesce;
if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) { if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
priv->channels.params = new_channels.params; priv->channels.params = new_channels.params;
...@@ -527,7 +527,7 @@ int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv, ...@@ -527,7 +527,7 @@ int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
} }
/* we are opened */ /* we are opened */
reset = !!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_am_enabled; reset = !!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled;
if (!reset) { if (!reset) {
mlx5e_set_priv_channels_coalesce(priv, coal); mlx5e_set_priv_channels_coalesce(priv, coal);
priv->channels.params = new_channels.params; priv->channels.params = new_channels.params;
......
...@@ -677,8 +677,17 @@ static int mlx5e_alloc_rq(struct mlx5e_channel *c, ...@@ -677,8 +677,17 @@ static int mlx5e_alloc_rq(struct mlx5e_channel *c,
wqe->data.lkey = rq->mkey_be; wqe->data.lkey = rq->mkey_be;
} }
INIT_WORK(&rq->am.work, mlx5e_rx_am_work); INIT_WORK(&rq->dim.work, mlx5e_rx_dim_work);
rq->am.mode = params->rx_cq_moderation.cq_period_mode;
switch (params->rx_cq_moderation.cq_period_mode) {
case MLX5_CQ_PERIOD_MODE_START_FROM_CQE:
rq->dim.mode = NET_DIM_CQ_PERIOD_MODE_START_FROM_CQE;
break;
case MLX5_CQ_PERIOD_MODE_START_FROM_EQE:
default:
rq->dim.mode = NET_DIM_CQ_PERIOD_MODE_START_FROM_EQE;
}
rq->page_cache.head = 0; rq->page_cache.head = 0;
rq->page_cache.tail = 0; rq->page_cache.tail = 0;
...@@ -925,7 +934,7 @@ static int mlx5e_open_rq(struct mlx5e_channel *c, ...@@ -925,7 +934,7 @@ static int mlx5e_open_rq(struct mlx5e_channel *c,
if (err) if (err)
goto err_destroy_rq; goto err_destroy_rq;
if (params->rx_am_enabled) if (params->rx_dim_enabled)
c->rq.state |= BIT(MLX5E_RQ_STATE_AM); c->rq.state |= BIT(MLX5E_RQ_STATE_AM);
return 0; return 0;
...@@ -958,7 +967,7 @@ static void mlx5e_deactivate_rq(struct mlx5e_rq *rq) ...@@ -958,7 +967,7 @@ static void mlx5e_deactivate_rq(struct mlx5e_rq *rq)
static void mlx5e_close_rq(struct mlx5e_rq *rq) static void mlx5e_close_rq(struct mlx5e_rq *rq)
{ {
cancel_work_sync(&rq->am.work); cancel_work_sync(&rq->dim.work);
mlx5e_destroy_rq(rq); mlx5e_destroy_rq(rq);
mlx5e_free_rx_descs(rq); mlx5e_free_rx_descs(rq);
mlx5e_free_rq(rq); mlx5e_free_rq(rq);
...@@ -1571,7 +1580,7 @@ static void mlx5e_destroy_cq(struct mlx5e_cq *cq) ...@@ -1571,7 +1580,7 @@ static void mlx5e_destroy_cq(struct mlx5e_cq *cq)
} }
static int mlx5e_open_cq(struct mlx5e_channel *c, static int mlx5e_open_cq(struct mlx5e_channel *c,
struct mlx5e_cq_moder moder, struct net_dim_cq_moder moder,
struct mlx5e_cq_param *param, struct mlx5e_cq_param *param,
struct mlx5e_cq *cq) struct mlx5e_cq *cq)
{ {
...@@ -1753,7 +1762,7 @@ static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix, ...@@ -1753,7 +1762,7 @@ static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix,
struct mlx5e_channel_param *cparam, struct mlx5e_channel_param *cparam,
struct mlx5e_channel **cp) struct mlx5e_channel **cp)
{ {
struct mlx5e_cq_moder icocq_moder = {0, 0}; struct net_dim_cq_moder icocq_moder = {0, 0};
struct net_device *netdev = priv->netdev; struct net_device *netdev = priv->netdev;
int cpu = mlx5e_get_cpu(priv, ix); int cpu = mlx5e_get_cpu(priv, ix);
struct mlx5e_channel *c; struct mlx5e_channel *c;
...@@ -2005,7 +2014,7 @@ static void mlx5e_build_ico_cq_param(struct mlx5e_priv *priv, ...@@ -2005,7 +2014,7 @@ static void mlx5e_build_ico_cq_param(struct mlx5e_priv *priv,
mlx5e_build_common_cq_param(priv, param); mlx5e_build_common_cq_param(priv, param);
param->cq_period_mode = MLX5_CQ_PERIOD_MODE_START_FROM_EQE; param->cq_period_mode = NET_DIM_CQ_PERIOD_MODE_START_FROM_EQE;
} }
static void mlx5e_build_icosq_param(struct mlx5e_priv *priv, static void mlx5e_build_icosq_param(struct mlx5e_priv *priv,
...@@ -4047,9 +4056,18 @@ void mlx5e_set_rx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode) ...@@ -4047,9 +4056,18 @@ void mlx5e_set_rx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode)
params->rx_cq_moderation.usec = params->rx_cq_moderation.usec =
MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_USEC_FROM_CQE; MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_USEC_FROM_CQE;
if (params->rx_am_enabled) if (params->rx_dim_enabled) {
params->rx_cq_moderation = switch (cq_period_mode) {
mlx5e_am_get_def_profile(cq_period_mode); case MLX5_CQ_PERIOD_MODE_START_FROM_CQE:
params->rx_cq_moderation =
net_dim_get_def_profile(NET_DIM_CQ_PERIOD_MODE_START_FROM_CQE);
break;
case MLX5_CQ_PERIOD_MODE_START_FROM_EQE:
default:
params->rx_cq_moderation =
net_dim_get_def_profile(NET_DIM_CQ_PERIOD_MODE_START_FROM_EQE);
}
}
MLX5E_SET_PFLAG(params, MLX5E_PFLAG_RX_CQE_BASED_MODER, MLX5E_SET_PFLAG(params, MLX5E_PFLAG_RX_CQE_BASED_MODER,
params->rx_cq_moderation.cq_period_mode == params->rx_cq_moderation.cq_period_mode ==
...@@ -4111,7 +4129,7 @@ void mlx5e_build_nic_params(struct mlx5_core_dev *mdev, ...@@ -4111,7 +4129,7 @@ void mlx5e_build_nic_params(struct mlx5_core_dev *mdev,
cq_period_mode = MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ? cq_period_mode = MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ?
MLX5_CQ_PERIOD_MODE_START_FROM_CQE : MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
MLX5_CQ_PERIOD_MODE_START_FROM_EQE; MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
params->rx_am_enabled = MLX5_CAP_GEN(mdev, cq_moderation); params->rx_dim_enabled = MLX5_CAP_GEN(mdev, cq_moderation);
mlx5e_set_rx_cq_mode_params(params, cq_period_mode); mlx5e_set_rx_cq_mode_params(params, cq_period_mode);
mlx5e_set_tx_cq_mode_params(params, cq_period_mode); mlx5e_set_tx_cq_mode_params(params, cq_period_mode);
......
...@@ -884,7 +884,7 @@ static void mlx5e_build_rep_params(struct mlx5_core_dev *mdev, ...@@ -884,7 +884,7 @@ static void mlx5e_build_rep_params(struct mlx5_core_dev *mdev,
params->rq_wq_type = MLX5_WQ_TYPE_LINKED_LIST; params->rq_wq_type = MLX5_WQ_TYPE_LINKED_LIST;
params->log_rq_size = MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE; params->log_rq_size = MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE;
params->rx_am_enabled = MLX5_CAP_GEN(mdev, cq_moderation); params->rx_dim_enabled = MLX5_CAP_GEN(mdev, cq_moderation);
mlx5e_set_rx_cq_mode_params(params, cq_period_mode); mlx5e_set_rx_cq_mode_params(params, cq_period_mode);
params->tx_max_inline = mlx5e_get_max_inline_cap(mdev); params->tx_max_inline = mlx5e_get_max_inline_cap(mdev);
......
...@@ -79,10 +79,10 @@ int mlx5e_napi_poll(struct napi_struct *napi, int budget) ...@@ -79,10 +79,10 @@ int mlx5e_napi_poll(struct napi_struct *napi, int budget)
mlx5e_cq_arm(&c->sq[i].cq); mlx5e_cq_arm(&c->sq[i].cq);
if (MLX5E_TEST_BIT(c->rq.state, MLX5E_RQ_STATE_AM)) if (MLX5E_TEST_BIT(c->rq.state, MLX5E_RQ_STATE_AM))
mlx5e_rx_am(&c->rq.am, net_dim(&c->rq.dim,
c->rq.cq.event_ctr, c->rq.cq.event_ctr,
c->rq.stats.packets, c->rq.stats.packets,
c->rq.stats.bytes); c->rq.stats.bytes);
mlx5e_cq_arm(&c->rq.cq); mlx5e_cq_arm(&c->rq.cq);
mlx5e_cq_arm(&c->icosq.cq); mlx5e_cq_arm(&c->icosq.cq);
......
...@@ -31,32 +31,32 @@ ...@@ -31,32 +31,32 @@
* SOFTWARE. * SOFTWARE.
*/ */
#ifndef MLX5_AM_H #ifndef NET_DIM_H
#define MLX5_AM_H #define NET_DIM_H
struct mlx5e_cq_moder { struct net_dim_cq_moder {
u16 usec; u16 usec;
u16 pkts; u16 pkts;
u8 cq_period_mode; u8 cq_period_mode;
}; };
struct mlx5e_rx_am_sample { struct net_dim_sample {
ktime_t time; ktime_t time;
u32 pkt_ctr; u32 pkt_ctr;
u32 byte_ctr; u32 byte_ctr;
u16 event_ctr; u16 event_ctr;
}; };
struct mlx5e_rx_am_stats { struct net_dim_stats {
int ppms; /* packets per msec */ int ppms; /* packets per msec */
int bpms; /* bytes per msec */ int bpms; /* bytes per msec */
int epms; /* events per msec */ int epms; /* events per msec */
}; };
struct mlx5e_rx_am { /* Adaptive Moderation */ struct net_dim { /* Adaptive Moderation */
u8 state; u8 state;
struct mlx5e_rx_am_stats prev_stats; struct net_dim_stats prev_stats;
struct mlx5e_rx_am_sample start_sample; struct net_dim_sample start_sample;
struct work_struct work; struct work_struct work;
u8 profile_ix; u8 profile_ix;
u8 mode; u8 mode;
...@@ -66,38 +66,43 @@ struct mlx5e_rx_am { /* Adaptive Moderation */ ...@@ -66,38 +66,43 @@ struct mlx5e_rx_am { /* Adaptive Moderation */
u8 tired; u8 tired;
}; };
enum {
NET_DIM_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
NET_DIM_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
NET_DIM_CQ_PERIOD_NUM_MODES
};
/* Adaptive moderation logic */ /* Adaptive moderation logic */
enum { enum {
MLX5E_AM_START_MEASURE, NET_DIM_START_MEASURE,
MLX5E_AM_MEASURE_IN_PROGRESS, NET_DIM_MEASURE_IN_PROGRESS,
MLX5E_AM_APPLY_NEW_PROFILE, NET_DIM_APPLY_NEW_PROFILE,
}; };
enum { enum {
MLX5E_AM_PARKING_ON_TOP, NET_DIM_PARKING_ON_TOP,
MLX5E_AM_PARKING_TIRED, NET_DIM_PARKING_TIRED,
MLX5E_AM_GOING_RIGHT, NET_DIM_GOING_RIGHT,
MLX5E_AM_GOING_LEFT, NET_DIM_GOING_LEFT,
}; };
enum { enum {
MLX5E_AM_STATS_WORSE, NET_DIM_STATS_WORSE,
MLX5E_AM_STATS_SAME, NET_DIM_STATS_SAME,
MLX5E_AM_STATS_BETTER, NET_DIM_STATS_BETTER,
}; };
enum { enum {
MLX5E_AM_STEPPED, NET_DIM_STEPPED,
MLX5E_AM_TOO_TIRED, NET_DIM_TOO_TIRED,
MLX5E_AM_ON_EDGE, NET_DIM_ON_EDGE,
}; };
void mlx5e_rx_am(struct mlx5e_rx_am *am, void net_dim(struct net_dim *dim,
u16 event_ctr, u16 event_ctr,
u64 packets, u64 packets,
u64 bytes); u64 bytes);
void mlx5e_rx_am_work(struct work_struct *work); struct net_dim_cq_moder net_dim_get_def_profile(u8 rx_cq_period_mode);
struct mlx5e_cq_moder mlx5e_am_get_def_profile(u8 rx_cq_period_mode); struct net_dim_cq_moder net_dim_get_profile(u8 cq_period_mode, int ix);
struct mlx5e_cq_moder mlx5e_am_get_profile(u8 cq_period_mode, int ix);
#endif /* MLX5_AM_H */ #endif /* NET_DIM_H */
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