Commit 9a64388d authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc

* 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (202 commits)
  [POWERPC] Fix compile breakage for 64-bit UP configs
  [POWERPC] Define copy_siginfo_from_user32
  [POWERPC] Add compat handler for PTRACE_GETSIGINFO
  [POWERPC] i2c: Fix build breakage introduced by OF helpers
  [POWERPC] Optimize fls64() on 64-bit processors
  [POWERPC] irqtrace support for 64-bit powerpc
  [POWERPC] Stacktrace support for lockdep
  [POWERPC] Move stackframe definitions to common header
  [POWERPC] Fix device-tree locking vs. interrupts
  [POWERPC] Make pci_bus_to_host()'s struct pci_bus * argument const
  [POWERPC] Remove unused __max_memory variable
  [POWERPC] Simplify xics direct/lpar irq_host setup
  [POWERPC] Use pseries_setup_i8259_cascade() in pseries_mpic_init_IRQ()
  [POWERPC] Turn xics_setup_8259_cascade() into a generic pseries_setup_i8259_cascade()
  [POWERPC] Move xics_setup_8259_cascade() into platforms/pseries/setup.c
  [POWERPC] Use asm-generic/bitops/find.h in bitops.h
  [POWERPC] 83xx: mpc8315 - fix USB UTMI Host setup
  [POWERPC] 85xx: Fix the size of qe muram for MPC8568E
  [POWERPC] 86xx: mpc86xx_hpcn - Temporarily accept old dts node identifier.
  [POWERPC] 86xx: mark functions static, other minor cleanups
  ...
parents e80ab411 14b3ca40
......@@ -954,6 +954,8 @@ and is between 256 and 4096 characters. It is defined in the file
l2cr= [PPC]
l3cr= [PPC]
lapic [X86-32,APIC] Enable the local APIC even if BIOS
disabled it.
......
Hypervisor-Assisted Dump
------------------------
November 2007
The goal of hypervisor-assisted dump is to enable the dump of
a crashed system, and to do so from a fully-reset system, and
to minimize the total elapsed time until the system is back
in production use.
As compared to kdump or other strategies, hypervisor-assisted
dump offers several strong, practical advantages:
-- Unlike kdump, the system has been reset, and loaded
with a fresh copy of the kernel. In particular,
PCI and I/O devices have been reinitialized and are
in a clean, consistent state.
-- As the dump is performed, the dumped memory becomes
immediately available to the system for normal use.
-- After the dump is completed, no further reboots are
required; the system will be fully usable, and running
in it's normal, production mode on it normal kernel.
The above can only be accomplished by coordination with,
and assistance from the hypervisor. The procedure is
as follows:
-- When a system crashes, the hypervisor will save
the low 256MB of RAM to a previously registered
save region. It will also save system state, system
registers, and hardware PTE's.
-- After the low 256MB area has been saved, the
hypervisor will reset PCI and other hardware state.
It will *not* clear RAM. It will then launch the
bootloader, as normal.
-- The freshly booted kernel will notice that there
is a new node (ibm,dump-kernel) in the device tree,
indicating that there is crash data available from
a previous boot. It will boot into only 256MB of RAM,
reserving the rest of system memory.
-- Userspace tools will parse /sys/kernel/release_region
and read /proc/vmcore to obtain the contents of memory,
which holds the previous crashed kernel. The userspace
tools may copy this info to disk, or network, nas, san,
iscsi, etc. as desired.
For Example: the values in /sys/kernel/release-region
would look something like this (address-range pairs).
CPU:0x177fee000-0x10000: HPTE:0x177ffe020-0x1000: /
DUMP:0x177fff020-0x10000000, 0x10000000-0x16F1D370A
-- As the userspace tools complete saving a portion of
dump, they echo an offset and size to
/sys/kernel/release_region to release the reserved
memory back to general use.
An example of this is:
"echo 0x40000000 0x10000000 > /sys/kernel/release_region"
which will release 256MB at the 1GB boundary.
Please note that the hypervisor-assisted dump feature
is only available on Power6-based systems with recent
firmware versions.
Implementation details:
----------------------
During boot, a check is made to see if firmware supports
this feature on this particular machine. If it does, then
we check to see if a active dump is waiting for us. If yes
then everything but 256 MB of RAM is reserved during early
boot. This area is released once we collect a dump from user
land scripts that are run. If there is dump data, then
the /sys/kernel/release_region file is created, and
the reserved memory is held.
If there is no waiting dump data, then only the highest
256MB of the ram is reserved as a scratch area. This area
is *not* released: this region will be kept permanently
reserved, so that it can act as a receptacle for a copy
of the low 256MB in the case a crash does occur. See,
however, "open issues" below, as to whether
such a reserved region is really needed.
Currently the dump will be copied from /proc/vmcore to a
a new file upon user intervention. The starting address
to be read and the range for each data point in provided
in /sys/kernel/release_region.
The tools to examine the dump will be same as the ones
used for kdump.
General notes:
--------------
Security: please note that there are potential security issues
with any sort of dump mechanism. In particular, plaintext
(unencrypted) data, and possibly passwords, may be present in
the dump data. Userspace tools must take adequate precautions to
preserve security.
Open issues/ToDo:
------------
o The various code paths that tell the hypervisor that a crash
occurred, vs. it simply being a normal reboot, should be
reviewed, and possibly clarified/fixed.
o Instead of using /sys/kernel, should there be a /sys/dump
instead? There is a dump_subsys being created by the s390 code,
perhaps the pseries code should use a similar layout as well.
o Is reserving a 256MB region really required? The goal of
reserving a 256MB scratch area is to make sure that no
important crash data is clobbered when the hypervisor
save low mem to the scratch area. But, if one could assure
that nothing important is located in some 256MB area, then
it would not need to be reserved. Something that can be
improved in subsequent versions.
o Still working the kdump team to integrate this with kdump,
some work remains but this would not affect the current
patches.
o Still need to write a shell script, to copy the dump away.
Currently I am parsing it manually.
......@@ -49,6 +49,19 @@ config IRQ_PER_CPU
bool
default y
config STACKTRACE_SUPPORT
bool
default y
config TRACE_IRQFLAGS_SUPPORT
bool
depends on PPC64
default y
config LOCKDEP_SUPPORT
bool
default y
config RWSEM_GENERIC_SPINLOCK
bool
......@@ -81,6 +94,11 @@ config GENERIC_FIND_NEXT_BIT
bool
default y
config GENERIC_GPIO
bool
help
Generic GPIO API support
config ARCH_NO_VIRT_TO_BUS
def_bool PPC64
......@@ -91,6 +109,7 @@ config PPC
select HAVE_OPROFILE
select HAVE_KPROBES
select HAVE_KRETPROBES
select HAVE_LMB
config EARLY_PRINTK
bool
......@@ -210,15 +229,6 @@ source kernel/Kconfig.hz
source kernel/Kconfig.preempt
source "fs/Kconfig.binfmt"
# We optimistically allocate largepages from the VM, so make the limit
# large enough (16MB). This badly named config option is actually
# max order + 1
config FORCE_MAX_ZONEORDER
int
depends on PPC64
default "9" if PPC_64K_PAGES
default "13"
config HUGETLB_PAGE_SIZE_VARIABLE
bool
depends on HUGETLB_PAGE
......@@ -307,6 +317,16 @@ config CRASH_DUMP
Don't change this unless you know what you are doing.
config PHYP_DUMP
bool "Hypervisor-assisted dump (EXPERIMENTAL)"
depends on PPC_PSERIES && EXPERIMENTAL
help
Hypervisor-assisted dump is meant to be a kdump replacement
offering robustness and speed not possible without system
hypervisor assistence.
If unsure, say "N"
config PPCBUG_NVRAM
bool "Enable reading PPCBUG NVRAM during boot" if PPLUS || LOPEC
default y if PPC_PREP
......@@ -381,6 +401,26 @@ config PPC_64K_PAGES
while on hardware with such support, it will be used to map
normal application pages.
config FORCE_MAX_ZONEORDER
int "Maximum zone order"
default "9" if PPC_64K_PAGES
default "13" if PPC64 && !PPC_64K_PAGES
default "11"
help
The kernel memory allocator divides physically contiguous memory
blocks into "zones", where each zone is a power of two number of
pages. This option selects the largest power of two that the kernel
keeps in the memory allocator. If you need to allocate very large
blocks of physically contiguous memory, then you may need to
increase this value.
This config option is actually maximum order plus one. For example,
a value of 11 means that the largest free memory block is 2^10 pages.
The page size is not necessarily 4KB. For example, on 64-bit
systems, 64KB pages can be enabled via CONFIG_PPC_64K_PAGES. Keep
this in mind when choosing a value for this option.
config PPC_SUBPAGE_PROT
bool "Support setting protections for 4k subpages"
depends on PPC_64K_PAGES
......@@ -490,6 +530,14 @@ config FSL_PCI
bool
select PPC_INDIRECT_PCI
config 4xx_SOC
bool
config FSL_LBC
bool
help
Freescale Localbus support
# Yes MCA RS/6000s exist but Linux-PPC does not currently support any
config MCA
bool
......@@ -663,22 +711,6 @@ config CONSISTENT_SIZE
hex "Size of consistent memory pool" if CONSISTENT_SIZE_BOOL
default "0x00200000" if NOT_COHERENT_CACHE
config BOOT_LOAD_BOOL
bool "Set the boot link/load address"
depends on ADVANCED_OPTIONS && !PPC_MULTIPLATFORM
help
This option allows you to set the initial load address of the zImage
or zImage.initrd file. This can be useful if you are on a board
which has a small amount of memory.
Say N here unless you know what you are doing.
config BOOT_LOAD
hex "Link/load address for booting" if BOOT_LOAD_BOOL
default "0x00400000" if 40x || 8xx || 8260
default "0x01000000" if 44x
default "0x00800000"
config PIN_TLB
bool "Pinned Kernel TLBs (860 ONLY)"
depends on ADVANCED_OPTIONS && 8xx
......
......@@ -269,7 +269,7 @@ config PPC_EARLY_DEBUG_CPM_ADDR
hex "CPM UART early debug transmit descriptor address"
depends on PPC_EARLY_DEBUG_CPM
default "0xfa202008" if PPC_EP88XC
default "0xf0000008" if CPM2
default "0xf0001ff8" if CPM2
default "0xff002008" if CPM1
help
This specifies the address of the transmit descriptor
......
......@@ -71,13 +71,11 @@ endif
LDFLAGS_vmlinux := -Bstatic
CPPFLAGS-$(CONFIG_PPC32) := -Iarch/$(ARCH)
AFLAGS-$(CONFIG_PPC32) := -Iarch/$(ARCH)
CFLAGS-$(CONFIG_PPC64) := -mminimal-toc -mtraceback=none -mcall-aixdesc
CFLAGS-$(CONFIG_PPC32) := -Iarch/$(ARCH) -ffixed-r2 -mmultiple
KBUILD_CPPFLAGS += $(CPPFLAGS-y)
KBUILD_AFLAGS += $(AFLAGS-y)
KBUILD_CFLAGS += -msoft-float -pipe $(CFLAGS-y)
CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 -mmultiple
KBUILD_CPPFLAGS += -Iarch/$(ARCH)
KBUILD_AFLAGS += -Iarch/$(ARCH)
KBUILD_CFLAGS += -msoft-float -pipe -Iarch/$(ARCH) $(CFLAGS-y)
CPP = $(CC) -E $(KBUILD_CFLAGS)
CHECKFLAGS += -m$(CONFIG_WORD_SIZE) -D__powerpc__ -D__powerpc$(CONFIG_WORD_SIZE)__
......@@ -164,7 +162,7 @@ boot := arch/$(ARCH)/boot
$(BOOT_TARGETS): vmlinux
$(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
bootwrapper_install:
bootwrapper_install %.dtb:
$(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
define archhelp
......
......@@ -40,6 +40,7 @@ $(obj)/ebony.o: BOOTCFLAGS += -mcpu=405
$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405
$(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405
$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
$(obj)/virtex405-head.o: BOOTCFLAGS += -mcpu=405
zlib := inffast.c inflate.c inftrees.c
......@@ -64,7 +65,8 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c
cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \
fixed-head.S ep88xc.c ep405.c \
cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
cuboot-warp.c cuboot-85xx-cpm2.c
cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
virtex405-head.S
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
......@@ -192,7 +194,7 @@ image-$(CONFIG_PPC_CHRP) += zImage.chrp
image-$(CONFIG_PPC_EFIKA) += zImage.chrp
image-$(CONFIG_PPC_PMAC) += zImage.pmac
image-$(CONFIG_PPC_HOLLY) += zImage.holly
image-$(CONFIG_PPC_PRPMC2800) += zImage.prpmc2800
image-$(CONFIG_PPC_PRPMC2800) += dtbImage.prpmc2800
image-$(CONFIG_PPC_ISERIES) += zImage.iseries
image-$(CONFIG_DEFAULT_UIMAGE) += uImage
......@@ -216,6 +218,7 @@ image-$(CONFIG_RAINIER) += cuImage.rainier
image-$(CONFIG_TAISHAN) += cuImage.taishan
image-$(CONFIG_KATMAI) += cuImage.katmai
image-$(CONFIG_WARP) += cuImage.warp
image-$(CONFIG_YOSEMITE) += cuImage.yosemite
# Board ports in arch/powerpc/platform/8xx/Kconfig
image-$(CONFIG_PPC_MPC86XADS) += cuImage.mpc866ads
......@@ -255,6 +258,7 @@ image-$(CONFIG_TQM8555) += cuImage.tqm8555
image-$(CONFIG_TQM8560) += cuImage.tqm8560
image-$(CONFIG_SBC8548) += cuImage.sbc8548
image-$(CONFIG_SBC8560) += cuImage.sbc8560
image-$(CONFIG_KSI8560) += cuImage.ksi8560
# Board ports in arch/powerpc/platform/embedded6xx/Kconfig
image-$(CONFIG_STORCENTER) += cuImage.storcenter
......@@ -285,11 +289,11 @@ $(obj)/zImage.%: vmlinux $(wrapperbits)
$(call if_changed,wrap,$*)
# dtbImage% - a dtbImage is a zImage with an embedded device tree blob
$(obj)/dtbImage.initrd.%: vmlinux $(wrapperbits) $(dtstree)/%.dts
$(call if_changed,wrap,$*,$(dtstree)/$*.dts,,$(obj)/ramdisk.image.gz)
$(obj)/dtbImage.initrd.%: vmlinux $(wrapperbits) $(obj)/%.dtb
$(call if_changed,wrap,$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
$(obj)/dtbImage.%: vmlinux $(wrapperbits) $(dtstree)/%.dts
$(call if_changed,wrap,$*,$(dtstree)/$*.dts)
$(obj)/dtbImage.%: vmlinux $(wrapperbits) $(obj)/%.dtb
$(call if_changed,wrap,$*,,$(obj)/$*.dtb)
# This cannot be in the root of $(src) as the zImage rule always adds a $(obj)
# prefix
......@@ -302,14 +306,24 @@ $(obj)/zImage.iseries: vmlinux
$(obj)/uImage: vmlinux $(wrapperbits)
$(call if_changed,wrap,uboot)
$(obj)/cuImage.%: vmlinux $(dtstree)/%.dts $(wrapperbits)
$(call if_changed,wrap,cuboot-$*,$(dtstree)/$*.dts)
$(obj)/cuImage.%: vmlinux $(obj)/%.dtb $(wrapperbits)
$(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb)
$(obj)/treeImage.initrd.%: vmlinux $(dtstree)/%.dts $(wrapperbits)
$(call if_changed,wrap,treeboot-$*,$(dtstree)/$*.dts,,$(obj)/ramdisk.image.gz)
$(obj)/simpleImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
$(call if_changed,wrap,simpleboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
$(obj)/treeImage.%: vmlinux $(dtstree)/%.dts $(wrapperbits)
$(call if_changed,wrap,treeboot-$*,$(dtstree)/$*.dts)
$(obj)/simpleImage.%: vmlinux $(obj)/%.dtb $(wrapperbits)
$(call if_changed,wrap,simpleboot-$*,,$(obj)/$*.dtb)
$(obj)/treeImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
$(call if_changed,wrap,treeboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
$(obj)/treeImage.%: vmlinux $(obj)/%.dtb $(wrapperbits)
$(call if_changed,wrap,treeboot-$*,,$(obj)/$*.dtb)
# Rule to build device tree blobs
$(obj)/%.dtb: $(dtstree)/%.dts $(obj)/dtc
$(obj)/dtc -O dtb -o $(obj)/$*.dtb -b 0 $(DTS_FLAGS) $(dtstree)/$*.dts
# If there isn't a platform selected then just strip the vmlinux.
ifeq (,$(image-y))
......@@ -326,7 +340,7 @@ install: $(CONFIGURE) $(addprefix $(obj)/, $(image-y))
# anything not in $(targets)
clean-files += $(image-) $(initrd-) zImage zImage.initrd cuImage.* treeImage.* \
otheros.bld
otheros.bld *.dtb
# clean up files cached by wrapper
clean-kernel := vmlinux.strip vmlinux.bin
......
......@@ -33,7 +33,8 @@ static void bamboo_fixups(void)
ibm440ep_fixup_clocks(sysclk, 11059200, 25000000);
ibm4xx_sdram_fixup_memsize();
ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00);
dt_fixup_mac_addresses(bamboo_mac0, bamboo_mac1);
dt_fixup_mac_address_by_alias("ethernet0", bamboo_mac0);
dt_fixup_mac_address_by_alias("ethernet1", bamboo_mac1);
}
void bamboo_init(void *mac0, void *mac1)
......
......@@ -11,6 +11,7 @@
#include "types.h"
#include "io.h"
#include "ops.h"
#include "page.h"
struct cpm_scc {
u32 gsmrl;
......@@ -42,6 +43,22 @@ struct cpm_param {
u16 tbase;
u8 rfcr;
u8 tfcr;
u16 mrblr;
u32 rstate;
u8 res1[4];
u16 rbptr;
u8 res2[6];
u32 tstate;
u8 res3[4];
u16 tbptr;
u8 res4[6];
u16 maxidl;
u16 idlc;
u16 brkln;
u16 brkec;
u16 brkcr;
u16 rmask;
u8 res5[4];
};
struct cpm_bd {
......@@ -54,10 +71,10 @@ static void *cpcr;
static struct cpm_param *param;
static struct cpm_smc *smc;
static struct cpm_scc *scc;
struct cpm_bd *tbdf, *rbdf;
static struct cpm_bd *tbdf, *rbdf;
static u32 cpm_cmd;
static u8 *muram_start;
static u32 muram_offset;
static void *cbd_addr;
static u32 cbd_offset;
static void (*do_cmd)(int op);
static void (*enable_port)(void);
......@@ -119,20 +136,25 @@ static int cpm_serial_open(void)
out_8(&param->rfcr, 0x10);
out_8(&param->tfcr, 0x10);
rbdf = (struct cpm_bd *)muram_start;
rbdf->addr = (u8 *)(rbdf + 2);
out_be16(&param->mrblr, 1);
out_be16(&param->maxidl, 0);
out_be16(&param->brkec, 0);
out_be16(&param->brkln, 0);
out_be16(&param->brkcr, 0);
rbdf = cbd_addr;
rbdf->addr = (u8 *)rbdf - 1;
rbdf->sc = 0xa000;
rbdf->len = 1;
tbdf = rbdf + 1;
tbdf->addr = (u8 *)(rbdf + 2) + 1;
tbdf->addr = (u8 *)rbdf - 2;
tbdf->sc = 0x2000;
tbdf->len = 1;
sync();
out_be16(&param->rbase, muram_offset);
out_be16(&param->tbase, muram_offset + sizeof(struct cpm_bd));
out_be16(&param->rbase, cbd_offset);
out_be16(&param->tbase, cbd_offset + sizeof(struct cpm_bd));
do_cmd(CPM_CMD_INIT_RX_TX);
......@@ -175,10 +197,12 @@ static unsigned char cpm_serial_getc(void)
int cpm_console_init(void *devp, struct serial_console_data *scdp)
{
void *reg_virt[2];
int is_smc = 0, is_cpm2 = 0, n;
unsigned long reg_phys;
void *vreg[2];
u32 reg[2];
int is_smc = 0, is_cpm2 = 0;
void *parent, *muram;
void *muram_addr;
unsigned long muram_offset, muram_size;
if (dt_is_compatible(devp, "fsl,cpm1-smc-uart")) {
is_smc = 1;
......@@ -202,63 +226,64 @@ int cpm_console_init(void *devp, struct serial_console_data *scdp)
else
do_cmd = cpm1_cmd;
n = getprop(devp, "fsl,cpm-command", &cpm_cmd, 4);
if (n < 4)
if (getprop(devp, "fsl,cpm-command", &cpm_cmd, 4) < 4)
return -1;
n = getprop(devp, "virtual-reg", reg_virt, sizeof(reg_virt));
if (n < (int)sizeof(reg_virt)) {
for (n = 0; n < 2; n++) {
if (!dt_xlate_reg(devp, n, &reg_phys, NULL))
return -1;
reg_virt[n] = (void *)reg_phys;
}
}
if (dt_get_virtual_reg(devp, vreg, 2) < 2)
return -1;
if (is_smc)
smc = reg_virt[0];
smc = vreg[0];
else
scc = reg_virt[0];
scc = vreg[0];
param = reg_virt[1];
param = vreg[1];
parent = get_parent(devp);
if (!parent)
return -1;
n = getprop(parent, "virtual-reg", reg_virt, sizeof(reg_virt));
if (n < (int)sizeof(reg_virt)) {
if (!dt_xlate_reg(parent, 0, &reg_phys, NULL))
return -1;
reg_virt[0] = (void *)reg_phys;
}
cpcr = reg_virt[0];
if (dt_get_virtual_reg(parent, &cpcr, 1) < 1)
return -1;
muram = finddevice("/soc/cpm/muram/data");
if (!muram)
return -1;
/* For bootwrapper-compatible device trees, we assume that the first
* entry has at least 18 bytes, and that #address-cells/#data-cells
* entry has at least 128 bytes, and that #address-cells/#data-cells
* is one for both parent and child.
*/
n = getprop(muram, "virtual-reg", reg_virt, sizeof(reg_virt));
if (n < (int)sizeof(reg_virt)) {
if (!dt_xlate_reg(muram, 0, &reg_phys, NULL))
return -1;
if (dt_get_virtual_reg(muram, &muram_addr, 1) < 1)
return -1;
reg_virt[0] = (void *)reg_phys;
}
if (getprop(muram, "reg", reg, 8) < 8)
return -1;
muram_start = reg_virt[0];
muram_offset = reg[0];
muram_size = reg[1];
n = getprop(muram, "reg", &muram_offset, 4);
if (n < 4)
return -1;
/* Store the buffer descriptors at the end of the first muram chunk.
* For SMC ports on CPM2-based platforms, relocate the parameter RAM
* just before the buffer descriptors.
*/
cbd_offset = muram_offset + muram_size - 2 * sizeof(struct cpm_bd);
if (is_cpm2 && is_smc) {
u16 *smc_base = (u16 *)param;
u16 pram_offset;
pram_offset = cbd_offset - 64;
pram_offset = _ALIGN_DOWN(pram_offset, 64);
disable_port();
out_be16(smc_base, pram_offset);
param = muram_addr - muram_offset + pram_offset;
}
cbd_addr = muram_addr - muram_offset + cbd_offset;
scdp->open = cpm_serial_open;
scdp->putc = cpm_serial_putc;
......
......@@ -128,7 +128,7 @@ static void fixup_pci(void)
u8 *soc_regs;
int i, len;
void *node, *parent_node;
u32 naddr, nsize, mem_log2;
u32 naddr, nsize, mem_pow2, mem_mask;
node = finddevice("/pci");
if (!node || !dt_is_compatible(node, "fsl,pq2-pci"))
......@@ -141,7 +141,7 @@ static void fixup_pci(void)
soc_regs = (u8 *)fsl_get_immr();
if (!soc_regs)
goto err;
goto unhandled;
dt_get_reg_format(node, &naddr, &nsize);
if (naddr != 3 || nsize != 2)
......@@ -153,7 +153,7 @@ static void fixup_pci(void)
dt_get_reg_format(parent_node, &naddr, &nsize);
if (naddr != 1 || nsize != 1)
goto err;
goto unhandled;
len = getprop(node, "ranges", pci_ranges_buf,
sizeof(pci_ranges_buf));
......@@ -170,14 +170,20 @@ static void fixup_pci(void)
}
if (!mem || !mmio || !io)
goto err;
goto unhandled;
if (mem->size[1] != mmio->size[1])
goto unhandled;
if (mem->size[1] & (mem->size[1] - 1))
goto unhandled;
if (io->size[1] & (io->size[1] - 1))
goto unhandled;
if (mem->phys_addr + mem->size[1] == mmio->phys_addr)
mem_base = mem;
else if (mmio->phys_addr + mmio->size[1] == mem->phys_addr)
mem_base = mmio;
else
goto err;
goto unhandled;
out_be32(&pci_regs[1][0], mem_base->phys_addr | 1);
out_be32(&pci_regs[2][0], ~(mem->size[1] + mmio->size[1] - 1));
......@@ -201,8 +207,9 @@ static void fixup_pci(void)
out_le32(&pci_regs[0][58], 0);
out_le32(&pci_regs[0][60], 0);
mem_log2 = 1 << (__ilog2_u32(bd.bi_memsize - 1) + 1);
out_le32(&pci_regs[0][62], 0xa0000000 | ~((1 << (mem_log2 - 12)) - 1));
mem_pow2 = 1 << (__ilog2_u32(bd.bi_memsize - 1) + 1);
mem_mask = ~(mem_pow2 - 1) >> 12;
out_le32(&pci_regs[0][62], 0xa0000000 | mem_mask);
/* If PCI is disabled, drive RST high to enable. */
if (!(in_le32(&pci_regs[0][32]) & 1)) {
......@@ -228,7 +235,11 @@ static void fixup_pci(void)
return;
err:
printf("Bad PCI node\r\n");
printf("Bad PCI node -- using existing firmware setup.\r\n");
return;
unhandled:
printf("Unsupported PCI node -- using existing firmware setup.\r\n");
}
static void pq2_platform_fixups(void)
......
......@@ -42,7 +42,8 @@ static void rainier_fixups(void)
ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
ibm4xx_denali_fixup_memsize();
dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
}
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
......
......@@ -42,7 +42,8 @@ static void sequoia_fixups(void)
ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
ibm4xx_denali_fixup_memsize();
dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
}
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
......
......@@ -40,7 +40,8 @@ static void taishan_fixups(void)
ibm4xx_sdram_fixup_memsize();
dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr);
dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
}
......
......@@ -24,7 +24,7 @@ static void warp_fixups(void)
ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
ibm4xx_sdram_fixup_memsize();
ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
dt_fixup_mac_addresses(&bd.bi_enetaddr);
dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
}
......
/*
* Old U-boot compatibility for Yosemite
*
* Author: Josh Boyer <jwboyer@linux.vnet.ibm.com>
*
* Copyright 2008 IBM Corporation
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include "ops.h"
#include "stdio.h"
#include "4xx.h"
#include "44x.h"
#include "cuboot.h"
#define TARGET_4xx
#define TARGET_44x
#include "ppcboot.h"
static bd_t bd;
static void yosemite_fixups(void)
{
unsigned long sysclk = 66666666;
ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
ibm4xx_sdram_fixup_memsize();
ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00);
dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
}
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
{
CUBOOT_INIT();
platform_ops.fixups = yosemite_fixups;
platform_ops.exit = ibm44x_dbcr_reset;
fdt_init(_dtb_start);
serial_console_init();
}
......@@ -350,3 +350,23 @@ int dt_is_compatible(void *node, const char *compat)
return 0;
}
int dt_get_virtual_reg(void *node, void **addr, int nres)
{
unsigned long xaddr;
int n;
n = getprop(node, "virtual-reg", addr, nres * 4);
if (n > 0)
return n / 4;
for (n = 0; n < nres; n++) {
if (!dt_xlate_reg(node, n, &xaddr, NULL))
break;
addr[n] = (void *)xaddr;
}
return n;
}
......@@ -204,7 +204,6 @@ ZMII0: emac-zmii@ef600d00 {
};
EMAC0: ethernet@ef600e00 {
linux,network-index = <0>;
device_type = "network";
compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
......@@ -225,7 +224,6 @@ EMAC0: ethernet@ef600e00 {
};
EMAC1: ethernet@ef600f00 {
linux,network-index = <1>;
device_type = "network";
compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
......
This diff is collapsed.
......@@ -241,7 +241,6 @@ ZMII0: emac-zmii@40000780 {
};
EMAC0: ethernet@40000800 {
linux,network-index = <0>;
device_type = "network";
compatible = "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
......@@ -261,7 +260,6 @@ EMAC0: ethernet@40000800 {
zmii-channel = <0>;
};
EMAC1: ethernet@40000900 {
linux,network-index = <1>;
device_type = "network";
compatible = "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
......
......@@ -121,8 +121,7 @@ muram {
data@0 {
compatible = "fsl,cpm-muram-data";
reg = <0 0x1100 0x1140
0xec0 0x9800 0x800>;
reg = <0 0x2000 0x9800 0x800>;
};
};
......@@ -138,7 +137,7 @@ smc1: serial@11a80 {
device_type = "serial";
compatible = "fsl,mpc8248-smc-uart",
"fsl,cpm2-smc-uart";
reg = <0x11a80 0x20 0x1100 0x40>;
reg = <0x11a80 0x20 0x87fc 2>;
interrupts = <4 8>;
interrupt-parent = <&PIC>;
fsl,cpm-brg = <7>;
......
......@@ -2,7 +2,7 @@
* EP88xC Device Tree Source
*
* Copyright 2006 MontaVista Software, Inc.
* Copyright 2007 Freescale Semiconductor, Inc.
* Copyright 2007,2008 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
......@@ -10,6 +10,7 @@
* option) any later version.
*/
/dts-v1/;
/ {
model = "EP88xC";
......@@ -23,44 +24,44 @@ cpus {
PowerPC,885@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <d#16>;
i-cache-line-size = <d#16>;
d-cache-size = <d#8192>;
i-cache-size = <d#8192>;
reg = <0x0>;
d-cache-line-size = <16>;
i-cache-line-size = <16>;
d-cache-size = <8192>;
i-cache-size = <8192>;
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
interrupts = <f 2>; // decrementer interrupt
interrupts = <15 2>; // decrementer interrupt
interrupt-parent = <&PIC>;
};
};
memory {
device_type = "memory";
reg = <0 0>;
reg = <0x0 0x0>;
};
localbus@fa200100 {
compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus";
#address-cells = <2>;
#size-cells = <1>;
reg = <fa200100 40>;
reg = <0xfa200100 0x40>;
ranges = <
0 0 fc000000 04000000
3 0 fa000000 01000000
0x0 0x0 0xfc000000 0x4000000
0x3 0x0 0xfa000000 0x1000000
>;
flash@0,2000000 {
compatible = "cfi-flash";
reg = <0 2000000 2000000>;
reg = <0x0 0x2000000 0x2000000>;
bank-width = <4>;
device-width = <2>;
};
board-control@3,400000 {
reg = <3 400000 10>;
reg = <0x3 0x400000 0x10>;
compatible = "fsl,ep88xc-bcsr";
};
};
......@@ -70,25 +71,25 @@ soc@fa200000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
ranges = <0 fa200000 00004000>;
ranges = <0x0 0xfa200000 0x4000>;
bus-frequency = <0>;
// Temporary -- will go away once kernel uses ranges for get_immrbase().
reg = <fa200000 4000>;
reg = <0xfa200000 0x4000>;
mdio@e00 {
compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio";
reg = <e00 188>;
reg = <0xe00 0x188>;
#address-cells = <1>;
#size-cells = <0>;
PHY0: ethernet-phy@0 {
reg = <0>;
reg = <0x0>;
device_type = "ethernet-phy";
};
PHY1: ethernet-phy@1 {
reg = <1>;
reg = <0x1>;
device_type = "ethernet-phy";
};
};
......@@ -97,7 +98,7 @@ ethernet@e00 {
device_type = "network";
compatible = "fsl,mpc885-fec-enet",
"fsl,pq1-fec-enet";
reg = <e00 188>;
reg = <0xe00 0x188>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <3 1>;
interrupt-parent = <&PIC>;
......@@ -109,7 +110,7 @@ ethernet@1e00 {
device_type = "network";
compatible = "fsl,mpc885-fec-enet",
"fsl,pq1-fec-enet";
reg = <1e00 188>;
reg = <0x1e00 0x188>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <7 1>;
interrupt-parent = <&PIC>;
......@@ -120,7 +121,7 @@ ethernet@1e00 {
PIC: interrupt-controller@0 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0 24>;
reg = <0x0 0x24>;
compatible = "fsl,mpc885-pic", "fsl,pq1-pic";
};
......@@ -130,29 +131,29 @@ pcmcia@80 {
#size-cells = <2>;
compatible = "fsl,pq-pcmcia";
device_type = "pcmcia";
reg = <80 80>;
reg = <0x80 0x80>;
interrupt-parent = <&PIC>;
interrupts = <d 1>;
interrupts = <13 1>;
};
cpm@9c0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc885-cpm", "fsl,cpm1";
command-proc = <9c0>;
command-proc = <0x9c0>;
interrupts = <0>; // cpm error interrupt
interrupt-parent = <&CPM_PIC>;
reg = <9c0 40>;
reg = <0x9c0 0x40>;
ranges;
muram@2000 {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 2000 2000>;
ranges = <0x0 0x2000 0x2000>;
data@0 {
compatible = "fsl,cpm-muram-data";
reg = <0 1c00>;
reg = <0x0 0x1c00>;
};
};
......@@ -160,7 +161,7 @@ brg@9f0 {
compatible = "fsl,mpc885-brg",
"fsl,cpm1-brg",
"fsl,cpm-brg";
reg = <9f0 10>;
reg = <0x9f0 0x10>;
};
CPM_PIC: interrupt-controller@930 {
......@@ -168,7 +169,7 @@ CPM_PIC: interrupt-controller@930 {
#interrupt-cells = <1>;
interrupts = <5 2 0 2>;
interrupt-parent = <&PIC>;
reg = <930 20>;
reg = <0x930 0x20>;
compatible = "fsl,mpc885-cpm-pic",
"fsl,cpm1-pic";
};
......@@ -178,11 +179,11 @@ serial@a80 {
device_type = "serial";
compatible = "fsl,mpc885-smc-uart",
"fsl,cpm1-smc-uart";
reg = <a80 10 3e80 40>;
reg = <0xa80 0x10 0x3e80 0x40>;
interrupts = <4>;
interrupt-parent = <&CPM_PIC>;
fsl,cpm-brg = <1>;
fsl,cpm-command = <0090>;
fsl,cpm-command = <0x90>;
linux,planetcore-label = "SMC1";
};
......@@ -191,11 +192,11 @@ serial@a20 {
device_type = "serial";
compatible = "fsl,mpc885-scc-uart",
"fsl,cpm1-scc-uart";
reg = <a20 20 3d00 80>;
interrupts = <1d>;
reg = <0xa20 0x20 0x3d00 0x80>;
interrupts = <29>;
interrupt-parent = <&CPM_PIC>;
fsl,cpm-brg = <2>;
fsl,cpm-command = <0040>;
fsl,cpm-command = <0x40>;
linux,planetcore-label = "SCC2";
};
......@@ -204,9 +205,9 @@ usb@a00 {
#size-cells = <0>;
compatible = "fsl,mpc885-usb",
"fsl,cpm1-usb";
reg = <a00 18 1c00 80>;
reg = <0xa00 0x18 0x1c00 0x80>;
interrupt-parent = <&CPM_PIC>;
interrupts = <1e>;
interrupts = <30>;
fsl,cpm-command = <0000>;
};
};
......
This diff is collapsed.
......@@ -12,7 +12,7 @@ / {
#address-cells = <1>;
#size-cells = <1>;
model = "amcc,haleakala";
compatible = "amcc,kilauea";
compatible = "amcc,haleakala", "amcc,kilauea";
dcr-parent = <&/cpus/cpu@0>;
aliases {
......@@ -218,7 +218,7 @@ EMAC0: ethernet@ef600900 {
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <5dc>;
max-frame-size = <2328>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "rgmii";
......
......@@ -212,7 +212,7 @@ EMAC0: ethernet@10000800 {
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <5dc>;
max-frame-size = <2328>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "gmii";
......
......@@ -219,7 +219,7 @@ EMAC0: ethernet@ef600900 {
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <5dc>;
max-frame-size = <2328>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "rgmii";
......@@ -247,7 +247,7 @@ EMAC1: ethernet@ef600a00 {
mal-tx-channel = <1>;
mal-rx-channel = <1>;
cell-index = <1>;
max-frame-size = <5dc>;
max-frame-size = <2328>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "rgmii";
......
/*
* Device Tree Source for Emerson KSI8560
*
* Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
*
* Based on mpc8560ads.dts
*
* 2008 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*
*/
/dts-v1/;
/ {
model = "KSI8560";
compatible = "emerson,KSI8560";
#address-cells = <1>;
#size-cells = <1>;
aliases {
ethernet0 = &enet0;
ethernet1 = &enet1;
ethernet2 = &enet2;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,8560@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <0x8000>; /* L1, 32K */
i-cache-size = <0x8000>; /* L1, 32K */
timebase-frequency = <0>; /* From U-boot */
bus-frequency = <0>; /* From U-boot */
clock-frequency = <0>; /* From U-boot */
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */
};
soc@fdf00000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
ranges = <0x00000000 0xfdf00000 0x00100000>;
bus-frequency = <0>; /* Fixed by bootwrapper */
memory-controller@2000 {
compatible = "fsl,8540-memory-controller";
reg = <0x2000 0x1000>;
interrupt-parent = <&MPIC>;
interrupts = <0x12 0x2>;
};
l2-cache-controller@20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <0x20>; /* 32 bytes */
cache-size = <0x40000>; /* L2, 256K */
interrupt-parent = <&MPIC>;
interrupts = <0x10 0x2>;
};
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
interrupts = <0x2b 0x2>;
interrupt-parent = <&MPIC>;
dfsrr;
};
mdio@24520 { /* For TSECs */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
reg = <0x24520 0x20>;
PHY1: ethernet-phy@1 {
interrupt-parent = <&MPIC>;
reg = <0x1>;
device_type = "ethernet-phy";
};
PHY2: ethernet-phy@2 {
interrupt-parent = <&MPIC>;
reg = <0x2>;
device_type = "ethernet-phy";
};
};
enet0: ethernet@24000 {
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
/* Mac address filled in by bootwrapper */
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
interrupt-parent = <&MPIC>;
phy-handle = <&PHY1>;
};
enet1: ethernet@25000 {
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <0x25000 0x1000>;
/* Mac address filled in by bootwrapper */
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
interrupt-parent = <&MPIC>;
phy-handle = <&PHY2>;
};
MPIC: pic@40000 {
#address-cells = <0>;
#interrupt-cells = <2>;
interrupt-controller;
reg = <0x40000 0x40000>;
device_type = "open-pic";
};
cpm@919c0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
reg = <0x919c0 0x30>;
ranges;
muram@80000 {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x80000 0x10000>;
data@0 {
compatible = "fsl,cpm-muram-data";
reg = <0x0 0x4000 0x9000 0x2000>;
};
};
brg@919f0 {
compatible = "fsl,mpc8560-brg",
"fsl,cpm2-brg",
"fsl,cpm-brg";
reg = <0x919f0 0x10 0x915f0 0x10>;
clock-frequency = <165000000>; /* 166MHz */
};
CPMPIC: pic@90c00 {
#address-cells = <0>;
#interrupt-cells = <2>;
interrupt-controller;
interrupts = <0x2e 0x2>;
interrupt-parent = <&MPIC>;
reg = <0x90c00 0x80>;
compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
};
serial@91a00 {
device_type = "serial";
compatible = "fsl,mpc8560-scc-uart",
"fsl,cpm2-scc-uart";
reg = <0x91a00 0x20 0x88000 0x100>;
fsl,cpm-brg = <1>;
fsl,cpm-command = <0x800000>;
current-speed = <0x1c200>;
interrupts = <0x28 0x8>;
interrupt-parent = <&CPMPIC>;
};
serial@91a20 {
device_type = "serial";
compatible = "fsl,mpc8560-scc-uart",
"fsl,cpm2-scc-uart";
reg = <0x91a20 0x20 0x88100 0x100>;
fsl,cpm-brg = <2>;
fsl,cpm-command = <0x4a00000>;
current-speed = <0x1c200>;
interrupts = <0x29 0x8>;
interrupt-parent = <&CPMPIC>;
};
mdio@90d00 { /* For FCCs */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,cpm2-mdio-bitbang";
reg = <0x90d00 0x14>;
fsl,mdio-pin = <24>;
fsl,mdc-pin = <25>;
PHY0: ethernet-phy@0 {
interrupt-parent = <&MPIC>;
reg = <0x0>;
device_type = "ethernet-phy";
};
};
enet2: ethernet@91300 {
device_type = "network";
compatible = "fsl,mpc8560-fcc-enet",
"fsl,cpm2-fcc-enet";
reg = <0x91300 0x20 0x88400 0x100 0x91390 0x1>;
/* Mac address filled in by bootwrapper */
local-mac-address = [ 00 00 00 00 00 00 ];
fsl,cpm-command = <0x12000300>;
interrupts = <0x20 0x8>;
interrupt-parent = <&CPMPIC>;
phy-handle = <&PHY0>;
};
};
};
localbus@fdf05000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,mpc8560-localbus";
reg = <0xfdf05000 0x68>;
ranges = <0x0 0x0 0xe0000000 0x00800000
0x4 0x0 0xe8080000 0x00080000>;
flash@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec-flash";
reg = <0x0 0x0 0x800000>;
bank-width = <0x2>;
partition@0 {
label = "Primary Kernel";
reg = <0x0 0x180000>;
};
partition@180000 {
label = "Primary Filesystem";
reg = <0x180000 0x580000>;
};
partition@700000 {
label = "Monitor";
reg = <0x300000 0x100000>;
read-only;
};
};
cpld@4,0 {
compatible = "emerson,KSI8560-cpld";
reg = <0x4 0x0 0x80000>;
};
};
chosen {
linux,stdout-path = "/soc/cpm/serial@91a00";
};
};
......@@ -7,6 +7,7 @@
* Based on sandpoint.dts
*
* 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
* Copyright 2008 Freescale Semiconductor, Inc.
*
* This file is licensed under
* the terms of the GNU General Public License version 2. This program
......@@ -17,6 +18,8 @@ XXXX add flash parts, rtc, ??
*/
/dts-v1/;
/ {
model = "KuroboxHD";
compatible = "linkstation";
......@@ -35,19 +38,19 @@ cpus {
PowerPC,603e { /* Really 8241 */
device_type = "cpu";
reg = <0>;
clock-frequency = <bebc200>; /* Fixed by bootloader */
timebase-frequency = <1743000>; /* Fixed by bootloader */
reg = <0x0>;
clock-frequency = <200000000>; /* Fixed by bootloader */
timebase-frequency = <24391680>; /* Fixed by bootloader */
bus-frequency = <0>; /* Fixed by bootloader */
/* Following required by dtc but not used */
i-cache-size = <4000>;
d-cache-size = <4000>;
i-cache-size = <0x4000>;
d-cache-size = <0x4000>;
};
};
memory {
device_type = "memory";
reg = <00000000 04000000>;
reg = <0x0 0x4000000>;
};
soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
......@@ -56,26 +59,26 @@ soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
device_type = "soc";
compatible = "mpc10x";
store-gathering = <0>; /* 0 == off, !0 == on */
reg = <80000000 00100000>;
ranges = <80000000 80000000 70000000 /* pci mem space */
fc000000 fc000000 00100000 /* EUMB */
fe000000 fe000000 00c00000 /* pci i/o space */
fec00000 fec00000 00300000 /* pci cfg regs */
fef00000 fef00000 00100000>; /* pci iack */
reg = <0x80000000 0x100000>;
ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
0xfc000000 0xfc000000 0x100000 /* EUMB */
0xfe000000 0xfe000000 0xc00000 /* pci i/o space */
0xfec00000 0xfec00000 0x300000 /* pci cfg regs */
0xfef00000 0xfef00000 0x100000>; /* pci iack */
i2c@80003000 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
reg = <80003000 1000>;
reg = <0x80003000 0x1000>;
interrupts = <5 2>;
interrupt-parent = <&mpic>;
rtc@32 {
device_type = "rtc";
compatible = "ricoh,rs5c372a";
reg = <32>;
reg = <0x32>;
};
};
......@@ -83,9 +86,9 @@ serial0: serial@80004500 {
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <80004500 8>;
clock-frequency = <5d08d88>;
current-speed = <2580>;
reg = <0x80004500 0x8>;
clock-frequency = <97553800>;
current-speed = <9600>;
interrupts = <9 0>;
interrupt-parent = <&mpic>;
};
......@@ -94,10 +97,10 @@ serial1: serial@80004600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <80004600 8>;
clock-frequency = <5d08d88>;
current-speed = <e100>;
interrupts = <a 0>;
reg = <0x80004600 0x8>;
clock-frequency = <97553800>;
current-speed = <57600>;
interrupts = <10 0>;
interrupt-parent = <&mpic>;
};
......@@ -107,7 +110,7 @@ mpic: interrupt-controller@80040000 {
device_type = "open-pic";
compatible = "chrp,open-pic";
interrupt-controller;
reg = <80040000 40000>;
reg = <0x80040000 0x40000>;
};
pci0: pci@fec00000 {
......@@ -116,29 +119,29 @@ pci0: pci@fec00000 {
#interrupt-cells = <1>;
device_type = "pci";
compatible = "mpc10x-pci";
reg = <fec00000 400000>;
ranges = <01000000 0 0 fe000000 0 00c00000
02000000 0 80000000 80000000 0 70000000>;
bus-range = <0 ff>;
clock-frequency = <7f28155>;
reg = <0xfec00000 0x400000>;
ranges = <0x1000000 0x0 0x0 0xfe000000 0x0 0xc00000
0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
bus-range = <0 255>;
clock-frequency = <133333333>;
interrupt-parent = <&mpic>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 11 - IRQ0 ETH */
5800 0 0 1 &mpic 0 1
5800 0 0 2 &mpic 1 1
5800 0 0 3 &mpic 2 1
5800 0 0 4 &mpic 3 1
0x5800 0x0 0x0 0x1 &mpic 0x0 0x1
0x5800 0x0 0x0 0x2 &mpic 0x1 0x1
0x5800 0x0 0x0 0x3 &mpic 0x2 0x1
0x5800 0x0 0x0 0x4 &mpic 0x3 0x1
/* IDSEL 12 - IRQ1 IDE0 */
6000 0 0 1 &mpic 1 1
6000 0 0 2 &mpic 2 1
6000 0 0 3 &mpic 3 1
6000 0 0 4 &mpic 0 1
0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
0x6000 0x0 0x0 0x4 &mpic 0x0 0x1
/* IDSEL 14 - IRQ3 USB2.0 */
7000 0 0 1 &mpic 3 1
7000 0 0 2 &mpic 3 1
7000 0 0 3 &mpic 3 1
7000 0 0 4 &mpic 3 1
0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
0x7000 0x0 0x0 0x2 &mpic 0x3 0x1
0x7000 0x0 0x0 0x3 &mpic 0x3 0x1
0x7000 0x0 0x0 0x4 &mpic 0x3 0x1
>;
};
};
......
......@@ -7,6 +7,7 @@
* Based on sandpoint.dts
*
* 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
* Copyright 2008 Freescale Semiconductor, Inc.
*
* This file is licensed under
* the terms of the GNU General Public License version 2. This program
......@@ -17,6 +18,8 @@ XXXX add flash parts, rtc, ??
*/
/dts-v1/;
/ {
model = "KuroboxHG";
compatible = "linkstation";
......@@ -35,19 +38,19 @@ cpus {
PowerPC,603e { /* Really 8241 */
device_type = "cpu";
reg = <0>;
clock-frequency = <fdad680>; /* Fixed by bootloader */
timebase-frequency = <1F04000>; /* Fixed by bootloader */
reg = <0x0>;
clock-frequency = <266000000>; /* Fixed by bootloader */
timebase-frequency = <32522240>; /* Fixed by bootloader */
bus-frequency = <0>; /* Fixed by bootloader */
/* Following required by dtc but not used */
i-cache-size = <4000>;
d-cache-size = <4000>;
i-cache-size = <0x4000>;
d-cache-size = <0x4000>;
};
};
memory {
device_type = "memory";
reg = <00000000 08000000>;
reg = <0x0 0x8000000>;
};
soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
......@@ -56,26 +59,26 @@ soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
device_type = "soc";
compatible = "mpc10x";
store-gathering = <0>; /* 0 == off, !0 == on */
reg = <80000000 00100000>;
ranges = <80000000 80000000 70000000 /* pci mem space */
fc000000 fc000000 00100000 /* EUMB */
fe000000 fe000000 00c00000 /* pci i/o space */
fec00000 fec00000 00300000 /* pci cfg regs */
fef00000 fef00000 00100000>; /* pci iack */
reg = <0x80000000 0x100000>;
ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
0xfc000000 0xfc000000 0x100000 /* EUMB */
0xfe000000 0xfe000000 0xc00000 /* pci i/o space */
0xfec00000 0xfec00000 0x300000 /* pci cfg regs */
0xfef00000 0xfef00000 0x100000>; /* pci iack */
i2c@80003000 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
reg = <80003000 1000>;
reg = <0x80003000 0x1000>;
interrupts = <5 2>;
interrupt-parent = <&mpic>;
rtc@32 {
device_type = "rtc";
compatible = "ricoh,rs5c372a";
reg = <32>;
reg = <0x32>;
};
};
......@@ -83,9 +86,9 @@ serial0: serial@80004500 {
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <80004500 8>;
clock-frequency = <7c044a8>;
current-speed = <2580>;
reg = <0x80004500 0x8>;
clock-frequency = <130041000>;
current-speed = <9600>;
interrupts = <9 0>;
interrupt-parent = <&mpic>;
};
......@@ -94,10 +97,10 @@ serial1: serial@80004600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <80004600 8>;
clock-frequency = <7c044a8>;
current-speed = <e100>;
interrupts = <a 0>;
reg = <0x80004600 0x8>;
clock-frequency = <130041000>;
current-speed = <57600>;
interrupts = <10 0>;
interrupt-parent = <&mpic>;
};
......@@ -107,7 +110,7 @@ mpic: interrupt-controller@80040000 {
device_type = "open-pic";
compatible = "chrp,open-pic";
interrupt-controller;
reg = <80040000 40000>;
reg = <0x80040000 0x40000>;
};
pci0: pci@fec00000 {
......@@ -116,29 +119,29 @@ pci0: pci@fec00000 {
#interrupt-cells = <1>;
device_type = "pci";
compatible = "mpc10x-pci";
reg = <fec00000 400000>;
ranges = <01000000 0 0 fe000000 0 00c00000
02000000 0 80000000 80000000 0 70000000>;
bus-range = <0 ff>;
clock-frequency = <7f28155>;
reg = <0xfec00000 0x400000>;
ranges = <0x1000000 0x0 0x0 0xfe000000 0x0 0xc00000
0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
bus-range = <0 255>;
clock-frequency = <133333333>;
interrupt-parent = <&mpic>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 11 - IRQ0 ETH */
5800 0 0 1 &mpic 0 1
5800 0 0 2 &mpic 1 1
5800 0 0 3 &mpic 2 1
5800 0 0 4 &mpic 3 1
0x5800 0x0 0x0 0x1 &mpic 0x0 0x1
0x5800 0x0 0x0 0x2 &mpic 0x1 0x1
0x5800 0x0 0x0 0x3 &mpic 0x2 0x1
0x5800 0x0 0x0 0x4 &mpic 0x3 0x1
/* IDSEL 12 - IRQ1 IDE0 */
6000 0 0 1 &mpic 1 1
6000 0 0 2 &mpic 2 1
6000 0 0 3 &mpic 3 1
6000 0 0 4 &mpic 0 1
0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
0x6000 0x0 0x0 0x4 &mpic 0x0 0x1
/* IDSEL 14 - IRQ3 USB2.0 */
7000 0 0 1 &mpic 3 1
7000 0 0 2 &mpic 3 1
7000 0 0 3 &mpic 3 1
7000 0 0 4 &mpic 3 1
0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
0x7000 0x0 0x0 0x2 &mpic 0x3 0x1
0x7000 0x0 0x0 0x3 &mpic 0x3 0x1
0x7000 0x0 0x0 0x4 &mpic 0x3 0x1
>;
};
};
......
......@@ -219,7 +219,7 @@ EMAC0: ethernet@ef600900 {
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <5dc>;
max-frame-size = <2328>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "rgmii";
......@@ -247,7 +247,7 @@ EMAC1: ethernet@ef600a00 {
mal-tx-channel = <1>;
mal-rx-channel = <1>;
cell-index = <1>;
max-frame-size = <5dc>;
max-frame-size = <2328>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "rgmii";
......
/*
* MPC7448HPC2 (Taiga) board Device Tree Source
*
* Copyright 2006 Freescale Semiconductor Inc.
* Copyright 2006, 2008 Freescale Semiconductor Inc.
* 2006 Roy Zang <Roy Zang at freescale.com>.
*
* This program is free software; you can redistribute it and/or modify it
......@@ -10,6 +10,7 @@
* option) any later version.
*/
/dts-v1/;
/ {
model = "mpc7448hpc2";
......@@ -23,11 +24,11 @@ cpus {
PowerPC,7448@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <20>; // 32 bytes
i-cache-line-size = <20>; // 32 bytes
d-cache-size = <8000>; // L1, 32K bytes
i-cache-size = <8000>; // L1, 32K bytes
reg = <0x0>;
d-cache-line-size = <32>; // 32 bytes
i-cache-line-size = <32>; // 32 bytes
d-cache-size = <0x8000>; // L1, 32K bytes
i-cache-size = <0x8000>; // L1, 32K bytes
timebase-frequency = <0>; // 33 MHz, from uboot
clock-frequency = <0>; // From U-Boot
bus-frequency = <0>; // From U-Boot
......@@ -36,7 +37,7 @@ PowerPC,7448@0 {
memory {
device_type = "memory";
reg = <00000000 20000000 // DDR2 512M at 0
reg = <0x0 0x20000000 // DDR2 512M at 0
>;
};
......@@ -44,14 +45,14 @@ tsi108@c0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "tsi-bridge";
ranges = <00000000 c0000000 00010000>;
reg = <c0000000 00010000>;
ranges = <0x0 0xc0000000 0x10000>;
reg = <0xc0000000 0x10000>;
bus-frequency = <0>;
i2c@7000 {
interrupt-parent = <&mpic>;
interrupts = <E 0>;
reg = <7000 400>;
interrupts = <14 0>;
reg = <0x7000 0x400>;
device_type = "i2c";
compatible = "tsi108-i2c";
};
......@@ -59,20 +60,20 @@ i2c@7000 {
MDIO: mdio@6000 {
device_type = "mdio";
compatible = "tsi108-mdio";
reg = <6000 50>;
reg = <0x6000 0x50>;
#address-cells = <1>;
#size-cells = <0>;
phy8: ethernet-phy@8 {
interrupt-parent = <&mpic>;
interrupts = <2 1>;
reg = <8>;
reg = <0x8>;
};
phy9: ethernet-phy@9 {
interrupt-parent = <&mpic>;
interrupts = <2 1>;
reg = <9>;
reg = <0x9>;
};
};
......@@ -82,9 +83,9 @@ ethernet@6200 {
#size-cells = <0>;
device_type = "network";
compatible = "tsi108-ethernet";
reg = <6000 200>;
reg = <0x6000 0x200>;
address = [ 00 06 D2 00 00 01 ];
interrupts = <10 2>;
interrupts = <16 2>;
interrupt-parent = <&mpic>;
mdio-handle = <&MDIO>;
phy-handle = <&phy8>;
......@@ -96,9 +97,9 @@ ethernet@6600 {
#size-cells = <0>;
device_type = "network";
compatible = "tsi108-ethernet";
reg = <6400 200>;
reg = <0x6400 0x200>;
address = [ 00 06 D2 00 00 02 ];
interrupts = <11 2>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
mdio-handle = <&MDIO>;
phy-handle = <&phy9>;
......@@ -107,18 +108,18 @@ ethernet@6600 {
serial@7808 {
device_type = "serial";
compatible = "ns16550";
reg = <7808 200>;
clock-frequency = <3f6b5a00>;
interrupts = <c 0>;
reg = <0x7808 0x200>;
clock-frequency = <1064000000>;
interrupts = <12 0>;
interrupt-parent = <&mpic>;
};
serial@7c08 {
device_type = "serial";
compatible = "ns16550";
reg = <7c08 200>;
clock-frequency = <3f6b5a00>;
interrupts = <d 0>;
reg = <0x7c08 0x200>;
clock-frequency = <1064000000>;
interrupts = <13 0>;
interrupt-parent = <&mpic>;
};
......@@ -127,7 +128,7 @@ mpic: pic@7400 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <7400 400>;
reg = <0x7400 0x400>;
compatible = "chrp,open-pic";
device_type = "open-pic";
big-endian;
......@@ -138,39 +139,39 @@ pci@1000 {
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <1000 1000>;
reg = <0x1000 0x1000>;
bus-range = <0 0>;
ranges = <02000000 0 e0000000 e0000000 0 1A000000
01000000 0 00000000 fa000000 0 00010000>;
clock-frequency = <7f28154>;
ranges = <0x2000000 0x0 0xe0000000 0xe0000000 0x0 0x1a000000
0x1000000 0x0 0x0 0xfa000000 0x0 0x10000>;
clock-frequency = <133333332>;
interrupt-parent = <&mpic>;
interrupts = <17 2>;
interrupt-map-mask = <f800 0 0 7>;
interrupts = <23 2>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 */
0800 0 0 1 &RT0 24 0
0800 0 0 2 &RT0 25 0
0800 0 0 3 &RT0 26 0
0800 0 0 4 &RT0 27 0
0x800 0x0 0x0 0x1 &RT0 0x24 0x0
0x800 0x0 0x0 0x2 &RT0 0x25 0x0
0x800 0x0 0x0 0x3 &RT0 0x26 0x0
0x800 0x0 0x0 0x4 &RT0 0x27 0x0
/* IDSEL 0x12 */
1000 0 0 1 &RT0 25 0
1000 0 0 2 &RT0 26 0
1000 0 0 3 &RT0 27 0
1000 0 0 4 &RT0 24 0
0x1000 0x0 0x0 0x1 &RT0 0x25 0x0
0x1000 0x0 0x0 0x2 &RT0 0x26 0x0
0x1000 0x0 0x0 0x3 &RT0 0x27 0x0
0x1000 0x0 0x0 0x4 &RT0 0x24 0x0
/* IDSEL 0x13 */
1800 0 0 1 &RT0 26 0
1800 0 0 2 &RT0 27 0
1800 0 0 3 &RT0 24 0
1800 0 0 4 &RT0 25 0
0x1800 0x0 0x0 0x1 &RT0 0x26 0x0
0x1800 0x0 0x0 0x2 &RT0 0x27 0x0
0x1800 0x0 0x0 0x3 &RT0 0x24 0x0
0x1800 0x0 0x0 0x4 &RT0 0x25 0x0
/* IDSEL 0x14 */
2000 0 0 1 &RT0 27 0
2000 0 0 2 &RT0 24 0
2000 0 0 3 &RT0 25 0
2000 0 0 4 &RT0 26 0
0x2000 0x0 0x0 0x1 &RT0 0x27 0x0
0x2000 0x0 0x0 0x2 &RT0 0x24 0x0
0x2000 0x0 0x0 0x3 &RT0 0x25 0x0
0x2000 0x0 0x0 0x4 &RT0 0x26 0x0
>;
RT0: router@1180 {
......@@ -180,7 +181,7 @@ RT0: router@1180 {
#address-cells = <0>;
#interrupt-cells = <2>;
big-endian;
interrupts = <17 2>;
interrupts = <23 2>;
interrupt-parent = <&mpic>;
};
};
......
/*
* MPC8272 ADS Device Tree Source
*
* Copyright 2005 Freescale Semiconductor Inc.
* Copyright 2005,2008 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
......@@ -9,6 +9,8 @@
* option) any later version.
*/
/dts-v1/;
/ {
model = "MPC8272ADS";
compatible = "fsl,mpc8272ads";
......@@ -21,11 +23,11 @@ cpus {
PowerPC,8272@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <d#32>;
i-cache-line-size = <d#32>;
d-cache-size = <d#16384>;
i-cache-size = <d#16384>;
reg = <0x0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <16384>;
i-cache-size = <16384>;
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
......@@ -34,7 +36,7 @@ PowerPC,8272@0 {
memory {
device_type = "memory";
reg = <0 0>;
reg = <0x0 0x0>;
};
localbus@f0010100 {
......@@ -42,21 +44,21 @@ localbus@f0010100 {
"fsl,pq2-localbus";
#address-cells = <2>;
#size-cells = <1>;
reg = <f0010100 40>;
reg = <0xf0010100 0x40>;
ranges = <0 0 fe000000 02000000
1 0 f4500000 00008000
3 0 f8200000 00008000>;
ranges = <0x0 0x0 0xfe000000 0x2000000
0x1 0x0 0xf4500000 0x8000
0x3 0x0 0xf8200000 0x8000>;
flash@0,0 {
compatible = "jedec-flash";
reg = <0 0 2000000>;
reg = <0x0 0x0 0x2000000>;
bank-width = <4>;
device-width = <1>;
};
board-control@1,0 {
reg = <1 0 20>;
reg = <0x1 0x0 0x20>;
compatible = "fsl,mpc8272ads-bcsr";
};
......@@ -65,46 +67,46 @@ PCI_PIC: interrupt-controller@3,0 {
"fsl,pq2ads-pci-pic";
#interrupt-cells = <1>;
interrupt-controller;
reg = <3 0 8>;
reg = <0x3 0x0 0x8>;
interrupt-parent = <&PIC>;
interrupts = <14 8>;
interrupts = <20 8>;
};
};
pci@f0010800 {
device_type = "pci";
reg = <f0010800 10c f00101ac 8 f00101c4 8>;
reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
compatible = "fsl,mpc8272-pci", "fsl,pq2-pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
clock-frequency = <d#66666666>;
interrupt-map-mask = <f800 0 0 7>;
clock-frequency = <66666666>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x16 */
b000 0 0 1 &PCI_PIC 0
b000 0 0 2 &PCI_PIC 1
b000 0 0 3 &PCI_PIC 2
b000 0 0 4 &PCI_PIC 3
0xb000 0x0 0x0 0x1 &PCI_PIC 0
0xb000 0x0 0x0 0x2 &PCI_PIC 1
0xb000 0x0 0x0 0x3 &PCI_PIC 2
0xb000 0x0 0x0 0x4 &PCI_PIC 3
/* IDSEL 0x17 */
b800 0 0 1 &PCI_PIC 4
b800 0 0 2 &PCI_PIC 5
b800 0 0 3 &PCI_PIC 6
b800 0 0 4 &PCI_PIC 7
0xb800 0x0 0x0 0x1 &PCI_PIC 4
0xb800 0x0 0x0 0x2 &PCI_PIC 5
0xb800 0x0 0x0 0x3 &PCI_PIC 6
0xb800 0x0 0x0 0x4 &PCI_PIC 7
/* IDSEL 0x18 */
c000 0 0 1 &PCI_PIC 8
c000 0 0 2 &PCI_PIC 9
c000 0 0 3 &PCI_PIC a
c000 0 0 4 &PCI_PIC b>;
0xc000 0x0 0x0 0x1 &PCI_PIC 8
0xc000 0x0 0x0 0x2 &PCI_PIC 9
0xc000 0x0 0x0 0x3 &PCI_PIC 10
0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
interrupt-parent = <&PIC>;
interrupts = <12 8>;
ranges = <42000000 0 80000000 80000000 0 20000000
02000000 0 a0000000 a0000000 0 20000000
01000000 0 00000000 f6000000 0 02000000>;
interrupts = <18 8>;
ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
};
soc@f0000000 {
......@@ -112,26 +114,26 @@ soc@f0000000 {
#size-cells = <1>;
device_type = "soc";
compatible = "fsl,mpc8272", "fsl,pq2-soc";
ranges = <00000000 f0000000 00053000>;
ranges = <0x0 0xf0000000 0x53000>;
// Temporary -- will go away once kernel uses ranges for get_immrbase().
reg = <f0000000 00053000>;
reg = <0xf0000000 0x53000>;
cpm@119c0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
reg = <119c0 30>;
reg = <0x119c0 0x30>;
ranges;
muram@0 {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 10000>;
ranges = <0x0 0x0 0x10000>;
data@0 {
compatible = "fsl,cpm-muram-data";
reg = <0 2000 9800 800>;
reg = <0x0 0x2000 0x9800 0x800>;
};
};
......@@ -139,29 +141,29 @@ brg@119f0 {
compatible = "fsl,mpc8272-brg",
"fsl,cpm2-brg",
"fsl,cpm-brg";
reg = <119f0 10 115f0 10>;
reg = <0x119f0 0x10 0x115f0 0x10>;
};
serial@11a00 {
device_type = "serial";
compatible = "fsl,mpc8272-scc-uart",
"fsl,cpm2-scc-uart";
reg = <11a00 20 8000 100>;
interrupts = <28 8>;
reg = <0x11a00 0x20 0x8000 0x100>;
interrupts = <40 8>;
interrupt-parent = <&PIC>;
fsl,cpm-brg = <1>;
fsl,cpm-command = <00800000>;
fsl,cpm-command = <0x800000>;
};
serial@11a60 {
device_type = "serial";
compatible = "fsl,mpc8272-scc-uart",
"fsl,cpm2-scc-uart";
reg = <11a60 20 8300 100>;
interrupts = <2b 8>;
reg = <0x11a60 0x20 0x8300 0x100>;
interrupts = <43 8>;
interrupt-parent = <&PIC>;
fsl,cpm-brg = <4>;
fsl,cpm-command = <0ce00000>;
fsl,cpm-command = <0xce00000>;
};
mdio@10d40 {
......@@ -169,23 +171,23 @@ mdio@10d40 {
compatible = "fsl,mpc8272ads-mdio-bitbang",
"fsl,mpc8272-mdio-bitbang",
"fsl,cpm2-mdio-bitbang";
reg = <10d40 14>;
reg = <0x10d40 0x14>;
#address-cells = <1>;
#size-cells = <0>;
fsl,mdio-pin = <12>;
fsl,mdc-pin = <13>;
fsl,mdio-pin = <18>;
fsl,mdc-pin = <19>;
PHY0: ethernet-phy@0 {
interrupt-parent = <&PIC>;
interrupts = <17 8>;
reg = <0>;
interrupts = <23 8>;
reg = <0x0>;
device_type = "ethernet-phy";
};
PHY1: ethernet-phy@1 {
interrupt-parent = <&PIC>;
interrupts = <17 8>;
reg = <3>;
interrupts = <23 8>;
reg = <0x3>;
device_type = "ethernet-phy";
};
};
......@@ -194,33 +196,33 @@ ethernet@11300 {
device_type = "network";
compatible = "fsl,mpc8272-fcc-enet",
"fsl,cpm2-fcc-enet";
reg = <11300 20 8400 100 11390 1>;
reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <20 8>;
interrupts = <32 8>;
interrupt-parent = <&PIC>;
phy-handle = <&PHY0>;
linux,network-index = <0>;
fsl,cpm-command = <12000300>;
fsl,cpm-command = <0x12000300>;
};
ethernet@11320 {
device_type = "network";
compatible = "fsl,mpc8272-fcc-enet",
"fsl,cpm2-fcc-enet";
reg = <11320 20 8500 100 113b0 1>;
reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <21 8>;
interrupts = <33 8>;
interrupt-parent = <&PIC>;
phy-handle = <&PHY1>;
linux,network-index = <1>;
fsl,cpm-command = <16200300>;
fsl,cpm-command = <0x16200300>;
};
};
PIC: interrupt-controller@10c00 {
#interrupt-cells = <2>;
interrupt-controller;
reg = <10c00 80>;
reg = <0x10c00 0x80>;
compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
};
......@@ -232,14 +234,14 @@ crypto@30000 {
"fsl,talitos-sec2",
"fsl,talitos",
"talitos";
reg = <30000 10000>;
interrupts = <b 8>;
reg = <0x30000 0x10000>;
interrupts = <11 8>;
interrupt-parent = <&PIC>;
num-channels = <4>;
channel-fifo-len = <18>;
exec-units-mask = <0000007e>;
channel-fifo-len = <24>;
exec-units-mask = <0x7e>;
/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
descriptor-types-mask = <01010ebf>;
descriptor-types-mask = <0x1010ebf>;
};
};
......
......@@ -255,9 +255,7 @@ usb@6c0 {
enet0: ucc@2200 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
cell-index = <3>;
device-id = <3>;
reg = <0x2200 0x200>;
interrupts = <34>;
interrupt-parent = <&qeic>;
......@@ -271,9 +269,7 @@ enet0: ucc@2200 {
enet1: ucc@3200 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
cell-index = <4>;
device-id = <4>;
reg = <0x3200 0x200>;
interrupts = <35>;
interrupt-parent = <&qeic>;
......@@ -287,8 +283,7 @@ enet1: ucc@3200 {
ucc@2400 {
device_type = "serial";
compatible = "ucc_uart";
model = "UCC";
device-id = <5>; /* The UCC number, 1-7*/
cell-index = <5>; /* The UCC number, 1-7*/
port-number = <0>; /* Which ttyQEx device */
soft-uart; /* We need Soft-UART */
reg = <0x2400 0x200>;
......
......@@ -208,9 +208,7 @@ spi@500 {
enet0: ucc@3000 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
cell-index = <2>;
device-id = <2>;
reg = <0x3000 0x200>;
interrupts = <33>;
interrupt-parent = <&qeic>;
......@@ -224,9 +222,7 @@ enet0: ucc@3000 {
enet1: ucc@2200 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
cell-index = <3>;
device-id = <3>;
reg = <0x2200 0x200>;
interrupts = <34>;
interrupt-parent = <&qeic>;
......
......@@ -257,9 +257,7 @@ usb@6c0 {
enet0: ucc@2000 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
cell-index = <1>;
device-id = <1>;
reg = <0x2000 0x200>;
interrupts = <32>;
interrupt-parent = <&qeic>;
......@@ -274,9 +272,7 @@ enet0: ucc@2000 {
enet1: ucc@3000 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
cell-index = <2>;
device-id = <2>;
reg = <0x3000 0x200>;
interrupts = <33>;
interrupt-parent = <&qeic>;
......
/*
* MPC8540 ADS Device Tree Source
*
* Copyright 2006 Freescale Semiconductor Inc.
* Copyright 2006, 2008 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
......@@ -9,6 +9,7 @@
* option) any later version.
*/
/dts-v1/;
/ {
model = "MPC8540ADS";
......@@ -31,11 +32,11 @@ cpus {
PowerPC,8540@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <20>; // 32 bytes
i-cache-line-size = <20>; // 32 bytes
d-cache-size = <8000>; // L1, 32K
i-cache-size = <8000>; // L1, 32K
reg = <0x0>;
d-cache-line-size = <32>; // 32 bytes
i-cache-line-size = <32>; // 32 bytes
d-cache-size = <0x8000>; // L1, 32K
i-cache-size = <0x8000>; // L1, 32K
timebase-frequency = <0>; // 33 MHz, from uboot
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
......@@ -44,31 +45,31 @@ PowerPC,8540@0 {
memory {
device_type = "memory";
reg = <00000000 08000000>; // 128M at 0x0
reg = <0x0 0x8000000>; // 128M at 0x0
};
soc8540@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
ranges = <0 e0000000 00100000>;
reg = <e0000000 00100000>; // CCSRBAR 1M
ranges = <0x0 0xe0000000 0x100000>;
reg = <0xe0000000 0x100000>; // CCSRBAR 1M
bus-frequency = <0>;
memory-controller@2000 {
compatible = "fsl,8540-memory-controller";
reg = <2000 1000>;
reg = <0x2000 0x1000>;
interrupt-parent = <&mpic>;
interrupts = <12 2>;
interrupts = <18 2>;
};
l2-cache-controller@20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <20000 1000>;
cache-line-size = <20>; // 32 bytes
cache-size = <40000>; // L2, 256K
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
cache-size = <0x40000>; // L2, 256K
interrupt-parent = <&mpic>;
interrupts = <10 2>;
interrupts = <16 2>;
};
i2c@3000 {
......@@ -76,8 +77,8 @@ i2c@3000 {
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <2b 2>;
reg = <0x3000 0x100>;
interrupts = <43 2>;
interrupt-parent = <&mpic>;
dfsrr;
};
......@@ -86,24 +87,24 @@ mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
reg = <24520 20>;
reg = <0x24520 0x20>;
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <5 1>;
reg = <0>;
reg = <0x0>;
device_type = "ethernet-phy";
};
phy1: ethernet-phy@1 {
interrupt-parent = <&mpic>;
interrupts = <5 1>;
reg = <1>;
reg = <0x1>;
device_type = "ethernet-phy";
};
phy3: ethernet-phy@3 {
interrupt-parent = <&mpic>;
interrupts = <7 1>;
reg = <3>;
reg = <0x3>;
device_type = "ethernet-phy";
};
};
......@@ -113,9 +114,9 @@ enet0: ethernet@24000 {
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <24000 1000>;
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <1d 2 1e 2 22 2>;
interrupts = <29 2 30 2 34 2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy0>;
};
......@@ -125,9 +126,9 @@ enet1: ethernet@25000 {
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <25000 1000>;
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <23 2 24 2 28 2>;
interrupts = <35 2 36 2 40 2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy1>;
};
......@@ -137,9 +138,9 @@ enet2: ethernet@26000 {
device_type = "network";
model = "FEC";
compatible = "gianfar";
reg = <26000 1000>;
reg = <0x26000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <29 2>;
interrupts = <41 2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy3>;
};
......@@ -148,9 +149,9 @@ serial0: serial@4500 {
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>; // reg base, size
reg = <0x4500 0x100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <2a 2>;
interrupts = <42 2>;
interrupt-parent = <&mpic>;
};
......@@ -158,9 +159,9 @@ serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>; // reg base, size
reg = <0x4600 0x100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <2a 2>;
interrupts = <42 2>;
interrupt-parent = <&mpic>;
};
mpic: pic@40000 {
......@@ -168,7 +169,7 @@ mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <40000 40000>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
big-endian;
......@@ -177,90 +178,90 @@ mpic: pic@40000 {
pci0: pci@e0008000 {
cell-index = <0>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x02 */
1000 0 0 1 &mpic 1 1
1000 0 0 2 &mpic 2 1
1000 0 0 3 &mpic 3 1
1000 0 0 4 &mpic 4 1
0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
/* IDSEL 0x03 */
1800 0 0 1 &mpic 4 1
1800 0 0 2 &mpic 1 1
1800 0 0 3 &mpic 2 1
1800 0 0 4 &mpic 3 1
0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
/* IDSEL 0x04 */
2000 0 0 1 &mpic 3 1
2000 0 0 2 &mpic 4 1
2000 0 0 3 &mpic 1 1
2000 0 0 4 &mpic 2 1
0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
/* IDSEL 0x05 */
2800 0 0 1 &mpic 2 1
2800 0 0 2 &mpic 3 1
2800 0 0 3 &mpic 4 1
2800 0 0 4 &mpic 1 1
0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
0x2800 0x0 0x0 0x4 &mpic 0x1 0x1
/* IDSEL 0x0c */
6000 0 0 1 &mpic 1 1
6000 0 0 2 &mpic 2 1
6000 0 0 3 &mpic 3 1
6000 0 0 4 &mpic 4 1
0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
0x6000 0x0 0x0 0x4 &mpic 0x4 0x1
/* IDSEL 0x0d */
6800 0 0 1 &mpic 4 1
6800 0 0 2 &mpic 1 1
6800 0 0 3 &mpic 2 1
6800 0 0 4 &mpic 3 1
0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
0x6800 0x0 0x0 0x4 &mpic 0x3 0x1
/* IDSEL 0x0e */
7000 0 0 1 &mpic 3 1
7000 0 0 2 &mpic 4 1
7000 0 0 3 &mpic 1 1
7000 0 0 4 &mpic 2 1
0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
0x7000 0x0 0x0 0x4 &mpic 0x2 0x1
/* IDSEL 0x0f */
7800 0 0 1 &mpic 2 1
7800 0 0 2 &mpic 3 1
7800 0 0 3 &mpic 4 1
7800 0 0 4 &mpic 1 1
0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
0x7800 0x0 0x0 0x4 &mpic 0x1 0x1
/* IDSEL 0x12 */
9000 0 0 1 &mpic 1 1
9000 0 0 2 &mpic 2 1
9000 0 0 3 &mpic 3 1
9000 0 0 4 &mpic 4 1
0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
/* IDSEL 0x13 */
9800 0 0 1 &mpic 4 1
9800 0 0 2 &mpic 1 1
9800 0 0 3 &mpic 2 1
9800 0 0 4 &mpic 3 1
0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
0x9800 0x0 0x0 0x4 &mpic 0x3 0x1
/* IDSEL 0x14 */
a000 0 0 1 &mpic 3 1
a000 0 0 2 &mpic 4 1
a000 0 0 3 &mpic 1 1
a000 0 0 4 &mpic 2 1
0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
0xa000 0x0 0x0 0x4 &mpic 0x2 0x1
/* IDSEL 0x15 */
a800 0 0 1 &mpic 2 1
a800 0 0 2 &mpic 3 1
a800 0 0 3 &mpic 4 1
a800 0 0 4 &mpic 1 1>;
0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;
interrupt-parent = <&mpic>;
interrupts = <18 2>;
interrupts = <24 2>;
bus-range = <0 0>;
ranges = <02000000 0 80000000 80000000 0 20000000
01000000 0 00000000 e2000000 0 00100000>;
clock-frequency = <3f940aa>;
ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>;
clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <e0008000 1000>;
reg = <0xe0008000 0x1000>;
compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
device_type = "pci";
};
......
/*
* MPC8541 CDS Device Tree Source
*
* Copyright 2006 Freescale Semiconductor Inc.
* Copyright 2006, 2008 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
......@@ -9,6 +9,7 @@
* option) any later version.
*/
/dts-v1/;
/ {
model = "MPC8541CDS";
......@@ -31,11 +32,11 @@ cpus {
PowerPC,8541@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <20>; // 32 bytes
i-cache-line-size = <20>; // 32 bytes
d-cache-size = <8000>; // L1, 32K
i-cache-size = <8000>; // L1, 32K
reg = <0x0>;
d-cache-line-size = <32>; // 32 bytes
i-cache-line-size = <32>; // 32 bytes
d-cache-size = <0x8000>; // L1, 32K
i-cache-size = <0x8000>; // L1, 32K
timebase-frequency = <0>; // 33 MHz, from uboot
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
......@@ -44,31 +45,31 @@ PowerPC,8541@0 {
memory {
device_type = "memory";
reg = <00000000 08000000>; // 128M at 0x0
reg = <0x0 0x8000000>; // 128M at 0x0
};
soc8541@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
ranges = <0 e0000000 00100000>;
reg = <e0000000 00001000>; // CCSRBAR 1M
ranges = <0x0 0xe0000000 0x100000>;
reg = <0xe0000000 0x1000>; // CCSRBAR 1M
bus-frequency = <0>;
memory-controller@2000 {
compatible = "fsl,8541-memory-controller";
reg = <2000 1000>;
reg = <0x2000 0x1000>;
interrupt-parent = <&mpic>;
interrupts = <12 2>;
interrupts = <18 2>;
};
l2-cache-controller@20000 {
compatible = "fsl,8541-l2-cache-controller";
reg = <20000 1000>;
cache-line-size = <20>; // 32 bytes
cache-size = <40000>; // L2, 256K
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
cache-size = <0x40000>; // L2, 256K
interrupt-parent = <&mpic>;
interrupts = <10 2>;
interrupts = <16 2>;
};
i2c@3000 {
......@@ -76,8 +77,8 @@ i2c@3000 {
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <2b 2>;
reg = <0x3000 0x100>;
interrupts = <43 2>;
interrupt-parent = <&mpic>;
dfsrr;
};
......@@ -86,18 +87,18 @@ mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
reg = <24520 20>;
reg = <0x24520 0x20>;
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <5 1>;
reg = <0>;
reg = <0x0>;
device_type = "ethernet-phy";
};
phy1: ethernet-phy@1 {
interrupt-parent = <&mpic>;
interrupts = <5 1>;
reg = <1>;
reg = <0x1>;
device_type = "ethernet-phy";
};
};
......@@ -107,9 +108,9 @@ enet0: ethernet@24000 {
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <24000 1000>;
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <1d 2 1e 2 22 2>;
interrupts = <29 2 30 2 34 2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy0>;
};
......@@ -119,9 +120,9 @@ enet1: ethernet@25000 {
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <25000 1000>;
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <23 2 24 2 28 2>;
interrupts = <35 2 36 2 40 2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy1>;
};
......@@ -130,9 +131,9 @@ serial0: serial@4500 {
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>; // reg base, size
reg = <0x4500 0x100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <2a 2>;
interrupts = <42 2>;
interrupt-parent = <&mpic>;
};
......@@ -140,9 +141,9 @@ serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>; // reg base, size
reg = <0x4600 0x100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <2a 2>;
interrupts = <42 2>;
interrupt-parent = <&mpic>;
};
......@@ -151,7 +152,7 @@ mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <40000 40000>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
big-endian;
......@@ -161,17 +162,17 @@ cpm@919c0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8541-cpm", "fsl,cpm2";
reg = <919c0 30>;
reg = <0x919c0 0x30>;
ranges;
muram@80000 {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 80000 10000>;
ranges = <0x0 0x80000 0x10000>;
data@0 {
compatible = "fsl,cpm-muram-data";
reg = <0 2000 9000 1000>;
reg = <0x0 0x2000 0x9000 0x1000>;
};
};
......@@ -179,16 +180,16 @@ brg@919f0 {
compatible = "fsl,mpc8541-brg",
"fsl,cpm2-brg",
"fsl,cpm-brg";
reg = <919f0 10 915f0 10>;
reg = <0x919f0 0x10 0x915f0 0x10>;
};
cpmpic: pic@90c00 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
interrupts = <2e 2>;
interrupts = <46 2>;
interrupt-parent = <&mpic>;
reg = <90c00 80>;
reg = <0x90c00 0x80>;
compatible = "fsl,mpc8541-cpm-pic", "fsl,cpm2-pic";
};
};
......@@ -196,68 +197,68 @@ cpmpic: pic@90c00 {
pci0: pci@e0008000 {
cell-index = <0>;
interrupt-map-mask = <1f800 0 0 7>;
interrupt-map-mask = <0x1f800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x10 */
08000 0 0 1 &mpic 0 1
08000 0 0 2 &mpic 1 1
08000 0 0 3 &mpic 2 1
08000 0 0 4 &mpic 3 1
0x8000 0x0 0x0 0x1 &mpic 0x0 0x1
0x8000 0x0 0x0 0x2 &mpic 0x1 0x1
0x8000 0x0 0x0 0x3 &mpic 0x2 0x1
0x8000 0x0 0x0 0x4 &mpic 0x3 0x1
/* IDSEL 0x11 */
08800 0 0 1 &mpic 0 1
08800 0 0 2 &mpic 1 1
08800 0 0 3 &mpic 2 1
08800 0 0 4 &mpic 3 1
0x8800 0x0 0x0 0x1 &mpic 0x0 0x1
0x8800 0x0 0x0 0x2 &mpic 0x1 0x1
0x8800 0x0 0x0 0x3 &mpic 0x2 0x1
0x8800 0x0 0x0 0x4 &mpic 0x3 0x1
/* IDSEL 0x12 (Slot 1) */
09000 0 0 1 &mpic 0 1
09000 0 0 2 &mpic 1 1
09000 0 0 3 &mpic 2 1
09000 0 0 4 &mpic 3 1
0x9000 0x0 0x0 0x1 &mpic 0x0 0x1
0x9000 0x0 0x0 0x2 &mpic 0x1 0x1
0x9000 0x0 0x0 0x3 &mpic 0x2 0x1
0x9000 0x0 0x0 0x4 &mpic 0x3 0x1
/* IDSEL 0x13 (Slot 2) */
09800 0 0 1 &mpic 1 1
09800 0 0 2 &mpic 2 1
09800 0 0 3 &mpic 3 1
09800 0 0 4 &mpic 0 1
0x9800 0x0 0x0 0x1 &mpic 0x1 0x1
0x9800 0x0 0x0 0x2 &mpic 0x2 0x1
0x9800 0x0 0x0 0x3 &mpic 0x3 0x1
0x9800 0x0 0x0 0x4 &mpic 0x0 0x1
/* IDSEL 0x14 (Slot 3) */
0a000 0 0 1 &mpic 2 1
0a000 0 0 2 &mpic 3 1
0a000 0 0 3 &mpic 0 1
0a000 0 0 4 &mpic 1 1
0xa000 0x0 0x0 0x1 &mpic 0x2 0x1
0xa000 0x0 0x0 0x2 &mpic 0x3 0x1
0xa000 0x0 0x0 0x3 &mpic 0x0 0x1
0xa000 0x0 0x0 0x4 &mpic 0x1 0x1
/* IDSEL 0x15 (Slot 4) */
0a800 0 0 1 &mpic 3 1
0a800 0 0 2 &mpic 0 1
0a800 0 0 3 &mpic 1 1
0a800 0 0 4 &mpic 2 1
0xa800 0x0 0x0 0x1 &mpic 0x3 0x1
0xa800 0x0 0x0 0x2 &mpic 0x0 0x1
0xa800 0x0 0x0 0x3 &mpic 0x1 0x1
0xa800 0x0 0x0 0x4 &mpic 0x2 0x1
/* Bus 1 (Tundra Bridge) */
/* IDSEL 0x12 (ISA bridge) */
19000 0 0 1 &mpic 0 1
19000 0 0 2 &mpic 1 1
19000 0 0 3 &mpic 2 1
19000 0 0 4 &mpic 3 1>;
0x19000 0x0 0x0 0x1 &mpic 0x0 0x1
0x19000 0x0 0x0 0x2 &mpic 0x1 0x1
0x19000 0x0 0x0 0x3 &mpic 0x2 0x1
0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>;
interrupt-parent = <&mpic>;
interrupts = <18 2>;
interrupts = <24 2>;
bus-range = <0 0>;
ranges = <02000000 0 80000000 80000000 0 20000000
01000000 0 00000000 e2000000 0 00100000>;
clock-frequency = <3f940aa>;
ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>;
clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <e0008000 1000>;
reg = <0xe0008000 0x1000>;
compatible = "fsl,mpc8540-pci";
device_type = "pci";
i8259@19000 {
interrupt-controller;
device_type = "interrupt-controller";
reg = <19000 0 0 0 1>;
reg = <0x19000 0x0 0x0 0x0 0x1>;
#address-cells = <0>;
#interrupt-cells = <2>;
compatible = "chrp,iic";
......@@ -268,24 +269,24 @@ i8259@19000 {
pci1: pci@e0009000 {
cell-index = <1>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x15 */
a800 0 0 1 &mpic b 1
a800 0 0 2 &mpic b 1
a800 0 0 3 &mpic b 1
a800 0 0 4 &mpic b 1>;
0xa800 0x0 0x0 0x1 &mpic 0xb 0x1
0xa800 0x0 0x0 0x2 &mpic 0xb 0x1
0xa800 0x0 0x0 0x3 &mpic 0xb 0x1
0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>;
interrupt-parent = <&mpic>;
interrupts = <19 2>;
interrupts = <25 2>;
bus-range = <0 0>;
ranges = <02000000 0 a0000000 a0000000 0 20000000
01000000 0 00000000 e3000000 0 00100000>;
clock-frequency = <3f940aa>;
ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x0 0xe3000000 0x0 0x100000>;
clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <e0009000 1000>;
reg = <0xe0009000 0x1000>;
compatible = "fsl,mpc8540-pci";
device_type = "pci";
};
......
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......@@ -13,7 +13,7 @@
/ {
model = "MPC8641HPCN";
compatible = "mpc86xx";
compatible = "fsl,mpc8641hpcn";
#address-cells = <1>;
#size-cells = <1>;
......
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......@@ -254,7 +254,6 @@ RGMII0: emac-rgmii@ef601000 {
};
EMAC0: ethernet@ef600e00 {
linux,network-index = <0>;
device_type = "network";
compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
interrupt-parent = <&EMAC0>;
......@@ -270,7 +269,7 @@ EMAC0: ethernet@ef600e00 {
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <5dc>;
max-frame-size = <2328>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "rgmii";
......@@ -284,7 +283,6 @@ EMAC0: ethernet@ef600e00 {
};
EMAC1: ethernet@ef600f00 {
linux,network-index = <1>;
device_type = "network";
compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
interrupt-parent = <&EMAC1>;
......@@ -300,7 +298,7 @@ EMAC1: ethernet@ef600f00 {
mal-tx-channel = <1>;
mal-rx-channel = <1>;
cell-index = <1>;
max-frame-size = <5dc>;
max-frame-size = <2328>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "rgmii";
......
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......@@ -269,7 +269,6 @@ RGMII0: emac-rgmii@ef601000 {
};
EMAC0: ethernet@ef600e00 {
linux,network-index = <0>;
device_type = "network";
compatible = "ibm,emac-440epx", "ibm,emac4";
interrupt-parent = <&EMAC0>;
......@@ -285,7 +284,7 @@ EMAC0: ethernet@ef600e00 {
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <5dc>;
max-frame-size = <2328>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "rgmii";
......@@ -299,7 +298,6 @@ EMAC0: ethernet@ef600e00 {
};
EMAC1: ethernet@ef600f00 {
linux,network-index = <1>;
device_type = "network";
compatible = "ibm,emac-440epx", "ibm,emac4";
interrupt-parent = <&EMAC1>;
......@@ -315,7 +313,7 @@ EMAC1: ethernet@ef600f00 {
mal-tx-channel = <1>;
mal-rx-channel = <1>;
cell-index = <1>;
max-frame-size = <5dc>;
max-frame-size = <2328>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "rgmii";
......
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......@@ -125,7 +125,6 @@ GPIO: gpio@ef600700 {
};
EMAC: ethernet@ef600800 {
linux,network-index = <0>;
device_type = "network";
compatible = "ibm,emac-405gp", "ibm,emac";
interrupt-parent = <&UIC0>;
......
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