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Commit 9ab71ac3 authored by Srinivas Kandagatla's avatar Srinivas Kandagatla Committed by Mark Brown
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ASoC: qdsp6: q6afe-clocks: move audio-clocks to common file 

Move common parts of  q6afe-clocks to q6dsp-lpass-clocks so that we could
reuse most of the driver for new Q6DSP audio frameworks.

This is to make the code reuseable for new Q6DSP AudioReach framework.
Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20211026111655.1702-6-srinivas.kandagatla@linaro.orgSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 95b6cd57
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Showing with 232 additions and 173 deletions
sound/soc/qcom/qdsp6/Makefile
View file @ 9ab71ac3
# SPDX-License-Identifier: GPL-2.0-only
snd-q6dsp-common-objs := q6dsp-common.o q6dsp-lpass-ports.o
snd-q6dsp-common-objs := q6dsp-common.o q6dsp-lpass-ports.o q6dsp-lpass-clocks.o
obj-$(CONFIG_SND_SOC_QDSP6_COMMON) += snd-q6dsp-common.o
obj-$(CONFIG_SND_SOC_QDSP6_CORE) += q6core.o
......
sound/soc/qcom/qdsp6/q6afe-clocks.c
View file @ 9ab71ac3
......@@ -7,115 +7,18 @@
#include <linux/module.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/slab.h>
#include "q6dsp-lpass-clocks.h"
#include "q6afe.h"
#define Q6AFE_CLK(id) { \
.clk_id = id, \
.afe_clk_id = Q6AFE_##id, \
.q6dsp_clk_id = Q6AFE_##id, \
.name = #id, \
.rate = 19200000, \
}
#define Q6AFE_VOTE_CLK(id, blkid, n) { \
.clk_id = id, \
.afe_clk_id = blkid, \
.name = n, \
}
struct q6afe_clk_init {
int clk_id;
int afe_clk_id;
char *name;
int rate;
};
struct q6afe_clk {
struct device *dev;
int afe_clk_id;
int attributes;
int rate;
uint32_t handle;
struct clk_hw hw;
};
#define to_q6afe_clk(_hw) container_of(_hw, struct q6afe_clk, hw)
struct q6afe_cc {
struct device *dev;
struct q6afe_clk *clks[Q6AFE_MAX_CLK_ID];
};
static int clk_q6afe_prepare(struct clk_hw *hw)
{
struct q6afe_clk *clk = to_q6afe_clk(hw);
return q6afe_set_lpass_clock(clk->dev, clk->afe_clk_id, clk->attributes,
Q6AFE_LPASS_CLK_ROOT_DEFAULT, clk->rate);
}
static void clk_q6afe_unprepare(struct clk_hw *hw)
{
struct q6afe_clk *clk = to_q6afe_clk(hw);
q6afe_set_lpass_clock(clk->dev, clk->afe_clk_id, clk->attributes,
Q6AFE_LPASS_CLK_ROOT_DEFAULT, 0);
}
static int clk_q6afe_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
struct q6afe_clk *clk = to_q6afe_clk(hw);
clk->rate = rate;
return 0;
}
static unsigned long clk_q6afe_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
struct q6afe_clk *clk = to_q6afe_clk(hw);
return clk->rate;
}
static long clk_q6afe_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
{
return rate;
}
static const struct clk_ops clk_q6afe_ops = {
.prepare = clk_q6afe_prepare,
.unprepare = clk_q6afe_unprepare,
.set_rate = clk_q6afe_set_rate,
.round_rate = clk_q6afe_round_rate,
.recalc_rate = clk_q6afe_recalc_rate,
};
static int clk_vote_q6afe_block(struct clk_hw *hw)
{
struct q6afe_clk *clk = to_q6afe_clk(hw);
return q6afe_vote_lpass_core_hw(clk->dev, clk->afe_clk_id,
clk_hw_get_name(&clk->hw), &clk->handle);
}
static void clk_unvote_q6afe_block(struct clk_hw *hw)
{
struct q6afe_clk *clk = to_q6afe_clk(hw);
q6afe_unvote_lpass_core_hw(clk->dev, clk->afe_clk_id, clk->handle);
}
static const struct clk_ops clk_vote_q6afe_ops = {
.prepare = clk_vote_q6afe_block,
.unprepare = clk_unvote_q6afe_block,
};
static const struct q6afe_clk_init q6afe_clks[] = {
static const struct q6dsp_clk_init q6afe_clks[] = {
Q6AFE_CLK(LPASS_CLK_ID_PRI_MI2S_IBIT),
Q6AFE_CLK(LPASS_CLK_ID_PRI_MI2S_EBIT),
Q6AFE_CLK(LPASS_CLK_ID_SEC_MI2S_IBIT),
......@@ -176,88 +79,28 @@ static const struct q6afe_clk_init q6afe_clks[] = {
Q6AFE_CLK(LPASS_CLK_ID_RX_CORE_MCLK),
Q6AFE_CLK(LPASS_CLK_ID_RX_CORE_NPL_MCLK),
Q6AFE_CLK(LPASS_CLK_ID_VA_CORE_2X_MCLK),
Q6AFE_VOTE_CLK(LPASS_HW_AVTIMER_VOTE,
Q6DSP_VOTE_CLK(LPASS_HW_AVTIMER_VOTE,
Q6AFE_LPASS_CORE_AVTIMER_BLOCK,
"LPASS_AVTIMER_MACRO"),
Q6AFE_VOTE_CLK(LPASS_HW_MACRO_VOTE,
Q6DSP_VOTE_CLK(LPASS_HW_MACRO_VOTE,
Q6AFE_LPASS_CORE_HW_MACRO_BLOCK,
"LPASS_HW_MACRO"),
Q6AFE_VOTE_CLK(LPASS_HW_DCODEC_VOTE,
Q6DSP_VOTE_CLK(LPASS_HW_DCODEC_VOTE,
Q6AFE_LPASS_CORE_HW_DCODEC_BLOCK,
"LPASS_HW_DCODEC"),
};
static struct clk_hw *q6afe_of_clk_hw_get(struct of_phandle_args *clkspec,
void *data)
{
struct q6afe_cc *cc = data;
unsigned int idx = clkspec->args[0];
unsigned int attr = clkspec->args[1];
if (idx >= Q6AFE_MAX_CLK_ID || attr > LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR) {
dev_err(cc->dev, "Invalid clk specifier (%d, %d)\n", idx, attr);
return ERR_PTR(-EINVAL);
}
if (cc->clks[idx]) {
cc->clks[idx]->attributes = attr;
return &cc->clks[idx]->hw;
}
return ERR_PTR(-ENOENT);
}
static int q6afe_clock_dev_probe(struct platform_device *pdev)
{
struct q6afe_cc *cc;
struct device *dev = &pdev->dev;
int i, ret;
cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL);
if (!cc)
return -ENOMEM;
cc->dev = dev;
for (i = 0; i < ARRAY_SIZE(q6afe_clks); i++) {
unsigned int id = q6afe_clks[i].clk_id;
struct clk_init_data init = {
.name = q6afe_clks[i].name,
};
struct q6afe_clk *clk;
clk = devm_kzalloc(dev, sizeof(*clk), GFP_KERNEL);
if (!clk)
return -ENOMEM;
clk->dev = dev;
clk->afe_clk_id = q6afe_clks[i].afe_clk_id;
clk->rate = q6afe_clks[i].rate;
clk->hw.init = &init;
if (clk->rate)
init.ops = &clk_q6afe_ops;
else
init.ops = &clk_vote_q6afe_ops;
cc->clks[id] = clk;
ret = devm_clk_hw_register(dev, &clk->hw);
if (ret)
return ret;
}
ret = devm_of_clk_add_hw_provider(dev, q6afe_of_clk_hw_get, cc);
if (ret)
return ret;
dev_set_drvdata(dev, cc);
return 0;
}
static const struct q6dsp_clk_desc q6dsp_clk_q6afe __maybe_unused = {
.clks = q6afe_clks,
.num_clks = ARRAY_SIZE(q6afe_clks),
.lpass_set_clk = q6afe_set_lpass_clock,
.lpass_vote_clk = q6afe_vote_lpass_core_hw,
.lpass_unvote_clk = q6afe_unvote_lpass_core_hw,
};
#ifdef CONFIG_OF
static const struct of_device_id q6afe_clock_device_id[] = {
{ .compatible = "qcom,q6afe-clocks" },
{ .compatible = "qcom,q6afe-clocks", .data = &q6dsp_clk_q6afe },
{},
};
MODULE_DEVICE_TABLE(of, q6afe_clock_device_id);
......@@ -268,7 +111,7 @@ static struct platform_driver q6afe_clock_platform_driver = {
.name = "q6afe-clock",
.of_match_table = of_match_ptr(q6afe_clock_device_id),
},
.probe = q6afe_clock_dev_probe,
.probe = q6dsp_clock_dev_probe,
};
module_platform_driver(q6afe_clock_platform_driver);
......
sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c 0 → 100644
View file @ 9ab71ac3
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2020, Linaro Limited
#include <linux/err.h>
#include <linux/init.h>
#include <linux/clk-provider.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/slab.h>
#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
#include "q6dsp-lpass-clocks.h"
#define Q6DSP_MAX_CLK_ID 104
#define Q6DSP_LPASS_CLK_ROOT_DEFAULT 0
struct q6dsp_clk {
struct device *dev;
int q6dsp_clk_id;
int attributes;
int rate;
uint32_t handle;
struct clk_hw hw;
};
#define to_q6dsp_clk(_hw) container_of(_hw, struct q6dsp_clk, hw)
struct q6dsp_cc {
struct device *dev;
struct q6dsp_clk *clks[Q6DSP_MAX_CLK_ID];
const struct q6dsp_clk_desc *desc;
};
static int clk_q6dsp_prepare(struct clk_hw *hw)
{
struct q6dsp_clk *clk = to_q6dsp_clk(hw);
struct q6dsp_cc *cc = dev_get_drvdata(clk->dev);
return cc->desc->lpass_set_clk(clk->dev, clk->q6dsp_clk_id, clk->attributes,
Q6DSP_LPASS_CLK_ROOT_DEFAULT, clk->rate);
}
static void clk_q6dsp_unprepare(struct clk_hw *hw)
{
struct q6dsp_clk *clk = to_q6dsp_clk(hw);
struct q6dsp_cc *cc = dev_get_drvdata(clk->dev);
cc->desc->lpass_set_clk(clk->dev, clk->q6dsp_clk_id, clk->attributes,
Q6DSP_LPASS_CLK_ROOT_DEFAULT, 0);
}
static int clk_q6dsp_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
struct q6dsp_clk *clk = to_q6dsp_clk(hw);
clk->rate = rate;
return 0;
}
static unsigned long clk_q6dsp_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
struct q6dsp_clk *clk = to_q6dsp_clk(hw);
return clk->rate;
}
static long clk_q6dsp_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
{
return rate;
}
static const struct clk_ops clk_q6dsp_ops = {
.prepare = clk_q6dsp_prepare,
.unprepare = clk_q6dsp_unprepare,
.set_rate = clk_q6dsp_set_rate,
.round_rate = clk_q6dsp_round_rate,
.recalc_rate = clk_q6dsp_recalc_rate,
};
static int clk_vote_q6dsp_block(struct clk_hw *hw)
{
struct q6dsp_clk *clk = to_q6dsp_clk(hw);
struct q6dsp_cc *cc = dev_get_drvdata(clk->dev);
return cc->desc->lpass_vote_clk(clk->dev, clk->q6dsp_clk_id,
clk_hw_get_name(&clk->hw), &clk->handle);
}
static void clk_unvote_q6dsp_block(struct clk_hw *hw)
{
struct q6dsp_clk *clk = to_q6dsp_clk(hw);
struct q6dsp_cc *cc = dev_get_drvdata(clk->dev);
cc->desc->lpass_unvote_clk(clk->dev, clk->q6dsp_clk_id, clk->handle);
}
static const struct clk_ops clk_vote_q6dsp_ops = {
.prepare = clk_vote_q6dsp_block,
.unprepare = clk_unvote_q6dsp_block,
};
static struct clk_hw *q6dsp_of_clk_hw_get(struct of_phandle_args *clkspec,
void *data)
{
struct q6dsp_cc *cc = data;
unsigned int idx = clkspec->args[0];
unsigned int attr = clkspec->args[1];
if (idx >= Q6DSP_MAX_CLK_ID || attr > LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR) {
dev_err(cc->dev, "Invalid clk specifier (%d, %d)\n", idx, attr);
return ERR_PTR(-EINVAL);
}
if (cc->clks[idx]) {
cc->clks[idx]->attributes = attr;
return &cc->clks[idx]->hw;
}
return ERR_PTR(-ENOENT);
}
int q6dsp_clock_dev_probe(struct platform_device *pdev)
{
struct q6dsp_cc *cc;
struct device *dev = &pdev->dev;
const struct q6dsp_clk_init *q6dsp_clks;
const struct q6dsp_clk_desc *desc;
int i, ret;
cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL);
if (!cc)
return -ENOMEM;
desc = of_device_get_match_data(&pdev->dev);
if (!desc)
return -EINVAL;
cc->desc = desc;
cc->dev = dev;
q6dsp_clks = desc->clks;
for (i = 0; i < desc->num_clks; i++) {
unsigned int id = q6dsp_clks[i].clk_id;
struct clk_init_data init = {
.name = q6dsp_clks[i].name,
};
struct q6dsp_clk *clk;
clk = devm_kzalloc(dev, sizeof(*clk), GFP_KERNEL);
if (!clk)
return -ENOMEM;
clk->dev = dev;
clk->q6dsp_clk_id = q6dsp_clks[i].q6dsp_clk_id;
clk->rate = q6dsp_clks[i].rate;
clk->hw.init = &init;
if (clk->rate)
init.ops = &clk_q6dsp_ops;
else
init.ops = &clk_vote_q6dsp_ops;
cc->clks[id] = clk;
ret = devm_clk_hw_register(dev, &clk->hw);
if (ret)
return ret;
}
ret = devm_of_clk_add_hw_provider(dev, q6dsp_of_clk_hw_get, cc);
if (ret)
return ret;
dev_set_drvdata(dev, cc);
return 0;
}
EXPORT_SYMBOL_GPL(q6dsp_clock_dev_probe);
sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.h 0 → 100644
View file @ 9ab71ac3
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __Q6DSP_AUDIO_CLOCKS_H__
#define __Q6DSP_AUDIO_CLOCKS_H__
struct q6dsp_clk_init {
int clk_id;
int q6dsp_clk_id;
char *name;
int rate;
};
#define Q6DSP_VOTE_CLK(id, blkid, n) { \
.clk_id = id, \
.q6dsp_clk_id = blkid, \
.name = n, \
}
struct q6dsp_clk_desc {
const struct q6dsp_clk_init *clks;
size_t num_clks;
int (*lpass_set_clk)(struct device *dev, int clk_id, int attr,
int root_clk, unsigned int freq);
int (*lpass_vote_clk)(struct device *dev, uint32_t hid, const char *n, uint32_t *h);
int (*lpass_unvote_clk)(struct device *dev, uint32_t hid, uint32_t h);
};
int q6dsp_clock_dev_probe(struct platform_device *pdev);
#endif /* __Q6DSP_AUDIO_CLOCKS_H__ */
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