Commit 9f643c74 authored by Deepak Saxena's avatar Deepak Saxena Committed by Russell King

[ARM PATCH] 1624/1: BE support for io-readsl-armv4.S, io-reads-armv4.S, io-writesw-armv4.S

Patch from Deepak Saxena
parent 48a712c4
...@@ -9,7 +9,6 @@ ...@@ -9,7 +9,6 @@
*/ */
#include <linux/linkage.h> #include <linux/linkage.h>
#include <asm/assembler.h> #include <asm/assembler.h>
#include <asm/hardware.h>
/* /*
* Note that some reads can be aligned on half-word boundaries. * Note that some reads can be aligned on half-word boundaries.
...@@ -31,6 +30,10 @@ ENTRY(__raw_readsl) ...@@ -31,6 +30,10 @@ ENTRY(__raw_readsl)
blt 4f blt 4f
bgt 6f bgt 6f
#ifndef __ARMEB__
/* little endian code */
strh ip, [r1], #2 strh ip, [r1], #2
mov ip, ip, lsr #16 mov ip, ip, lsr #16
3: subs r2, r2, #1 3: subs r2, r2, #1
...@@ -68,3 +71,48 @@ ENTRY(__raw_readsl) ...@@ -68,3 +71,48 @@ ENTRY(__raw_readsl)
strb ip, [r1] strb ip, [r1]
mov pc, lr mov pc, lr
#else
/* big endian code */
mov r3, ip, lsr #16
strh r3, [r1], #2
3: mov r3, ip, lsl #16
subs r2, r2, #1
ldrne ip, [r0]
orrne r3, r3, ip, lsr #16
strne r3, [r1], #4
bne 3b
strh ip, [r1], #2
mov pc, lr
4: mov r3, ip, lsr #24
strb r3, [r1], #1
mov r3, ip, lsr #8
strh r3, [r1], #2
5: mov r3, ip, lsl #24
subs r2, r2, #1
ldrne ip, [r0]
orrne r3, r3, ip, lsr #8
strne r3, [r1], #4
bne 5b
strb ip, [r1], #1
mov pc, lr
6: mov r3, ip, lsr #24
strb r3, [r1], #1
7: mov r3, ip, lsl #8
subs r2, r2, #1
ldrne ip, [r0]
orrne r3, r3, ip, lsr #24
strne r3, [r1], #4
bne 7b
mov r3, ip, lsr #8
strh r3, [r1], #2
strb ip, [r1], #1
mov pc, lr
#endif
...@@ -9,7 +9,14 @@ ...@@ -9,7 +9,14 @@
*/ */
#include <linux/linkage.h> #include <linux/linkage.h>
#include <asm/assembler.h> #include <asm/assembler.h>
#include <asm/hardware.h>
.macro pack, rd, hw1, hw2
#ifndef __ARMEB__
orr \rd, \hw1, \hw2, lsl #16
#else
orr \rd, \hw2, \hw1, lsl #16
#endif
.endm
.insw_bad_alignment: .insw_bad_alignment:
adr r0, .insw_bad_align_msg adr r0, .insw_bad_align_msg
...@@ -41,19 +48,19 @@ ENTRY(__raw_readsw) ...@@ -41,19 +48,19 @@ ENTRY(__raw_readsw)
.insw_8_lp: ldrh r3, [r0] .insw_8_lp: ldrh r3, [r0]
ldrh r4, [r0] ldrh r4, [r0]
orr r3, r3, r4, lsl #16 pack r3, r3, r4
ldrh r4, [r0] ldrh r4, [r0]
ldrh r5, [r0] ldrh r5, [r0]
orr r4, r4, r5, lsl #16 pack r4, r4, r5
ldrh r5, [r0] ldrh r5, [r0]
ldrh ip, [r0] ldrh ip, [r0]
orr r5, r5, ip, lsl #16 pack r5, r5, ip
ldrh ip, [r0] ldrh ip, [r0]
ldrh lr, [r0] ldrh lr, [r0]
orr ip, ip, lr, lsl #16 pack ip, ip, lr
stmia r1!, {r3 - r5, ip} stmia r1!, {r3 - r5, ip}
...@@ -68,11 +75,11 @@ ENTRY(__raw_readsw) ...@@ -68,11 +75,11 @@ ENTRY(__raw_readsw)
ldrh r3, [r0] ldrh r3, [r0]
ldrh r4, [r0] ldrh r4, [r0]
orr r3, r3, r4, lsl #16 pack r3, r3, r4
ldrh r4, [r0] ldrh r4, [r0]
ldrh ip, [r0] ldrh ip, [r0]
orr r4, r4, ip, lsl #16 pack r4, r4, ip
stmia r1!, {r3, r4} stmia r1!, {r3, r4}
...@@ -81,7 +88,7 @@ ENTRY(__raw_readsw) ...@@ -81,7 +88,7 @@ ENTRY(__raw_readsw)
ldrh r3, [r0] ldrh r3, [r0]
ldrh ip, [r0] ldrh ip, [r0]
orr r3, r3, ip, lsl #16 pack r3, r3, ip
str r3, [r1], #4 str r3, [r1], #4
......
...@@ -9,7 +9,18 @@ ...@@ -9,7 +9,18 @@
*/ */
#include <linux/linkage.h> #include <linux/linkage.h>
#include <asm/assembler.h> #include <asm/assembler.h>
#include <asm/hardware.h>
.macro outword, rd
#ifndef __ARMEB__
strh \rd, [r0]
mov \rd, \rd, lsr #16
strh \rd, [r0]
#else
mov lr, \rd, lsr #16
strh lr, [r0]
strh \rd, [r0]
#endif
.endm
.outsw_bad_alignment: .outsw_bad_alignment:
adr r0, .outsw_bad_align_msg adr r0, .outsw_bad_align_msg
...@@ -40,20 +51,10 @@ ENTRY(__raw_writesw) ...@@ -40,20 +51,10 @@ ENTRY(__raw_writesw)
bmi .no_outsw_8 bmi .no_outsw_8
.outsw_8_lp: ldmia r1!, {r3, r4, r5, ip} .outsw_8_lp: ldmia r1!, {r3, r4, r5, ip}
outword r3
strh r3, [r0] outword r4
mov r3, r3, lsr #16 outword r5
strh r3, [r0] outword ip
strh r4, [r0]
mov r4, r4, lsr #16
strh r4, [r0]
strh r5, [r0]
mov r5, r5, lsr #16
strh r5, [r0]
strh ip, [r0]
mov ip, ip, lsr #16
strh ip, [r0]
subs r2, r2, #8 subs r2, r2, #8
bpl .outsw_8_lp bpl .outsw_8_lp
...@@ -64,20 +65,14 @@ ENTRY(__raw_writesw) ...@@ -64,20 +65,14 @@ ENTRY(__raw_writesw)
beq .no_outsw_4 beq .no_outsw_4
ldmia r1!, {r3, ip} ldmia r1!, {r3, ip}
strh r3, [r0] outword r3
mov r3, r3, lsr #16 outword ip
strh r3, [r0]
strh ip, [r0]
mov ip, ip, lsr #16
strh ip, [r0]
.no_outsw_4: tst r2, #2 .no_outsw_4: tst r2, #2
beq .no_outsw_2 beq .no_outsw_2
ldr r3, [r1], #4 ldr r3, [r1], #4
strh r3, [r0] outword r3
mov r3, r3, lsr #16
strh r3, [r0]
.no_outsw_2: tst r2, #1 .no_outsw_2: tst r2, #1
ldrneh r3, [r1] ldrneh r3, [r1]
......
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