Commit a1bc4e7c authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'omap-for-v4.15/soc-signed' of...

Merge tag 'omap-for-v4.15/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

Pull "OMAP soc changes for omaps for v4.15 merge window" from Tony Lindgren:

SoC changes for omaps for v4.15 merge window that are mostly non-urgent
fixes and clean-up in preparation for dropping more platform data later
on:

- Fix am33xx/am437x MMC address space offsets

- Fix overwriting clkctrl and modulemode values when dts data is
  used

- Drop unused platform init code for omap_init_hdq

- Drop unused struct omap_hwmod_mux_info

- Remove duplicate define for dra722 es1.0 silicon revision

- Add support for dra71x es2.1

- Make omap_dma_dev_info __initdata

- A series of fixes for Coccinelle found issues

* tag 'omap-for-v4.15/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP: Fix typos in two comment lines in _omap_dm_timer_request()
  ARM: OMAP: Use kcalloc() in omap_system_dma_probe()
  ARM: OMAP: Improve a size determination in two functions
  ARM: OMAP: Delete an error message for a failed memory allocation in two functions
  ARM: OMAP2+: make omap_dma_dev_info __initdata
  ARM: DRA722: Add support for DRA71x Silicon Rev 2.1
  ARM: DRA722: remove redundant definition of 1.0 device
  ARM: OMAP2+: Drop unused omap_hwmod_mux_info
  ARM: OMAP2+: Drop unused omap_init_hdq
  ARM: OMAP2+: Fix overwriting of clkctrl and modulemode values
  ARM: OMAP2+: Fix MMC address space mismatch for am33xx and am43xx
parents 82e3c83e 28fd7e99
......@@ -223,7 +223,7 @@ static struct omap_system_dma_plat_info dma_plat_info __initdata = {
.dma_read = dma_read,
};
static struct platform_device_info omap_dma_dev_info = {
static struct platform_device_info omap_dma_dev_info __initdata = {
.name = "omap-dma-engine",
.id = -1,
.dma_mask = DMA_BIT_MASK(32),
......
......@@ -75,25 +75,3 @@ int omap_hdq1w_reset(struct omap_hwmod *oh)
return 0;
}
#ifndef CONFIG_OF
static int __init omap_init_hdq(void)
{
int id = -1;
struct platform_device *pdev;
struct omap_hwmod *oh;
char *oh_name = "hdq1w";
char *devname = "omap_hdq";
oh = omap_hwmod_lookup(oh_name);
if (!oh)
return 0;
pdev = omap_device_build(devname, id, oh, NULL, 0);
WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
devname, oh->name);
return 0;
}
omap_arch_initcall(omap_init_hdq);
#endif
......@@ -693,9 +693,12 @@ void __init dra7xxx_check_revision(void)
omap_revision = DRA722_REV_ES1_0;
break;
case 1:
default:
omap_revision = DRA722_REV_ES2_0;
break;
case 2:
default:
omap_revision = DRA722_REV_ES2_1;
break;
}
break;
......
......@@ -993,6 +993,34 @@ static int _enable_clocks(struct omap_hwmod *oh)
return 0;
}
/**
* _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
* @oh: struct omap_hwmod *
*/
static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
{
if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
return true;
return false;
}
/**
* _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
* @oh: struct omap_hwmod *
*/
static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
{
if (oh->prcm.omap4.clkctrl_offs)
return true;
if (!oh->prcm.omap4.clkctrl_offs &&
oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
return true;
return false;
}
/**
* _disable_clocks - disable hwmod main clock and interface clocks
* @oh: struct omap_hwmod *
......@@ -1030,7 +1058,8 @@ static int _disable_clocks(struct omap_hwmod *oh)
*/
static void _omap4_enable_module(struct omap_hwmod *oh)
{
if (!oh->clkdm || !oh->prcm.omap4.modulemode)
if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
_omap4_clkctrl_managed_by_clkfwk(oh))
return;
pr_debug("omap_hwmod: %s: %s: %d\n",
......@@ -1061,8 +1090,10 @@ static int _omap4_wait_target_disable(struct omap_hwmod *oh)
if (oh->flags & HWMOD_NO_IDLEST)
return 0;
if (!oh->prcm.omap4.clkctrl_offs &&
!(oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET))
if (_omap4_clkctrl_managed_by_clkfwk(oh))
return 0;
if (!_omap4_has_clkctrl_clock(oh))
return 0;
return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
......@@ -1847,7 +1878,8 @@ static int _omap4_disable_module(struct omap_hwmod *oh)
{
int v;
if (!oh->clkdm || !oh->prcm.omap4.modulemode)
if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
_omap4_clkctrl_managed_by_clkfwk(oh))
return -EINVAL;
/*
......@@ -2829,8 +2861,10 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh)
if (!_find_mpu_rt_port(oh))
return 0;
if (!oh->prcm.omap4.clkctrl_offs &&
!(oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET))
if (_omap4_clkctrl_managed_by_clkfwk(oh))
return 0;
if (!_omap4_has_clkctrl_clock(oh))
return 0;
/* XXX check module SIDLEMODE, hardreset status */
......@@ -2986,8 +3020,7 @@ static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
if (!oh)
return -EINVAL;
oh->prcm.omap4.clkctrl_offs = 0;
oh->prcm.omap4.modulemode = 0;
oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
return 0;
}
......
......@@ -21,7 +21,6 @@
*
* To do:
* - add interconnect error log structures
* - add pinmuxing
* - init_conn_id_bit (CONNID_BIT_VECTOR)
* - implement default hwmod SMS/SDRC flags?
* - move Linux-specific data ("non-ROM data") out
......@@ -150,22 +149,6 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3;
#define DEBUG_AM33XXUART1_FLAGS DEBUG_OMAPUART_FLAGS
#endif
/**
* struct omap_hwmod_mux_info - hwmod specific mux configuration
* @pads: array of omap_device_pad entries
* @nr_pads: number of omap_device_pad entries
*
* Note that this is currently built during init as needed.
*/
struct omap_hwmod_mux_info {
int nr_pads;
struct omap_device_pad *pads;
int nr_pads_dynamic;
struct omap_device_pad **pads_dynamic;
int *irqs;
bool enabled;
};
/**
* struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
* @name: name of the IRQ channel (module local name)
......@@ -446,9 +429,12 @@ struct omap_hwmod_omap2_prcm {
* HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET: Some IP blocks have a valid CLKCTRL
* offset of zero; this flag bit should be set in those cases to
* distinguish from hwmods that have no clkctrl offset.
* HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK: Module clockctrl clock is managed
* by the common clock framework and not hwmod.
*/
#define HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT (1 << 0)
#define HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET (1 << 1)
#define HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK (1 << 2)
/**
* struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
......@@ -670,7 +656,6 @@ struct omap_hwmod {
const char *name;
struct omap_hwmod_class *class;
struct omap_device *od;
struct omap_hwmod_mux_info *mux;
struct omap_hwmod_irq_info *mpu_irqs;
struct omap_hwmod_dma_info *sdma_reqs;
struct omap_hwmod_rst_info *rst_lines;
......
......@@ -286,56 +286,26 @@ struct omap_hwmod_ocp_if am33xx_l4_ls__mcasp1 = {
};
/* l4 ls -> mmc0 */
static struct omap_hwmod_addr_space am33xx_mmc0_addr_space[] = {
{
.pa_start = 0x48060100,
.pa_end = 0x48060100 + SZ_4K - 1,
.flags = ADDR_TYPE_RT,
},
{ }
};
struct omap_hwmod_ocp_if am33xx_l4_ls__mmc0 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_mmc0_hwmod,
.clk = "l4ls_gclk",
.addr = am33xx_mmc0_addr_space,
.user = OCP_USER_MPU,
};
/* l4 ls -> mmc1 */
static struct omap_hwmod_addr_space am33xx_mmc1_addr_space[] = {
{
.pa_start = 0x481d8100,
.pa_end = 0x481d8100 + SZ_4K - 1,
.flags = ADDR_TYPE_RT,
},
{ }
};
struct omap_hwmod_ocp_if am33xx_l4_ls__mmc1 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_mmc1_hwmod,
.clk = "l4ls_gclk",
.addr = am33xx_mmc1_addr_space,
.user = OCP_USER_MPU,
};
/* l3 s -> mmc2 */
static struct omap_hwmod_addr_space am33xx_mmc2_addr_space[] = {
{
.pa_start = 0x47810100,
.pa_end = 0x47810100 + SZ_64K - 1,
.flags = ADDR_TYPE_RT,
},
{ }
};
struct omap_hwmod_ocp_if am33xx_l3_s__mmc2 = {
.master = &am33xx_l3_s_hwmod,
.slave = &am33xx_mmc2_hwmod,
.clk = "l3s_gclk",
.addr = am33xx_mmc2_addr_space,
.user = OCP_USER_MPU,
};
......
......@@ -778,9 +778,9 @@ struct omap_hwmod am33xx_mcasp1_hwmod = {
/* 'mmc' class */
static struct omap_hwmod_class_sysconfig am33xx_mmc_sysc = {
.rev_offs = 0x1fc,
.sysc_offs = 0x10,
.syss_offs = 0x14,
.rev_offs = 0x2fc,
.sysc_offs = 0x110,
.syss_offs = 0x114,
.sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
......
......@@ -395,8 +395,8 @@ IS_OMAP_TYPE(3430, 0x3430)
#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
#define DRA752_REV_ES2_0 (DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8))
#define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
#define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
#define DRA722_REV_ES2_0 (DRA7XX_CLASS | (0x22 << 16) | (0x20 << 8))
#define DRA722_REV_ES2_1 (DRA7XX_CLASS | (0x22 << 16) | (0x21 << 8))
void omap2xxx_check_revision(void);
void omap3xxx_check_revision(void);
......
......@@ -1316,16 +1316,14 @@ static int omap_system_dma_probe(struct platform_device *pdev)
enable_1510_mode = d->dev_caps & ENABLE_1510_MODE;
dma_chan = devm_kcalloc(&pdev->dev, dma_lch_count,
sizeof(struct omap_dma_lch), GFP_KERNEL);
if (!dma_chan) {
dev_err(&pdev->dev, "%s: kzalloc fail\n", __func__);
sizeof(*dma_chan), GFP_KERNEL);
if (!dma_chan)
return -ENOMEM;
}
if (dma_omap2plus()) {
dma_linked_lch = kzalloc(sizeof(struct dma_link_info) *
dma_lch_count, GFP_KERNEL);
dma_linked_lch = kcalloc(dma_lch_count,
sizeof(*dma_linked_lch),
GFP_KERNEL);
if (!dma_linked_lch) {
ret = -ENOMEM;
goto exit_dma_lch_fail;
......
......@@ -254,8 +254,8 @@ static struct omap_dm_timer *_omap_dm_timer_request(int req_type, void *data)
if (cap == (t->capability & cap)) {
/*
* If timer is not NULL, we have already found
* one timer but it was not an exact match
* because it had more capabilites that what
* one timer. But it was not an exact match
* because it had more capabilities than what
* was required. Therefore, unreserve the last
* timer found and see if this one is a better
* match.
......@@ -857,11 +857,9 @@ static int omap_dm_timer_probe(struct platform_device *pdev)
return -ENODEV;
}
timer = devm_kzalloc(dev, sizeof(struct omap_dm_timer), GFP_KERNEL);
if (!timer) {
dev_err(dev, "%s: memory alloc failed!\n", __func__);
timer = devm_kzalloc(dev, sizeof(*timer), GFP_KERNEL);
if (!timer)
return -ENOMEM;
}
timer->fclk = ERR_PTR(-ENODEV);
timer->io_base = devm_ioremap_resource(dev, mem);
......
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