usb: chipidea: tegra: Specify TX FIFO threshold in UDC SoC info
The UDC/OTG controller could be switched to a host mode and the TXFILLTUNING register needs to be programmed properly for the host mode. Hence specify the TX FIFO threshold in the UDC SoC info. Acked-by: Peter Chen <peter.chen@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20201218120246.7759-8-digetx@gmail.comSigned-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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