Commit a346c778 authored by Christophe Branchereau's avatar Christophe Branchereau Committed by Mark Brown

ASoC: codecs/jz4770: Reset interrupt flags in bias PREPARE

In case a poll for RUP times out, we might be left with some IRQ flags
that should be cleared before the next power on.
Signed-off-by: default avatarChristophe Branchereau <cbranchereau@gmail.com>
Signed-off-by: default avatarPaul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20201207125338.119397-2-paul@crapouillou.netSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent ad13c835
...@@ -190,6 +190,9 @@ static int jz4770_codec_set_bias_level(struct snd_soc_component *codec, ...@@ -190,6 +190,9 @@ static int jz4770_codec_set_bias_level(struct snd_soc_component *codec,
switch (level) { switch (level) {
case SND_SOC_BIAS_PREPARE: case SND_SOC_BIAS_PREPARE:
/* Reset all interrupt flags. */
regmap_write(regmap, JZ4770_CODEC_REG_IFR, REG_IFR_ALL_MASK);
regmap_clear_bits(regmap, JZ4770_CODEC_REG_CR_VIC, regmap_clear_bits(regmap, JZ4770_CODEC_REG_CR_VIC,
REG_CR_VIC_SB); REG_CR_VIC_SB);
msleep(250); msleep(250);
...@@ -642,9 +645,6 @@ static void jz4770_codec_codec_init_regs(struct snd_soc_component *codec) ...@@ -642,9 +645,6 @@ static void jz4770_codec_codec_init_regs(struct snd_soc_component *codec)
/* Send collected updates. */ /* Send collected updates. */
regcache_cache_only(regmap, false); regcache_cache_only(regmap, false);
regcache_sync(regmap); regcache_sync(regmap);
/* Reset all interrupt flags. */
regmap_write(regmap, JZ4770_CODEC_REG_IFR, REG_IFR_ALL_MASK);
} }
static int jz4770_codec_codec_probe(struct snd_soc_component *codec) static int jz4770_codec_codec_probe(struct snd_soc_component *codec)
......
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