Commit a3ef91f5 authored by Randy Dunlap's avatar Randy Dunlap Committed by Stephen Boyd

clk: at91: sama7g5: remove all kernel-doc & kernel-doc warnings

Remove all "/**" kernel-doc markers from sama7g5.c since they are
all internal to this driver source file only.
This eliminates 14 warnings that were reported by the kernel test robot.
Signed-off-by: default avatarRandy Dunlap <rdunlap@infradead.org>
Reported-by: default avatarkernel test robot <lkp@intel.com>
Cc: Claudiu Beznea <claudiu.beznea@microchip.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: linux-clk@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Link: https://lore.kernel.org/r/20210819223237.20115-1-rdunlap@infradead.orgReviewed-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 0cbc0eb1
...@@ -35,7 +35,7 @@ static DEFINE_SPINLOCK(pmc_pll_lock); ...@@ -35,7 +35,7 @@ static DEFINE_SPINLOCK(pmc_pll_lock);
static DEFINE_SPINLOCK(pmc_mck0_lock); static DEFINE_SPINLOCK(pmc_mck0_lock);
static DEFINE_SPINLOCK(pmc_mckX_lock); static DEFINE_SPINLOCK(pmc_mckX_lock);
/** /*
* PLL clocks identifiers * PLL clocks identifiers
* @PLL_ID_CPU: CPU PLL identifier * @PLL_ID_CPU: CPU PLL identifier
* @PLL_ID_SYS: System PLL identifier * @PLL_ID_SYS: System PLL identifier
...@@ -56,7 +56,7 @@ enum pll_ids { ...@@ -56,7 +56,7 @@ enum pll_ids {
PLL_ID_MAX, PLL_ID_MAX,
}; };
/** /*
* PLL type identifiers * PLL type identifiers
* @PLL_TYPE_FRAC: fractional PLL identifier * @PLL_TYPE_FRAC: fractional PLL identifier
* @PLL_TYPE_DIV: divider PLL identifier * @PLL_TYPE_DIV: divider PLL identifier
...@@ -118,7 +118,7 @@ static const struct clk_pll_characteristics pll_characteristics = { ...@@ -118,7 +118,7 @@ static const struct clk_pll_characteristics pll_characteristics = {
.output = pll_outputs, .output = pll_outputs,
}; };
/** /*
* PLL clocks description * PLL clocks description
* @n: clock name * @n: clock name
* @p: clock parent * @p: clock parent
...@@ -285,7 +285,7 @@ static const struct { ...@@ -285,7 +285,7 @@ static const struct {
}, },
}; };
/** /*
* Master clock (MCK[1..4]) description * Master clock (MCK[1..4]) description
* @n: clock name * @n: clock name
* @ep: extra parents names array * @ep: extra parents names array
...@@ -337,7 +337,7 @@ static const struct { ...@@ -337,7 +337,7 @@ static const struct {
.c = 1, }, .c = 1, },
}; };
/** /*
* System clock description * System clock description
* @n: clock name * @n: clock name
* @p: clock parent name * @p: clock parent name
...@@ -361,7 +361,7 @@ static const struct { ...@@ -361,7 +361,7 @@ static const struct {
/* Mux table for programmable clocks. */ /* Mux table for programmable clocks. */
static u32 sama7g5_prog_mux_table[] = { 0, 1, 2, 5, 6, 7, 8, 9, 10, }; static u32 sama7g5_prog_mux_table[] = { 0, 1, 2, 5, 6, 7, 8, 9, 10, };
/** /*
* Peripheral clock description * Peripheral clock description
* @n: clock name * @n: clock name
* @p: clock parent name * @p: clock parent name
...@@ -449,7 +449,7 @@ static const struct { ...@@ -449,7 +449,7 @@ static const struct {
{ .n = "uhphs_clk", .p = "mck1", .id = 106, }, { .n = "uhphs_clk", .p = "mck1", .id = 106, },
}; };
/** /*
* Generic clock description * Generic clock description
* @n: clock name * @n: clock name
* @pp: PLL parents * @pp: PLL parents
......
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