Commit a4104c55 authored by Sagar Kamble's avatar Sagar Kamble Committed by Daniel Vetter

drm/i915: Naming constants to be written to GEN9_PG_ENABLE

Change-Id: I4253459c075c50d9b6f034b4ed4ad2f54cd7d1d7
Signed-off-by: default avatarSagar Kamble <sagar.a.kamble@intel.com>
Reviewed-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 8d909261
...@@ -6198,6 +6198,8 @@ enum skl_disp_power_wells { ...@@ -6198,6 +6198,8 @@ enum skl_disp_power_wells {
#define GEN9_MEDIA_PG_IDLE_HYSTERESIS 0xA0C4 #define GEN9_MEDIA_PG_IDLE_HYSTERESIS 0xA0C4
#define GEN9_RENDER_PG_IDLE_HYSTERESIS 0xA0C8 #define GEN9_RENDER_PG_IDLE_HYSTERESIS 0xA0C8
#define GEN9_PG_ENABLE 0xA210 #define GEN9_PG_ENABLE 0xA210
#define GEN9_RENDER_PG_ENABLE (1<<0)
#define GEN9_MEDIA_PG_ENABLE (1<<1)
#define VLV_CHICKEN_3 (VLV_DISPLAY_BASE + 0x7040C) #define VLV_CHICKEN_3 (VLV_DISPLAY_BASE + 0x7040C)
#define PIXEL_OVERLAP_CNT_MASK (3 << 30) #define PIXEL_OVERLAP_CNT_MASK (3 << 30)
......
...@@ -4347,7 +4347,9 @@ static void gen9_enable_rc6(struct drm_device *dev) ...@@ -4347,7 +4347,9 @@ static void gen9_enable_rc6(struct drm_device *dev)
rc6_mask); rc6_mask);
/* 3b: Enable Coarse Power Gating only when RC6 is enabled */ /* 3b: Enable Coarse Power Gating only when RC6 is enabled */
I915_WRITE(GEN9_PG_ENABLE, (rc6_mask & GEN6_RC_CTL_RC6_ENABLE) ? 3 : 0); I915_WRITE(GEN9_PG_ENABLE, (rc6_mask & GEN6_RC_CTL_RC6_ENABLE) ?
(GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE) : 0);
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
......
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