Commit a4ee2861 authored by Anshuman Khandual's avatar Anshuman Khandual Committed by Will Deacon

arm64/mm: Simplify and document pte_to_phys() for 52 bit addresses

pte_to_phys() assembly definition does multiple bits field transformations
to derive physical address, embedded inside a page table entry. Unlike its
C counter part i.e __pte_to_phys(), pte_to_phys() is not very apparent. It
simplifies these operations via a new macro PTE_ADDR_HIGH_SHIFT indicating
how far the pte encoded higher address bits need to be left shifted. While
here, this also updates __pte_to_phys() and __phys_to_pte_val().

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: default avatarArd Biesheuvel <ardb@kernel.org>
Suggested-by: default avatarArd Biesheuvel <ardb@kernel.org>
Signed-off-by: default avatarAnshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20221107141753.2938621-1-anshuman.khandual@arm.comSigned-off-by: default avatarWill Deacon <will@kernel.org>
parent f0c4d9fc
...@@ -660,12 +660,10 @@ alternative_endif ...@@ -660,12 +660,10 @@ alternative_endif
.endm .endm
.macro pte_to_phys, phys, pte .macro pte_to_phys, phys, pte
#ifdef CONFIG_ARM64_PA_BITS_52
ubfiz \phys, \pte, #(48 - 16 - 12), #16
bfxil \phys, \pte, #16, #32
lsl \phys, \phys, #16
#else
and \phys, \pte, #PTE_ADDR_MASK and \phys, \pte, #PTE_ADDR_MASK
#ifdef CONFIG_ARM64_PA_BITS_52
orr \phys, \phys, \phys, lsl #PTE_ADDR_HIGH_SHIFT
and \phys, \phys, GENMASK_ULL(PHYS_MASK_SHIFT - 1, PAGE_SHIFT)
#endif #endif
.endm .endm
......
...@@ -159,6 +159,7 @@ ...@@ -159,6 +159,7 @@
#ifdef CONFIG_ARM64_PA_BITS_52 #ifdef CONFIG_ARM64_PA_BITS_52
#define PTE_ADDR_HIGH (_AT(pteval_t, 0xf) << 12) #define PTE_ADDR_HIGH (_AT(pteval_t, 0xf) << 12)
#define PTE_ADDR_MASK (PTE_ADDR_LOW | PTE_ADDR_HIGH) #define PTE_ADDR_MASK (PTE_ADDR_LOW | PTE_ADDR_HIGH)
#define PTE_ADDR_HIGH_SHIFT 36
#else #else
#define PTE_ADDR_MASK PTE_ADDR_LOW #define PTE_ADDR_MASK PTE_ADDR_LOW
#endif #endif
......
...@@ -77,11 +77,11 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; ...@@ -77,11 +77,11 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
static inline phys_addr_t __pte_to_phys(pte_t pte) static inline phys_addr_t __pte_to_phys(pte_t pte)
{ {
return (pte_val(pte) & PTE_ADDR_LOW) | return (pte_val(pte) & PTE_ADDR_LOW) |
((pte_val(pte) & PTE_ADDR_HIGH) << 36); ((pte_val(pte) & PTE_ADDR_HIGH) << PTE_ADDR_HIGH_SHIFT);
} }
static inline pteval_t __phys_to_pte_val(phys_addr_t phys) static inline pteval_t __phys_to_pte_val(phys_addr_t phys)
{ {
return (phys | (phys >> 36)) & PTE_ADDR_MASK; return (phys | (phys >> PTE_ADDR_HIGH_SHIFT)) & PTE_ADDR_MASK;
} }
#else #else
#define __pte_to_phys(pte) (pte_val(pte) & PTE_ADDR_MASK) #define __pte_to_phys(pte) (pte_val(pte) & PTE_ADDR_MASK)
......
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