Commit a7dde1b7 authored by Eric Anholt's avatar Eric Anholt

drm/v3d: Don't try to set OVRTMUOUT on V3D 4.x.

The old field is gone and the register now has a different field,
QRMAXCNT for how many TMU requests get serviced before thread switch.
We were accidentally reducing it from its default of 0x3 (4 requests)
to 0x0 (1).

v2: Skip setting the reg at all on 4.x, instead of trying to update
    only the old field.
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20190220233658.986-2-eric@anholt.netReviewed-by: default avatarDave Emett <david.emett@broadcom.com>
parent d26f9c7f
...@@ -24,7 +24,8 @@ v3d_init_core(struct v3d_dev *v3d, int core) ...@@ -24,7 +24,8 @@ v3d_init_core(struct v3d_dev *v3d, int core)
* type. If you want the default behavior, you can still put * type. If you want the default behavior, you can still put
* "2" in the indirect texture state's output_type field. * "2" in the indirect texture state's output_type field.
*/ */
V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT); if (v3d->ver < 40)
V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT);
/* Whenever we flush the L2T cache, we always want to flush /* Whenever we flush the L2T cache, we always want to flush
* the whole thing. * the whole thing.
......
...@@ -216,6 +216,8 @@ ...@@ -216,6 +216,8 @@
# define V3D_IDENT2_BCG_INT BIT(28) # define V3D_IDENT2_BCG_INT BIT(28)
#define V3D_CTL_MISCCFG 0x00018 #define V3D_CTL_MISCCFG 0x00018
# define V3D_CTL_MISCCFG_QRMAXCNT_MASK V3D_MASK(3, 1)
# define V3D_CTL_MISCCFG_QRMAXCNT_SHIFT 1
# define V3D_MISCCFG_OVRTMUOUT BIT(0) # define V3D_MISCCFG_OVRTMUOUT BIT(0)
#define V3D_CTL_L2CACTL 0x00020 #define V3D_CTL_L2CACTL 0x00020
......
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