Commit a99163e9 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'devicetree-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:

 - Sync dtc to upstream version v1.6.0-51-g183df9e9c2b9 and build host
   fdtoverlay

 - Add kbuild support to build DT overlays (%.dtbo)

 - Drop NULLifying match table in of_match_device().

   In preparation for this, there are several driver cleanups to use
   (of_)?device_get_match_data().

 - Drop pointless wrappers from DT struct device API

 - Convert USB binding schemas to use graph schema and remove old plain
   text graph binding doc

 - Convert spi-nor and v3d GPU bindings to DT schema

 - Tree wide schema fixes for if/then schemas, array size constraints,
   and undocumented compatible strings in examples

 - Handle 'no-map' correctly for already reserved memblock regions

* tag 'devicetree-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (35 commits)
  driver core: platform: Drop of_device_node_put() wrapper
  of: Remove of_dev_{get,put}()
  dt-bindings: usb: Change descibe to describe in usbmisc-imx.txt
  dt-bindings: can: rcar_canfd: Group tuples in pin control properties
  dt-bindings: power: renesas,apmu: Group tuples in cpus properties
  dt-bindings: mtd: spi-nor: Convert to DT schema format
  dt-bindings: Use portable sort for version cmp
  dt-bindings: ethernet-controller: fix fixed-link specification
  dt-bindings: irqchip: Add node name to PRUSS INTC
  dt-bindings: interconnect: Fix the expected number of cells
  dt-bindings: Fix errors in 'if' schemas
  dt-bindings: iommu: renesas,ipmmu-vmsa: Make 'power-domains' conditionally required
  dt-bindings: Fix undocumented compatible strings in examples
  kbuild: Add support to build overlays (%.dtbo)
  scripts: dtc: Remove the unused fdtdump.c file
  scripts: dtc: Build fdtoverlay tool
  scripts/dtc: Update to upstream version v1.6.0-51-g183df9e9c2b9
  scripts: dtc: Fetch fdtoverlay.c from external DTC project
  dt-bindings: thermal: sun8i: Fix misplaced schema keyword in compatible strings
  dt-bindings: iio: dac: Fix AD5686 references
  ...
parents 882d6edf cb8be8b4
......@@ -18,6 +18,7 @@
*.c.[012]*.*
*.dt.yaml
*.dtb
*.dtbo
*.dtb.S
*.dwo
*.elf
......
......@@ -10,7 +10,7 @@ DT_SCHEMA_MIN_VERSION = 2020.8.1
PHONY += check_dtschema_version
check_dtschema_version:
@{ echo $(DT_SCHEMA_MIN_VERSION); \
$(DT_DOC_CHECKER) --version 2>/dev/null || echo 0; } | sort -VC || \
$(DT_DOC_CHECKER) --version 2>/dev/null || echo 0; } | sort -Vc >/dev/null || \
{ echo "ERROR: dtschema minimum version is v$(DT_SCHEMA_MIN_VERSION)" >&2; false; }
quiet_cmd_extract_ex = DTEX $@
......
......@@ -30,8 +30,8 @@ properties:
Interrupts can be used to notify the completion of cache operations.
The number of interrupts should match to the number of CPU cores.
The specified interrupts correspond to CPU0, CPU1, ... in this order.
minItems: 1
maxItems: 4
minItems: 1
maxItems: 4
cache-unified: true
......
......@@ -61,6 +61,7 @@ properties:
maxItems: 8
calxeda,sgpio-gpio:
maxItems: 3
description: |
phandle-gpio bank, bit offset, and default on or off, which indicates
that the driver supports SGPIO indicator lights using the indicated
......
# SPDX-License-Identifier: GPL-2.0+
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-clocks.yaml#
$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-clks.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A80 USB Clock Controller Device Tree Bindings
......@@ -18,7 +18,7 @@ properties:
const: 1
compatible:
const: allwinner,sun9i-a80-usb-clocks
const: allwinner,sun9i-a80-usb-clks
reg:
maxItems: 1
......
......@@ -66,8 +66,8 @@ properties:
- arm,syscon-icst525-integratorcp-cm-mem
- arm,integrator-cm-auxosc
- arm,versatile-cm-auxosc
- arm,impd-vco1
- arm,impd-vco2
- arm,impd1-vco1
- arm,impd1-vco2
clocks:
description: Parent clock for the ICST VCO
......
......@@ -22,6 +22,7 @@ properties:
const: canaan,k210-clk
clocks:
maxItems: 1
description:
Phandle of the SoC 26MHz fixed-rate oscillator clock.
......
......@@ -155,22 +155,23 @@ properties:
power dual role.
ports:
description: OF graph bindings (specified in bindings/graph.txt) that model
any data bus to the connector unless the bus is between parent node and
the connector. Since a single connector can have multiple data buses every
bus has an assigned OF graph port number as described below.
type: object
$ref: /schemas/graph.yaml#/properties/ports
description: OF graph bindings modeling any data bus to the connector
unless the bus is between parent node and the connector. Since a single
connector can have multiple data buses every bus has an assigned OF graph
port number as described below.
properties:
port@0:
type: object
$ref: /schemas/graph.yaml#/properties/port
description: High Speed (HS), present in all connectors.
port@1:
type: object
$ref: /schemas/graph.yaml#/properties/port
description: Super Speed (SS), present in SS capable connectors.
port@2:
type: object
$ref: /schemas/graph.yaml#/properties/port
description: Sideband Use (SBU), present in USB-C. This describes the
alternate mode connection of which SBU is a part.
......
......@@ -46,8 +46,7 @@ properties:
if:
properties:
compatible:
items:
const: allwinner,sun50i-h6-crypto
const: allwinner,sun50i-h6-crypto
then:
properties:
clocks:
......
......@@ -66,7 +66,7 @@ examples:
#include <dt-bindings/soc/ti,sci_pm_domain.h>
main_crypto: crypto@4e00000 {
compatible = "ti,j721-sa2ul";
compatible = "ti,j721e-sa2ul";
reg = <0x4e00000 0x1200>;
power-domains = <&k3_pds 264 TI_SCI_PD_EXCLUSIVE>;
dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>,
......
......@@ -78,6 +78,7 @@ properties:
Phandle of the I2C controller used for DDC EDID probing
hpd-gpios:
maxItems: 1
description: >
The GPIO pin for the HDMI hotplug detect (if it doesn't appear
as an interrupt/status bit in the HDMI controller itself)
......
......@@ -37,6 +37,7 @@ properties:
Phandle of the I2C controller used for DDC EDID probing
hpd-gpios:
maxItems: 1
description: >
The GPIO pin for the HDMI hotplug detect (if it doesn't appear
as an interrupt/status bit in the HDMI controller itself)
......
......@@ -36,7 +36,7 @@ if:
properties:
compatible:
contains:
const: brcm,bcm2711-hvs"
const: brcm,bcm2711-hvs
then:
required:
......
......@@ -30,6 +30,7 @@ properties:
power supply for LCM (1.8V)
dcdc-en-gpios:
maxItems: 1
description: |
phandle of the gpio for power ic line
Power IC supply enable, High active
......
......@@ -38,7 +38,8 @@ properties:
reset-gpios: true
'mantix,tp-rstn-gpios':
mantix,tp-rstn-gpios:
maxItems: 1
description: second reset line that triggers DSI config load
backlight: true
......
......@@ -30,6 +30,7 @@ properties:
panel. The novatek,nt36672a compatible shall always be provided as a fallback.
reset-gpios:
maxItems: 1
description: phandle of gpio for reset line - This should be 8mA, gpio
can be configured using mux, pinctrl, pinctrl-names (active high)
......
......@@ -21,7 +21,7 @@ properties:
- fsl,imx8mp-dsp
reg:
description: Should contain register location and length
maxItems: 1
clocks:
items:
......
......@@ -39,8 +39,7 @@ properties:
- const: atmel,at25
reg:
description:
Chip select number.
maxItems: 1
spi-max-frequency: true
......
......@@ -19,6 +19,7 @@ properties:
const: nxp,ptn5150
int-gpios:
maxItems: 1
deprecated: true
description:
GPIO pin (input) connected to the PTN5150's INTB pin.
......@@ -31,6 +32,7 @@ properties:
maxItems: 1
vbus-gpios:
maxItems: 1
description:
GPIO pin (output) used to control VBUS. If skipped, no such control
takes place.
......
......@@ -82,6 +82,7 @@ properties:
const: 2
reset-gpios:
maxItems: 1
description:
GPIO specification for the RESET input. This is an active low signal to
the PCA953x. Not valid for Maxim MAX732x devices.
......
......@@ -46,7 +46,7 @@ examples:
#include <dt-bindings/gpio/msc313-gpio.h>
gpio: gpio@207800 {
compatible = "mstar,msc313e-gpio";
compatible = "mstar,msc313-gpio";
#gpio-cells = <2>;
reg = <0x207800 0x200>;
gpio-controller;
......
Broadcom V3D GPU
Only the Broadcom V3D 3.x and newer GPUs are covered by this binding.
For V3D 2.x, see brcm,bcm-vc4.txt.
Required properties:
- compatible: Should be "brcm,7268-v3d" or "brcm,7278-v3d"
- reg: Physical base addresses and lengths of the register areas
- reg-names: Names for the register areas. The "hub" and "core0"
register areas are always required. The "gca" register area
is required if the GCA cache controller is present. The
"bridge" register area is required if an external reset
controller is not present.
- interrupts: The interrupt numbers. The first interrupt is for the hub,
while the following interrupts are separate interrupt lines
for the cores (if they don't share the hub's interrupt).
See bindings/interrupt-controller/interrupts.txt
Optional properties:
- clocks: The core clock the unit runs on
- resets: The reset line for v3d, if not using a mapping of the bridge
See bindings/reset/reset.txt
v3d {
compatible = "brcm,7268-v3d";
reg = <0xf1204000 0x100>,
<0xf1200000 0x4000>,
<0xf1208000 0x4000>,
<0xf1204100 0x100>;
reg-names = "bridge", "hub", "core0", "gca";
interrupts = <0 78 4>,
<0 77 4>;
};
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpu/brcm,bcm-v3d.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Broadcom V3D GPU Bindings
maintainers:
- Eric Anholt <eric@anholt.net>
- Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
properties:
$nodename:
pattern: '^gpu@[a-f0-9]+$'
compatible:
enum:
- brcm,7268-v3d
- brcm,7278-v3d
reg:
items:
- description: hub register (required)
- description: core0 register (required)
- description: GCA cache controller register (if GCA controller present)
- description: bridge register (if no external reset controller)
minItems: 2
reg-names:
items:
- const: hub
- const: core0
- enum: [ bridge, gca ]
- enum: [ bridge, gca ]
minItems: 2
maxItems: 4
interrupts:
items:
- description: hub interrupt (required)
- description: core interrupts (if it doesn't share the hub's interrupt)
minItems: 1
clocks:
maxItems: 1
resets:
maxItems: 1
power-domains:
maxItems: 1
required:
- compatible
- reg
- reg-names
- interrupts
additionalProperties: false
examples:
- |
gpu@f1200000 {
compatible = "brcm,7268-v3d";
reg = <0xf1200000 0x4000>,
<0xf1208000 0x4000>,
<0xf1204000 0x100>,
<0xf1204100 0x100>;
reg-names = "hub", "core0", "bridge", "gca";
interrupts = <0 78 4>,
<0 77 4>;
};
...
Common bindings for device graphs
General concept
---------------
The hierarchical organisation of the device tree is well suited to describe
control flow to devices, but there can be more complex connections between
devices that work together to form a logical compound device, following an
arbitrarily complex graph.
There already is a simple directed graph between devices tree nodes using
phandle properties pointing to other nodes to describe connections that
can not be inferred from device tree parent-child relationships. The device
tree graph bindings described herein abstract more complex devices that can
have multiple specifiable ports, each of which can be linked to one or more
ports of other devices.
These common bindings do not contain any information about the direction or
type of the connections, they just map their existence. Specific properties
may be described by specialized bindings depending on the type of connection.
To see how this binding applies to video pipelines, for example, see
Documentation/devicetree/bindings/media/video-interfaces.txt.
Here the ports describe data interfaces, and the links between them are
the connecting data buses. A single port with multiple connections can
correspond to multiple devices being connected to the same physical bus.
Organisation of ports and endpoints
-----------------------------------
Ports are described by child 'port' nodes contained in the device node.
Each port node contains an 'endpoint' subnode for each remote device port
connected to this port. If a single port is connected to more than one
remote device, an 'endpoint' child node must be provided for each link.
If more than one port is present in a device node or there is more than one
endpoint at a port, or a port node needs to be associated with a selected
hardware interface, a common scheme using '#address-cells', '#size-cells'
and 'reg' properties is used to number the nodes.
device {
...
#address-cells = <1>;
#size-cells = <0>;
port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
endpoint@0 {
reg = <0>;
...
};
endpoint@1 {
reg = <1>;
...
};
};
port@1 {
reg = <1>;
endpoint { ... };
};
};
All 'port' nodes can be grouped under an optional 'ports' node, which
allows to specify #address-cells, #size-cells properties for the 'port'
nodes independently from any other child device nodes a device might
have.
device {
...
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
...
endpoint@0 { ... };
endpoint@1 { ... };
};
port@1 { ... };
};
};
Links between endpoints
-----------------------
Each endpoint should contain a 'remote-endpoint' phandle property that points
to the corresponding endpoint in the port of the remote device. In turn, the
remote endpoint should contain a 'remote-endpoint' property. If it has one, it
must not point to anything other than the local endpoint. Two endpoints with
their 'remote-endpoint' phandles pointing at each other form a link between the
containing ports.
device-1 {
port {
device_1_output: endpoint {
remote-endpoint = <&device_2_input>;
};
};
};
device-2 {
port {
device_2_input: endpoint {
remote-endpoint = <&device_1_output>;
};
};
};
Required properties
-------------------
If there is more than one 'port' or more than one 'endpoint' node or 'reg'
property present in the port and/or endpoint nodes then the following
properties are required in a relevant parent node:
- #address-cells : number of cells required to define port/endpoint
identifier, should be 1.
- #size-cells : should be zero.
Optional endpoint properties
----------------------------
- remote-endpoint: phandle to an 'endpoint' subnode of a remote device node.
This file has moved to graph.yaml in dt-schema repo
......@@ -17,7 +17,7 @@ maintainers:
properties:
compatible:
const: nuvoton,npcm7xx-i2c
const: nuvoton,npcm750-i2c
reg:
maxItems: 1
......
......@@ -40,6 +40,7 @@ properties:
ADC reference voltage supply
adi,sync-in-gpios:
maxItems: 1
description:
Enables synchronization of multiple devices that require simultaneous
sampling. A pulse is always required if the configuration is changed
......@@ -76,6 +77,7 @@ patternProperties:
properties:
reg:
maxItems: 1
description: |
The channel number.
......
......@@ -23,6 +23,7 @@ properties:
maxItems: 1
clocks:
maxItems: 1
description:
Input clock used to derive the sample clock. Expected to be the
SoC's APB clock.
......
......@@ -20,7 +20,7 @@ properties:
description: Power supply for the reference voltage
reg:
description: spi chipselect number according to the usual spi bindings
maxItems: 1
spi-max-frequency:
description: maximal spi bus frequency supported
......
......@@ -68,6 +68,7 @@ patternProperties:
properties:
reg:
maxItems: 1
description: |
ADC channel number.
See include/dt-bindings/iio/qcom,spmi-vadc.h
......
......@@ -41,6 +41,8 @@ properties:
maxItems: 2
clocks:
minItems: 1
maxItems: 2
description: |
Core can use up to two clocks, depending on part used:
- "adc" clock: for the analog circuitry, common to all ADCs.
......
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/dac/adi,ad5686.yaml#
$id: http://devicetree.org/schemas/iio/dac/adi,ad5696.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices AD5686 and similar multi-channel DACs
title: Analog Devices AD5696 and similar multi-channel DACs
maintainers:
- Michael Auchter <michael.auchter@ni.com>
description: |
Binding for Analog Devices AD5686 and similar multi-channel DACs
Binding for Analog Devices AD5696 and similar multi-channel DACs
properties:
compatible:
......@@ -48,8 +48,8 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
ad5686: dac@0 {
compatible = "adi,ad5686";
ad5696: dac@0 {
compatible = "adi,ad5696";
reg = <0>;
vcc-supply = <&dac_vref>;
};
......
......@@ -11,7 +11,7 @@ maintainers:
properties:
compatible:
const: ti,afe4403
const: ti,afe4404
reg:
maxItems: 1
......
......@@ -47,6 +47,7 @@ properties:
description: an optional 3x3 mounting rotation matrix.
reset-gpios:
maxItems: 1
description: |
an optional pin needed for AK09911 to set the reset state. This should
be usually active low
......
......@@ -25,6 +25,7 @@ properties:
maxItems: 1
reset-gpios:
maxItems: 1
description:
Active low signal to the AD5272 RESET input.
......
......@@ -29,6 +29,7 @@ properties:
description: touchscreen can be used as a wakeup source.
reset-gpios:
maxItems: 1
description: reset gpio the chip is connected to.
vcc33-supply:
......
......@@ -69,7 +69,7 @@ properties:
- qcom,sm8250-system-noc
'#interconnect-cells':
const: 1
enum: [ 1, 2 ]
qcom,bcm-voters:
$ref: /schemas/types.yaml#/definitions/phandle-array
......
......@@ -31,7 +31,7 @@ properties:
The 1st cell is hw interrupt number, the 2nd cell is channel index.
clocks:
description: ipg clock.
maxItems: 1
clock-names:
const: ipg
......
......@@ -36,6 +36,8 @@ properties:
Reference to a phandle of a hardware spinlock provider node.
interrupts:
minItems: 1
maxItems: 96
description:
Interrupts references to primary interrupt controller
......
......@@ -33,6 +33,9 @@ description: |
corresponding PRUSS node. The node should be named "interrupt-controller".
properties:
$nodename:
pattern: "^interrupt-controller@[0-9a-f]+$"
compatible:
enum:
- ti,pruss-intc
......
......@@ -76,7 +76,6 @@ required:
- compatible
- reg
- '#iommu-cells'
- power-domains
oneOf:
- required:
......@@ -86,6 +85,17 @@ oneOf:
additionalProperties: false
allOf:
- if:
properties:
compatible:
not:
contains:
const: renesas,ipmmu-vmsa
then:
required:
- power-domains
examples:
- |
#include <dt-bindings/clock/r8a7791-cpg-mssr.h>
......@@ -93,7 +103,7 @@ examples:
#include <dt-bindings/power/r8a7791-sysc.h>
ipmmu_mx: iommu@fe951000 {
compatible = "renasas,ipmmu-r8a7791", "renasas,ipmmu-vmsa";
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
reg = <0xfe951000 0x1000>;
interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
......
......@@ -69,6 +69,7 @@ patternProperties:
if:
patternProperties:
"^gpio@[0-6]$":
type: object
properties:
compatible:
contains:
......
......@@ -53,6 +53,7 @@ properties:
maxItems: 1
memory-region:
maxItems: 1
description:
CMA pool to use for buffers allocation instead of the default
CMA pool.
......
......@@ -40,6 +40,7 @@ properties:
Digital core voltage supply, 1.2 volts
reset-gpios:
maxItems: 1
description: |-
Reference to the GPIO connected to the xclr pin, if any.
Must be released (set high) after all supplies are applied.
......
......@@ -28,6 +28,8 @@ properties:
const: 1
ranges:
minItems: 1
maxItems: 4
description: |
Reflects the memory layout with four integer values per bank. Format:
<bank-number> 0 <parent address of bank> <size>
......
......@@ -15,6 +15,7 @@ properties:
const: "fsl,dpaa2-console"
reg:
maxItems: 1
description: A standard property. Specifies the region where the MCFBA
(MC firmware base address) register can be found.
......
......@@ -40,6 +40,7 @@ properties:
There is no card detection available; polling must be used.
cd-gpios:
maxItems: 1
description:
The card detection will be done using the GPIO provided.
......@@ -104,6 +105,7 @@ properties:
line. Not used in combination with eMMC or SDIO.
wp-gpios:
maxItems: 1
description:
GPIO to use for the write-protect detection.
......
......@@ -124,7 +124,7 @@ required:
if:
properties:
compatible:
items:
contains:
enum:
- renesas,sdhi-r7s72100
- renesas,sdhi-r7s9210
......
* SPI NOR flash: ST M25Pxx (and similar) serial flash chips
Required properties:
- #address-cells, #size-cells : Must be present if the device has sub-nodes
representing partitions.
- compatible : May include a device-specific string consisting of the
manufacturer and name of the chip. A list of supported chip
names follows.
Must also include "jedec,spi-nor" for any SPI NOR flash that can
be identified by the JEDEC READ ID opcode (0x9F).
Supported chip names:
at25df321a
at25df641
at26df081a
mr25h128
mr25h256
mr25h10
mr25h40
mx25l4005a
mx25l1606e
mx25l6405d
mx25l12805d
mx25l25635e
n25q064
n25q128a11
n25q128a13
n25q512a
s25fl256s1
s25fl512s
s25sl12801
s25fl008k
s25fl064k
sst25vf040b
m25p40
m25p80
m25p16
m25p32
m25p64
m25p128
w25x80
w25x32
w25q32
w25q64
w25q32dw
w25q80bl
w25q128
w25q256
The following chip names have been used historically to
designate quirky versions of flash chips that do not support the
JEDEC READ ID opcode (0x9F):
m25p05-nonjedec
m25p10-nonjedec
m25p20-nonjedec
m25p40-nonjedec
m25p80-nonjedec
m25p16-nonjedec
m25p32-nonjedec
m25p64-nonjedec
m25p128-nonjedec
- reg : Chip-Select number
- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at
Optional properties:
- m25p,fast-read : Use the "fast read" opcode to read data from the chip instead
of the usual "read" opcode. This opcode is not supported by
all chips and support for it can not be detected at runtime.
Refer to your chips' datasheet to check if this is supported
by your chip.
- broken-flash-reset : Some flash devices utilize stateful addressing modes
(e.g., for 32-bit addressing) which need to be managed
carefully by a system. Because these sorts of flash don't
have a standardized software reset command, and because some
systems don't toggle the flash RESET# pin upon system reset
(if the pin even exists at all), there are systems which
cannot reboot properly if the flash is left in the "wrong"
state. This boolean flag can be used on such systems, to
denote the absence of a reliable reset mechanism.
Example:
flash: m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spansion,m25p80", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
m25p,fast-read;
};
# SPDX-License-Identifier: GPL-2.0-only
%YAML 1.2
---
$id: http://devicetree.org/schemas/mtd/jedec,spi-nor.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: SPI NOR flash ST M25Pxx (and similar) serial flash chips
maintainers:
- Rob Herring <robh@kernel.org>
properties:
compatible:
oneOf:
- items:
- pattern: "^((((micron|spansion|st),)?\
(m25p(40|80|16|32|64|128)|\
n25q(32b|064|128a11|128a13|256a|512a|164k)))|\
atmel,at25df(321a|641|081a)|\
everspin,mr25h(10|40|128|256)|\
(mxicy|macronix),mx25l(4005a|1606e|6405d|8005|12805d|25635e)|\
(mxicy|macronix),mx25u(4033|4035)|\
(spansion,)?s25fl(128s|256s1|512s|008k|064k|164k)|\
(sst|microchip),sst25vf(016b|032b|040b)|\
(sst,)?sst26wf016b|\
(sst,)?sst25wf(040b|080)|\
winbond,w25x(80|32)|\
(winbond,)?w25q(16|32(w|dw)?|64(dw)?|80bl|128(fw)?|256))$"
- const: jedec,spi-nor
- items:
- enum:
- issi,is25lp016d
- micron,mt25qu02g
- mxicy,mx25r1635f
- mxicy,mx25u6435f
- mxicy,mx25v8035f
- spansion,s25sl12801
- spansion,s25fs512s
- const: jedec,spi-nor
- const: jedec,spi-nor
description:
Must also include "jedec,spi-nor" for any SPI NOR flash that can be
identified by the JEDEC READ ID opcode (0x9F).
reg:
maxItems: 1
spi-max-frequency: true
spi-rx-bus-width: true
spi-tx-bus-width: true
m25p,fast-read:
type: boolean
description:
Use the "fast read" opcode to read data from the chip instead of the usual
"read" opcode. This opcode is not supported by all chips and support for
it can not be detected at runtime. Refer to your chips' datasheet to check
if this is supported by your chip.
broken-flash-reset:
type: boolean
description:
Some flash devices utilize stateful addressing modes (e.g., for 32-bit
addressing) which need to be managed carefully by a system. Because these
sorts of flash don't have a standardized software reset command, and
because some systems don't toggle the flash RESET# pin upon system reset
(if the pin even exists at all), there are systems which cannot reboot
properly if the flash is left in the "wrong" state. This boolean flag can
be used on such systems, to denote the absence of a reliable reset
mechanism.
label: true
partitions:
type: object
'#address-cells': true
'#size-cells': true
patternProperties:
# Note: use 'partitions' node for new users
'^partition@':
type: object
additionalProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spansion,m25p80", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
m25p,fast-read;
};
};
...
......@@ -97,7 +97,7 @@ E.g. below enables Channel 0 alone in the board using External clock
as fCAN clock.
&canfd {
pinctrl-0 = <&canfd0_pins &can_clk_pins>;
pinctrl-0 = <&canfd0_pins>, <&can_clk_pins>;
pinctrl-names = "default";
status = "okay";
......
......@@ -206,6 +206,11 @@ properties:
Indicates that full-duplex is used. When absent, half
duplex is assumed.
pause:
$ref: /schemas/types.yaml#definitions/flag
description:
Indicates that pause should be enabled.
asym-pause:
$ref: /schemas/types.yaml#/definitions/flag
description:
......
......@@ -72,6 +72,7 @@ properties:
dma-coherent: true
clocks:
maxItems: 1
description: CPSWxG NUSS functional clock
clock-names:
......
......@@ -59,6 +59,7 @@ properties:
- const: cpts
clocks:
maxItems: 1
description: CPTS reference clock
clock-names:
......
......@@ -51,9 +51,11 @@ properties:
- const: usb2_reset
usb0_id_det-gpios:
maxItems: 1
description: GPIO to the USB OTG ID pin
usb0_vbus_det-gpios:
maxItems: 1
description: GPIO to the USB OTG VBUS detect pin
usb0_vbus_power-supply:
......
......@@ -50,9 +50,11 @@ properties:
- const: usb1_reset
usb0_id_det-gpios:
maxItems: 1
description: GPIO to the USB OTG ID pin
usb0_vbus_det-gpios:
maxItems: 1
description: GPIO to the USB OTG VBUS detect pin
usb0_vbus_power-supply:
......
......@@ -50,9 +50,11 @@ properties:
- const: usb3_reset
usb0_id_det-gpios:
maxItems: 1
description: GPIO to the USB OTG ID pin
usb0_vbus_det-gpios:
maxItems: 1
description: GPIO to the USB OTG VBUS detect pin
usb0_vbus_power-supply:
......
......@@ -45,9 +45,11 @@ properties:
- const: usb1_reset
usb0_id_det-gpios:
maxItems: 1
description: GPIO to the USB OTG ID pin
usb0_vbus_det-gpios:
maxItems: 1
description: GPIO to the USB OTG VBUS detect pin
usb0_vbus_power-supply:
......
......@@ -54,9 +54,11 @@ properties:
- const: usb2_reset
usb0_id_det-gpios:
maxItems: 1
description: GPIO to the USB OTG ID pin
usb0_vbus_det-gpios:
maxItems: 1
description: GPIO to the USB OTG VBUS detect pin
usb0_vbus_power-supply:
......
......@@ -50,9 +50,11 @@ properties:
- const: usb1_reset
usb0_id_det-gpios:
maxItems: 1
description: GPIO to the USB OTG ID pin
usb0_vbus_det-gpios:
maxItems: 1
description: GPIO to the USB OTG VBUS detect pin
usb0_vbus_power-supply:
......
......@@ -56,9 +56,11 @@ properties:
- const: usb2_reset
usb0_id_det-gpios:
maxItems: 1
description: GPIO to the USB OTG ID pin
usb0_vbus_det-gpios:
maxItems: 1
description: GPIO to the USB OTG VBUS detect pin
usb0_vbus_power-supply:
......
......@@ -62,9 +62,11 @@ properties:
- const: usb3_reset
usb0_id_det-gpios:
maxItems: 1
description: GPIO to the USB OTG ID pin
usb0_vbus_det-gpios:
maxItems: 1
description: GPIO to the USB OTG VBUS detect pin
usb0_vbus_power-supply:
......
......@@ -56,9 +56,11 @@ properties:
- const: usb2_reset
usb0_id_det-gpios:
maxItems: 1
description: GPIO to the USB OTG ID pin
usb0_vbus_det-gpios:
maxItems: 1
description: GPIO to the USB OTG VBUS detect pin
usb0_vbus_power-supply:
......
......@@ -42,9 +42,11 @@ properties:
const: usb0_reset
usb0_id_det-gpios:
maxItems: 1
description: GPIO to the USB OTG ID pin
usb0_vbus_det-gpios:
maxItems: 1
description: GPIO to the USB OTG VBUS detect pin
usb0_vbus_power-supply:
......
......@@ -22,7 +22,8 @@ properties:
clocks:
anyOf:
- description: Main PHY Clock
- maxItems: 1
description: Main PHY Clock
- items:
- description: Main PHY clock
......@@ -39,20 +40,16 @@ properties:
- const: hsic_480M
resets:
anyOf:
minItems: 1
items:
- description: Normal USB PHY reset
- items:
- description: Normal USB PHY reset
- description: HSIC Reset
- description: HSIC Reset
reset-names:
oneOf:
minItems: 1
items:
- const: phy
- items:
- const: phy
- const: hsic
- const: hsic
phy_type:
const: hsic
......
......@@ -99,8 +99,7 @@ patternProperties:
if:
properties:
compatible:
items:
const: brcm,iproc-ns2-sata-phy
const: brcm,iproc-ns2-sata-phy
then:
properties:
reg:
......
......@@ -81,9 +81,8 @@ properties:
if:
properties:
compatible:
items:
enum:
- renesas,usb2-phy-r7s9210
contains:
const: renesas,usb2-phy-r7s9210
then:
required:
- clock-names
......
......@@ -20,7 +20,7 @@ properties:
- socionext,uniphier-pxs3-ahci-phy
reg:
description: PHY register region (offset and length)
maxItems: 1
"#phy-cells":
const: 0
......
......@@ -21,7 +21,7 @@ properties:
- socionext,uniphier-pxs3-pcie-phy
reg:
description: PHY register region (offset and length)
maxItems: 1
"#phy-cells":
const: 0
......
......@@ -24,7 +24,7 @@ properties:
- socionext,uniphier-pxs3-usb3-hsphy
reg:
description: PHY register region (offset and length)
maxItems: 1
"#phy-cells":
const: 0
......
......@@ -25,7 +25,7 @@ properties:
- socionext,uniphier-pxs3-usb3-ssphy
reg:
description: PHY register region (offset and length)
maxItems: 1
"#phy-cells":
const: 0
......
......@@ -55,7 +55,7 @@ properties:
- ti,am654-phy-gmii-sel
reg:
description: Address and length of the register set for the device
maxItems: 1
'#phy-cells': true
......
......@@ -23,8 +23,7 @@ properties:
compatible:
const: aspeed,ast2400-pinctrl
reg:
description: |
A hint for the memory regions associated with the pin-controller
maxItems: 2
patternProperties:
'^.*$':
......@@ -63,7 +62,7 @@ examples:
reg = <0x1e6e2000 0x1a8>;
pinctrl: pinctrl {
compatible = "aspeed,g4-pinctrl";
compatible = "aspeed,ast2400-pinctrl";
pinctrl_i2c3_default: i2c3_default {
function = "I2C3";
......
......@@ -24,8 +24,8 @@ properties:
compatible:
const: aspeed,ast2500-pinctrl
reg:
description: |
A hint for the memory regions associated with the pin-controller
maxItems: 2
aspeed,external-nodes:
minItems: 2
maxItems: 2
......@@ -81,7 +81,7 @@ examples:
reg = <0x1e6e2000 0x1a8>;
pinctrl: pinctrl {
compatible = "aspeed,g5-pinctrl";
compatible = "aspeed,ast2500-pinctrl";
aspeed,external-nodes = <&gfx>, <&lhc>;
pinctrl_i2c3_default: i2c3_default {
......
......@@ -95,7 +95,7 @@ examples:
reg = <0x1e6e2000 0xf6c>;
pinctrl: pinctrl {
compatible = "aspeed,g6-pinctrl";
compatible = "aspeed,ast2600-pinctrl";
pinctrl_pwm10g1_default: pwm10g1_default {
function = "PWM10";
......
......@@ -76,11 +76,10 @@ required:
if:
properties:
compatible:
items:
enum:
- renesas,pfc-r8a73a4
- renesas,pfc-r8a7740
- renesas,pfc-sh73a0
enum:
- renesas,pfc-r8a73a4
- renesas,pfc-r8a7740
- renesas,pfc-sh73a0
then:
required:
- interrupts-extended
......
......@@ -52,5 +52,5 @@ examples:
apmu@e6152000 {
compatible = "renesas,r8a7791-apmu", "renesas,apmu";
reg = <0xe6152000 0x188>;
cpus = <&cpu0 &cpu1>;
cpus = <&cpu0>, <&cpu1>;
};
......@@ -70,6 +70,7 @@ properties:
description: Enables bypass mode at boot time
interrupts:
maxItems: 1
description: |
Indicates that the device state has changed.
......
......@@ -59,9 +59,7 @@ additionalProperties: false
examples:
- |
i2c@1 {
compatible = "abc,acme-1234";
reg = <0x01 0x400>;
i2c {
#address-cells = <1>;
#size-cells = <0>;
phc@5b {
......
......@@ -44,7 +44,7 @@ properties:
- const: vpu
interrupts:
description: VPU hardware interrupt
maxItems: 1
required:
- compatible
......
......@@ -70,10 +70,13 @@ properties:
the firmware image.
clocks:
maxItems: 1
description: |
Main functional clock for the remote processor
resets:
minItems: 1
maxItems: 2
description: |
Reset handles for the remote processor
......
......@@ -63,6 +63,7 @@ properties:
next-level-cache: true
memory-region:
maxItems: 1
description: |
The reference to the reserved-memory for the L2 Loosely Integrated Memory region.
The reserved memory node should be defined as per the bindings in reserved-memory.txt.
......
......@@ -82,6 +82,8 @@ properties:
maxItems: 1
dmas:
minItems: 2
maxItems: 4
description:
Must contain a list of pairs of references to DMA specifiers, one for
transmission, and one for reception.
......
......@@ -120,6 +120,8 @@ properties:
maxItems: 1
dmas:
minItems: 2
maxItems: 4
description:
Must contain a list of pairs of references to DMA specifiers, one for
transmission, and one for reception.
......
......@@ -55,6 +55,8 @@ properties:
maxItems: 1
dmas:
minItems: 2
maxItems: 4
description:
Must contain a list of pairs of references to DMA specifiers, one for
transmission, and one for reception.
......
......@@ -55,6 +55,8 @@ properties:
maxItems: 1
dmas:
minItems: 2
maxItems: 4
description:
Must contain a list of pairs of references to DMA specifiers, one for
transmission, and one for reception.
......
......@@ -88,6 +88,7 @@ properties:
description: Phandle to the codec analog controls in the PRCM
allwinner,pa-gpios:
maxItems: 1
description: GPIO to enable the external amplifier
required:
......
......@@ -55,6 +55,7 @@ patternProperties:
maxItems: 1
reg:
maxItems: 1
description: dai link address.
cpu:
......
......@@ -62,12 +62,15 @@ properties:
description: Supply for the micbias on the headset mic
earpath-sel-gpios:
maxItems: 1
description: GPIO for switching between tv-out and mic paths
headset-detect-gpios:
maxItems: 1
description: GPIO for detection of headset insertion
headset-key-gpios:
maxItems: 1
description: GPIO for detection of headset key press
io-channels:
......
......@@ -53,9 +53,11 @@ properties:
description: Supply for the micbias on the Sub microphone
fm-sel-gpios:
maxItems: 1
description: GPIO pin for FM selection
lineout-sel-gpios:
maxItems: 1
description: GPIO pin for line out selection
required:
......
......@@ -36,10 +36,12 @@ properties:
I2C address of the device can be one of these 0x4c, 0x4d, 0x4e or 0x4f
shut-down-gpios:
maxItems: 1
description: GPIO used to control the state of the device.
deprecated: true
shutdown-gpios:
maxItems: 1
description: GPIO used to control the state of the device.
interrupts:
......
......@@ -27,9 +27,11 @@ properties:
I2C address of the device can be between 0x41 to 0x48.
reset-gpio:
maxItems: 1
description: GPIO used to reset the device.
shutdown-gpios:
maxItems: 1
description: GPIO used to control the state of the device.
interrupts:
......
......@@ -35,6 +35,7 @@ properties:
I2C addresss of the device can be one of these 0x4c, 0x4d, 0x4e or 0x4f
reset-gpios:
maxItems: 1
description: |
GPIO used for hardware reset.
......
......@@ -68,6 +68,8 @@ properties:
maxItems: 1
dmas:
minItems: 2
maxItems: 4
description:
Must contain a list of pairs of references to DMA specifiers, one for
transmission, and one for reception.
......
......@@ -35,6 +35,7 @@ properties:
maxItems: 1
clocks:
maxItems: 1
description:
A list of phandle and clock specifier pair that controls the single
SRAM clock.
......@@ -46,6 +47,7 @@ properties:
const: 1
ranges:
maxItems: 1
description:
Should translate from local addresses within the sram to bus addresses.
......
......@@ -103,12 +103,12 @@ allOf:
compatible:
contains:
enum:
- const: allwinner,sun8i-h3-ths
- const: allwinner,sun8i-r40-ths
- const: allwinner,sun50i-a64-ths
- const: allwinner,sun50i-a100-ths
- const: allwinner,sun50i-h5-ths
- const: allwinner,sun50i-h6-ths
- allwinner,sun8i-h3-ths
- allwinner,sun8i-r40-ths
- allwinner,sun50i-a64-ths
- allwinner,sun50i-a100-ths
- allwinner,sun50i-h5-ths
- allwinner,sun50i-h6-ths
then:
required:
......
......@@ -22,6 +22,8 @@ properties:
maxItems: 1
interrupts:
minItems: 2
maxItems: 6
description:
List of timers interrupts
......
......@@ -46,8 +46,7 @@ required:
if:
properties:
compatible:
items:
const: allwinner,sun5i-a13-hstimer
const: allwinner,sun5i-a13-hstimer
then:
properties:
......
......@@ -18,7 +18,7 @@ properties:
- const: intel,ixp4xx-timer
reg:
description: Should contain registers location and length
maxItems: 1
interrupts:
minItems: 1
......
......@@ -39,7 +39,7 @@ properties:
maxItems: 1
phys:
description: PHY specifier for the OTG PHY
maxItems: 1
phy-names:
const: usb
......
......@@ -22,6 +22,8 @@ properties:
description: Interrupt for signals mirrored to out-gpios.
in-gpios:
minItems: 1
maxItems: 2
description: Array of one or two GPIO pins used for input signals.
brcm,in-functions:
......@@ -33,6 +35,7 @@ properties:
description: Array of enable and mask pairs, one per gpio in-gpios.
out-gpios:
maxItems: 1
description: Array of one GPIO pin used for output signals.
brcm,out-functions:
......
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