Commit a99f501f authored by Bjorn Helgaas's avatar Bjorn Helgaas

Merge branch 'remotes/lorenzo/pci/xilinx-nwl'

- Declare bitmap correctly and as part of struct nwl_msi managed resource
  (Christophe JAILLET)

* remotes/lorenzo/pci/xilinx-nwl:
  PCI: xilinx-nwl: Simplify code and fix a memory leak
parents 18b026da 61f0aa4d
...@@ -146,7 +146,7 @@ ...@@ -146,7 +146,7 @@
struct nwl_msi { /* MSI information */ struct nwl_msi { /* MSI information */
struct irq_domain *msi_domain; struct irq_domain *msi_domain;
unsigned long *bitmap; DECLARE_BITMAP(bitmap, INT_PCI_MSI_NR);
struct irq_domain *dev_domain; struct irq_domain *dev_domain;
struct mutex lock; /* protect bitmap variable */ struct mutex lock; /* protect bitmap variable */
int irq_msi0; int irq_msi0;
...@@ -335,12 +335,10 @@ static void nwl_pcie_leg_handler(struct irq_desc *desc) ...@@ -335,12 +335,10 @@ static void nwl_pcie_leg_handler(struct irq_desc *desc)
static void nwl_pcie_handle_msi_irq(struct nwl_pcie *pcie, u32 status_reg) static void nwl_pcie_handle_msi_irq(struct nwl_pcie *pcie, u32 status_reg)
{ {
struct nwl_msi *msi; struct nwl_msi *msi = &pcie->msi;
unsigned long status; unsigned long status;
u32 bit; u32 bit;
msi = &pcie->msi;
while ((status = nwl_bridge_readl(pcie, status_reg)) != 0) { while ((status = nwl_bridge_readl(pcie, status_reg)) != 0) {
for_each_set_bit(bit, &status, 32) { for_each_set_bit(bit, &status, 32) {
nwl_bridge_writel(pcie, 1 << bit, status_reg); nwl_bridge_writel(pcie, 1 << bit, status_reg);
...@@ -560,30 +558,21 @@ static int nwl_pcie_enable_msi(struct nwl_pcie *pcie) ...@@ -560,30 +558,21 @@ static int nwl_pcie_enable_msi(struct nwl_pcie *pcie)
struct nwl_msi *msi = &pcie->msi; struct nwl_msi *msi = &pcie->msi;
unsigned long base; unsigned long base;
int ret; int ret;
int size = BITS_TO_LONGS(INT_PCI_MSI_NR) * sizeof(long);
mutex_init(&msi->lock); mutex_init(&msi->lock);
msi->bitmap = kzalloc(size, GFP_KERNEL);
if (!msi->bitmap)
return -ENOMEM;
/* Get msi_1 IRQ number */ /* Get msi_1 IRQ number */
msi->irq_msi1 = platform_get_irq_byname(pdev, "msi1"); msi->irq_msi1 = platform_get_irq_byname(pdev, "msi1");
if (msi->irq_msi1 < 0) { if (msi->irq_msi1 < 0)
ret = -EINVAL; return -EINVAL;
goto err;
}
irq_set_chained_handler_and_data(msi->irq_msi1, irq_set_chained_handler_and_data(msi->irq_msi1,
nwl_pcie_msi_handler_high, pcie); nwl_pcie_msi_handler_high, pcie);
/* Get msi_0 IRQ number */ /* Get msi_0 IRQ number */
msi->irq_msi0 = platform_get_irq_byname(pdev, "msi0"); msi->irq_msi0 = platform_get_irq_byname(pdev, "msi0");
if (msi->irq_msi0 < 0) { if (msi->irq_msi0 < 0)
ret = -EINVAL; return -EINVAL;
goto err;
}
irq_set_chained_handler_and_data(msi->irq_msi0, irq_set_chained_handler_and_data(msi->irq_msi0,
nwl_pcie_msi_handler_low, pcie); nwl_pcie_msi_handler_low, pcie);
...@@ -592,8 +581,7 @@ static int nwl_pcie_enable_msi(struct nwl_pcie *pcie) ...@@ -592,8 +581,7 @@ static int nwl_pcie_enable_msi(struct nwl_pcie *pcie)
ret = nwl_bridge_readl(pcie, I_MSII_CAPABILITIES) & MSII_PRESENT; ret = nwl_bridge_readl(pcie, I_MSII_CAPABILITIES) & MSII_PRESENT;
if (!ret) { if (!ret) {
dev_err(dev, "MSI not present\n"); dev_err(dev, "MSI not present\n");
ret = -EIO; return -EIO;
goto err;
} }
/* Enable MSII */ /* Enable MSII */
...@@ -632,10 +620,6 @@ static int nwl_pcie_enable_msi(struct nwl_pcie *pcie) ...@@ -632,10 +620,6 @@ static int nwl_pcie_enable_msi(struct nwl_pcie *pcie)
nwl_bridge_writel(pcie, MSGF_MSI_SR_LO_MASK, MSGF_MSI_MASK_LO); nwl_bridge_writel(pcie, MSGF_MSI_SR_LO_MASK, MSGF_MSI_MASK_LO);
return 0; return 0;
err:
kfree(msi->bitmap);
msi->bitmap = NULL;
return ret;
} }
static int nwl_pcie_bridge_init(struct nwl_pcie *pcie) static int nwl_pcie_bridge_init(struct nwl_pcie *pcie)
......
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