x86/cpufeatures: Add Intel feature bits for Speculation Control

CVE-2018-3639 (x86)

Add three feature bits exposed by new microcode on Intel CPUs for
speculation control.
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Borislav Petkov <bp@suse.de>
Cc: gnomes@lxorguk.ukuu.org.uk
Cc: ak@linux.intel.com
Cc: ashok.raj@intel.com
Cc: dave.hansen@intel.com
Cc: karahmed@amazon.de
Cc: arjan@linux.intel.com
Cc: torvalds@linux-foundation.org
Cc: peterz@infradead.org
Cc: bp@alien8.de
Cc: pbonzini@redhat.com
Cc: tim.c.chen@linux.intel.com
Cc: gregkh@linux-foundation.org
Link: https://lkml.kernel.org/r/1516896855-7642-3-git-send-email-dwmw@amazon.co.uk

(backported from commit fc67dd70)
[juergh:
 - Context adjustments.
 - Use feature word 16 instead of 18.
 - Remove existing SPEC_CTRL feature bit from scatter list (now that it's
   part of the leaf).]
Signed-off-by: Juerg Haefliger <juergh@canonical.com>

arch/x86/include/asm/cpufeatures.h

@@ -195,7 +195,6 @@
 
 #define X86_FEATURE_INTEL_PT	( 7*32+15) /* Intel Processor Trace */
 #define X86_FEATURE_RSB_CTXSW	( 7*32+19) /* Fill RSB on context switches */
-#define X86_FEATURE_SPEC_CTRL	( 7*32+20) /* Control Speculation Control */
 #define X86_FEATURE_RETPOLINE	( 7*32+29) /* Generic Retpoline mitigation for Spectre variant 2 */
 #define X86_FEATURE_RETPOLINE_AMD ( 7*32+30) /* AMD Retpoline mitigation for Spectre variant 2 */
 /* Because the ALTERNATIVE scheme is for members of the X86_FEATURE club... */
@@ -281,6 +280,9 @@
 #define X86_FEATURE_AVIC	(15*32+13) /* Virtual Interrupt Controller */
 
 /* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 16 */
+#define X86_FEATURE_SPEC_CTRL		(16*32+26) /* Speculation Control (IBRS + IBPB) */
+#define X86_FEATURE_STIBP		(16*32+27) /* Single Thread Indirect Branch Predictors */
+#define X86_FEATURE_ARCH_CAPABILITIES	(16*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */
 
 /*
  * BUG word(s)

arch/x86/kernel/cpu/scattered.c

@@ -29,7 +29,6 @@ static const struct cpuid_bit cpuid_bits[] = {
 	{ X86_FEATURE_INTEL_PT,		CR_EBX,25, 0x00000007, 0 },
 	{ X86_FEATURE_APERFMPERF,	CR_ECX, 0, 0x00000006, 0 },
 	{ X86_FEATURE_EPB,		CR_ECX, 3, 0x00000006, 0 },
-	{ X86_FEATURE_SPEC_CTRL,	CR_EDX,26, 0x00000007, 0 },
 	{ X86_FEATURE_HW_PSTATE,	CR_EDX, 7, 0x80000007, 0 },
 	{ X86_FEATURE_CPB,		CR_EDX, 9, 0x80000007, 0 },
 	{ X86_FEATURE_PROC_FEEDBACK,	CR_EDX,11, 0x80000007, 0 },