Commit aa5f59df authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman

powerpc: Remove CONFIG_PPC_BOOK3E_MMU

CONFIG_PPC_BOOK3E_MMU is redundant with CONFIG_PPC_E500.

Remove it.

Also rename mmu-book3e.h to mmu-e500.h
Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/c5549cd59a131204ff94ab909cad2e2dad4ddf2f.1663606876.git.christophe.leroy@csgroup.eu
parent 3e731858
...@@ -8,9 +8,9 @@ ...@@ -8,9 +8,9 @@
#elif defined(CONFIG_44x) #elif defined(CONFIG_44x)
/* 44x-style software loaded TLB */ /* 44x-style software loaded TLB */
#include <asm/nohash/32/mmu-44x.h> #include <asm/nohash/32/mmu-44x.h>
#elif defined(CONFIG_PPC_BOOK3E_MMU) #elif defined(CONFIG_PPC_E500)
/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */ /* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
#include <asm/nohash/mmu-book3e.h> #include <asm/nohash/mmu-e500.h>
#elif defined (CONFIG_PPC_8xx) #elif defined (CONFIG_PPC_8xx)
/* Motorola/Freescale 8xx software loaded TLB */ /* Motorola/Freescale 8xx software loaded TLB */
#include <asm/nohash/32/mmu-8xx.h> #include <asm/nohash/32/mmu-8xx.h>
......
...@@ -12,7 +12,7 @@ ...@@ -12,7 +12,7 @@
#include <asm/processor.h> #include <asm/processor.h>
#include <asm/cputable.h> #include <asm/cputable.h>
#include <asm/ppc_asm.h> #include <asm/ppc_asm.h>
#include <asm/nohash/mmu-book3e.h> #include <asm/nohash/mmu-e500.h>
#include <asm/asm-offsets.h> #include <asm/asm-offsets.h>
#include <asm/mpc85xx.h> #include <asm/mpc85xx.h>
......
...@@ -488,7 +488,7 @@ _ASM_NOKPROBE_SYMBOL(interrupt_return) ...@@ -488,7 +488,7 @@ _ASM_NOKPROBE_SYMBOL(interrupt_return)
mtspr SPRN_##exc_lvl_srr0,r9; \ mtspr SPRN_##exc_lvl_srr0,r9; \
mtspr SPRN_##exc_lvl_srr1,r10; mtspr SPRN_##exc_lvl_srr1,r10;
#if defined(CONFIG_PPC_BOOK3E_MMU) #if defined(CONFIG_PPC_E500)
#ifdef CONFIG_PHYS_64BIT #ifdef CONFIG_PHYS_64BIT
#define RESTORE_MAS7 \ #define RESTORE_MAS7 \
lwz r11,MAS7(r1); \ lwz r11,MAS7(r1); \
......
...@@ -242,7 +242,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV) ...@@ -242,7 +242,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
.macro SAVE_MMU_REGS .macro SAVE_MMU_REGS
#ifdef CONFIG_PPC_BOOK3E_MMU #ifdef CONFIG_PPC_E500
mfspr r0,SPRN_MAS0 mfspr r0,SPRN_MAS0
stw r0,MAS0(r1) stw r0,MAS0(r1)
mfspr r0,SPRN_MAS1 mfspr r0,SPRN_MAS1
...@@ -257,7 +257,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV) ...@@ -257,7 +257,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
mfspr r0,SPRN_MAS7 mfspr r0,SPRN_MAS7
stw r0,MAS7(r1) stw r0,MAS7(r1)
#endif /* CONFIG_PHYS_64BIT */ #endif /* CONFIG_PHYS_64BIT */
#endif /* CONFIG_PPC_BOOK3E_MMU */ #endif /* CONFIG_PPC_E500 */
#ifdef CONFIG_44x #ifdef CONFIG_44x
mfspr r0,SPRN_MMUCR mfspr r0,SPRN_MMUCR
stw r0,MMUCR(r1) stw r0,MMUCR(r1)
......
...@@ -455,7 +455,7 @@ static void __init kvm_check_ins(u32 *inst, u32 features) ...@@ -455,7 +455,7 @@ static void __init kvm_check_ins(u32 *inst, u32 features)
kvm_patch_ins_lwz(inst, magic_var(dsisr), inst_rt); kvm_patch_ins_lwz(inst, magic_var(dsisr), inst_rt);
break; break;
#ifdef CONFIG_PPC_BOOK3E_MMU #ifdef CONFIG_PPC_E500
case KVM_INST_MFSPR(SPRN_MAS0): case KVM_INST_MFSPR(SPRN_MAS0):
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7) if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
kvm_patch_ins_lwz(inst, magic_var(mas0), inst_rt); kvm_patch_ins_lwz(inst, magic_var(mas0), inst_rt);
...@@ -484,7 +484,7 @@ static void __init kvm_check_ins(u32 *inst, u32 features) ...@@ -484,7 +484,7 @@ static void __init kvm_check_ins(u32 *inst, u32 features)
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7) if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
kvm_patch_ins_lwz(inst, magic_var(mas7_3), inst_rt); kvm_patch_ins_lwz(inst, magic_var(mas7_3), inst_rt);
break; break;
#endif /* CONFIG_PPC_BOOK3E_MMU */ #endif /* CONFIG_PPC_E500 */
case KVM_INST_MFSPR(SPRN_SPRG4): case KVM_INST_MFSPR(SPRN_SPRG4):
#ifdef CONFIG_BOOKE #ifdef CONFIG_BOOKE
...@@ -557,7 +557,7 @@ static void __init kvm_check_ins(u32 *inst, u32 features) ...@@ -557,7 +557,7 @@ static void __init kvm_check_ins(u32 *inst, u32 features)
case KVM_INST_MTSPR(SPRN_DSISR): case KVM_INST_MTSPR(SPRN_DSISR):
kvm_patch_ins_stw(inst, magic_var(dsisr), inst_rt); kvm_patch_ins_stw(inst, magic_var(dsisr), inst_rt);
break; break;
#ifdef CONFIG_PPC_BOOK3E_MMU #ifdef CONFIG_PPC_E500
case KVM_INST_MTSPR(SPRN_MAS0): case KVM_INST_MTSPR(SPRN_MAS0):
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7) if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
kvm_patch_ins_stw(inst, magic_var(mas0), inst_rt); kvm_patch_ins_stw(inst, magic_var(mas0), inst_rt);
...@@ -586,7 +586,7 @@ static void __init kvm_check_ins(u32 *inst, u32 features) ...@@ -586,7 +586,7 @@ static void __init kvm_check_ins(u32 *inst, u32 features)
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7) if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
kvm_patch_ins_stw(inst, magic_var(mas7_3), inst_rt); kvm_patch_ins_stw(inst, magic_var(mas7_3), inst_rt);
break; break;
#endif /* CONFIG_PPC_BOOK3E_MMU */ #endif /* CONFIG_PPC_E500 */
case KVM_INST_MTSPR(SPRN_SPRG4): case KVM_INST_MTSPR(SPRN_SPRG4):
if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7) if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
......
...@@ -17,7 +17,7 @@ ...@@ -17,7 +17,7 @@
#define KVM_E500_H #define KVM_E500_H
#include <linux/kvm_host.h> #include <linux/kvm_host.h>
#include <asm/nohash/mmu-book3e.h> #include <asm/nohash/mmu-e500.h>
#include <asm/tlb.h> #include <asm/tlb.h>
#include <asm/cputhreads.h> #include <asm/cputhreads.h>
......
...@@ -49,7 +49,7 @@ ...@@ -49,7 +49,7 @@
* other sizes not listed here. The .ind field is only used on MMUs that have * other sizes not listed here. The .ind field is only used on MMUs that have
* indirect page table entries. * indirect page table entries.
*/ */
#if defined(CONFIG_PPC_BOOK3E_MMU) || defined(CONFIG_PPC_8xx) #if defined(CONFIG_PPC_E500) || defined(CONFIG_PPC_8xx)
#ifdef CONFIG_PPC_E500 #ifdef CONFIG_PPC_E500
struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT] = { struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT] = {
[MMU_PAGE_4K] = { [MMU_PAGE_4K] = {
...@@ -142,7 +142,7 @@ static inline int mmu_get_tsize(int psize) ...@@ -142,7 +142,7 @@ static inline int mmu_get_tsize(int psize)
/* This isn't used on !Book3E for now */ /* This isn't used on !Book3E for now */
return 0; return 0;
} }
#endif /* CONFIG_PPC_BOOK3E_MMU */ #endif /* CONFIG_PPC_E500 */
/* The variables below are currently only used on 64-bit Book3E /* The variables below are currently only used on 64-bit Book3E
* though this will probably be made common with other nohash * though this will probably be made common with other nohash
......
...@@ -4,7 +4,7 @@ obj-y += ptdump.o ...@@ -4,7 +4,7 @@ obj-y += ptdump.o
obj-$(CONFIG_4xx) += shared.o obj-$(CONFIG_4xx) += shared.o
obj-$(CONFIG_PPC_8xx) += 8xx.o obj-$(CONFIG_PPC_8xx) += 8xx.o
obj-$(CONFIG_PPC_BOOK3E_MMU) += shared.o obj-$(CONFIG_PPC_E500) += shared.o
obj-$(CONFIG_PPC_BOOK3S_32) += shared.o obj-$(CONFIG_PPC_BOOK3S_32) += shared.o
obj-$(CONFIG_PPC_BOOK3S_64) += book3s64.o obj-$(CONFIG_PPC_BOOK3S_64) += book3s64.o
......
...@@ -466,10 +466,6 @@ config PPC_MMU_NOHASH ...@@ -466,10 +466,6 @@ config PPC_MMU_NOHASH
def_bool y def_bool y
depends on !PPC_BOOK3S depends on !PPC_BOOK3S
config PPC_BOOK3E_MMU
def_bool y
depends on PPC_85xx || PPC_BOOK3E_64
config PPC_HAVE_PMU_SUPPORT config PPC_HAVE_PMU_SUPPORT
bool bool
......
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