[PATCH] sh: merge updates

More random cleanup and build fixes.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

arch/sh/boards/se/7300/io.c

 /*
- * linux/arch/sh/boards/se/7300/io.c
+ * arch/sh/boards/se/7300/io.c
  *
  * Copyright (C) 2003 YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp>
+ * Based on arch/sh/kernel/io_shmse.c
+ *
+ * I/O routine for SH-Mobile3 73180 SolutionEngine.
+ *
  */
 
 #include <linux/config.h>
 #include <linux/kernel.h>
-#include <asm/se7300/se7300.h>
+#include <asm/mach/se7300.h>
 #include <asm/io.h>
 
 #define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a)

arch/sh/boards/sh03/rtc.c

@@ -115,8 +115,6 @@ static int set_rtc_mmss(unsigned long nowtime)
 	real_minutes %= 60;
 
 	if (abs(real_minutes - cmos_minutes) < 30) {
-		BIN_TO_BCD(real_seconds);
-		BIN_TO_BCD(real_minutes);
 		ctrl_outb(real_seconds % 10, RTC_SEC1);
 		ctrl_outb(real_seconds / 10, RTC_SEC10);
 		ctrl_outb(real_minutes % 10, RTC_MIN1);

arch/sh/boards/snapgear/setup.c

@@ -27,6 +27,7 @@
 #include <asm/mach/io.h>
 #include <asm/irq.h>
 #include <asm/io.h>
+#include <asm/cpu/timer.h>
 
 extern void (*board_time_init)(void);
 extern void secureedge5410_rtc_init(void);
@@ -111,11 +112,6 @@ static void __init init_snapgear_IRQ(void)
 #endif
 #define TMU_TSTR_INIT	1
 #define TMU1_TCR_CALIB	0x0000
-#define TMU_TOCR	0xffd80000	/* Byte access */
-#define TMU_TSTR	0xffd80004	/* Byte access */
-#define TMU1_TCOR	0xffd80014	/* Long access */
-#define TMU1_TCNT	0xffd80018	/* Long access */
-#define TMU1_TCR	0xffd8001c	/* Word access */
 
 
 #ifdef FAST_POLL_INTR

arch/sh/drivers/pci/pci-sh7751.c

@@ -178,8 +178,8 @@ static void __init pci_fixup_ide_bases(struct pci_dev *d)
 		}
 	}
 }
+
 DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
-#endif
 
 /*
  *  Called after each bus is probed, but before its children

arch/sh/kernel/ptrace.c

-/* $Id: ptrace.c,v 1.15 2004/05/07 05:32:05 sugioka Exp $
- *
+/*
  * linux/arch/sh/kernel/ptrace.c
  *
  * Original x86 implementation:

arch/sh/kernel/sh_ksyms.c

@@ -65,13 +65,6 @@ EXPORT_SYMBOL(memmove);
 EXPORT_SYMBOL(memcmp);
 EXPORT_SYMBOL(memscan);
 EXPORT_SYMBOL(__copy_user);
-
-#ifdef CONFIG_VT
-/* XXX: MRB-remove - what was screen_info changed to?
-EXPORT_SYMBOL(screen_info);
-*/
-#endif
-
 EXPORT_SYMBOL(boot_cpu_data);
 
 #ifdef CONFIG_MMU

arch/sh/kernel/signal.c

-/* $Id: signal.c,v 1.21 2004/06/28 13:18:44 doyu Exp $
- *
+/*
  *  linux/arch/sh/kernel/signal.c
  *
  *  Copyright (C) 1991, 1992  Linus Torvalds
@@ -341,8 +340,10 @@ setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
 static inline void __user *
 get_sigframe(struct k_sigaction *ka, unsigned long sp, size_t frame_size)
 {
-	if ((ka->sa.sa_flags & SA_ONSTACK) != 0 && ! on_sig_stack(sp))
-		sp = current->sas_ss_sp + current->sas_ss_size;
+	if (ka->sa.sa_flags & SA_ONSTACK) {
+		if (sas_ss_flags(sp) == 0)
+			sp = current->sas_ss_sp + current->sas_ss_size;
+	}
 
 	return (void __user *)((sp - frame_size) & -8ul);
 }

arch/sh/kernel/time.c

@@ -33,6 +33,7 @@
 #include <asm/machvec.h>
 #include <asm/rtc.h>
 #include <asm/freq.h>
+#include <asm/cpu/timer.h>
 #ifdef CONFIG_SH_KGDB
 #include <asm/kgdb.h>
 #endif
@@ -46,40 +47,10 @@
 
 #define TMU0_TCR_CALIB	0x0000
 
-#if defined(CONFIG_CPU_SH3)
-#if defined(CONFIG_CPU_SUBTYPE_SH7300)
-#define TMU_TSTR        0xA412FE92      /* Byte access */
-
-#define TMU0_TCOR       0xA412FE94      /* Long access */
-#define TMU0_TCNT       0xA412FE98      /* Long access */
-#define TMU0_TCR        0xA412FE9C      /* Word access */
-
-#define TMU1_TCOR	0xA412FEA0	/* Long access */
-#define TMU1_TCNT	0xA412FEA4	/* Long access */
-#define TMU1_TCR	0xA412FEA8	/* Word access */
-
-#define FRQCR           0xA415FF80
-#else
-#define TMU_TOCR	0xfffffe90	/* Byte access */
-#define TMU_TSTR	0xfffffe92	/* Byte access */
-
-#define TMU0_TCOR	0xfffffe94	/* Long access */
-#define TMU0_TCNT	0xfffffe98	/* Long access */
-#define TMU0_TCR	0xfffffe9c	/* Word access */
-#endif
-#elif defined(CONFIG_CPU_SH4)
-#define TMU_TOCR	0xffd80000	/* Byte access */
-#define TMU_TSTR	0xffd80004	/* Byte access */
-
-#define TMU0_TCOR	0xffd80008	/* Long access */
-#define TMU0_TCNT	0xffd8000c	/* Long access */
-#define TMU0_TCR	0xffd80010	/* Word access */
-
 #ifdef CONFIG_CPU_SUBTYPE_ST40STB1
 #define CLOCKGEN_MEMCLKCR 0xbb040038
 #define MEMCLKCR_RATIO_MASK 0x7
 #endif /* CONFIG_CPU_SUBTYPE_ST40STB1 */
-#endif /* CONFIG_CPU_SH3 or CONFIG_CPU_SH4 */
 
 extern unsigned long wall_jiffies;
 #define TICK_SIZE (tick_nsec / 1000)
@@ -272,7 +243,7 @@ static inline void do_timer_interrupt(int irq, void *dev_id, struct pt_regs *reg
 	profile_tick(CPU_PROFILING, regs);
 
 #ifdef CONFIG_HEARTBEAT
-	if (sh_mv.mv_heartbeat != NULL) 
+	if (sh_mv.mv_heartbeat != NULL)
 		sh_mv.mv_heartbeat();
 #endif
 

include/asm-sh/bitops.h

@@ -262,9 +262,9 @@ static __inline__ unsigned long find_next_bit(const unsigned long *addr,
 #define find_first_bit(addr, size) \
 	find_next_bit((addr), (size), 0)
 
-static __inline__ int find_next_zero_bit(void *addr, int size, int offset)
+static __inline__ int find_next_zero_bit(const unsigned long *addr, int size, int offset)
 {
-	unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
+	const unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
 	unsigned long result = offset & ~31UL;
 	unsigned long tmp;
 
@@ -325,7 +325,7 @@ static __inline__ int find_next_zero_bit(void *addr, int size, int offset)
  * bits is cleared.
  */
 
-static inline int sched_find_first_bit(unsigned long *b)
+static inline int sched_find_first_bit(const unsigned long *b)
 {
 	if (unlikely(b[0]))
 		return __ffs(b[0]);

include/asm-sh/bug.h

@@ -8,7 +8,7 @@
  */
 #define BUG() do { \
 	printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \
-	asm volatile("nop"); \
+	*(volatile int *)0 = 0; \
 } while (0)
 
 #define HAVE_ARCH_BUG

include/asm-sh/cacheflush.h

 #ifndef __ASM_SH_CACHEFLUSH_H
 #define __ASM_SH_CACHEFLUSH_H
+#ifdef __KERNEL__
 
 #include <asm/cpu/cacheflush.h>
 
@@ -26,4 +27,5 @@ extern void __flush_invalidate_region(void *start, int size);
 		memcpy(dst, src, len);				\
 	} while (0)
 
+#endif /* __KERNEL__ */
 #endif /* __ASM_SH_CACHEFLUSH_H */

include/asm-sh/cpu-sh3/freq.h

@@ -10,7 +10,11 @@
 #ifndef __ASM_CPU_SH3_FREQ_H
 #define __ASM_CPU_SH3_FREQ_H
 
+#if defined(CONFIG_CPU_SUBTYPE_SH7300)
+#define FRQCR			0xa415ff80
+#else
 #define FRQCR			0xffffff80
+#endif
 #define MIN_DIVISOR_NR		0
 #define MAX_DIVISOR_NR		4
 

include/asm-sh/cpu-sh3/timer.h

+/*
+ * include/asm-sh/cpu-sh3/timer.h
+ *
+ * Copyright (C) 2004 Lineo Solutions, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_CPU_SH3_TIMER_H
+#define __ASM_CPU_SH3_TIMER_H
+
+/*
+ * ---------------------------------------------------------------------------
+ * TMU Common definitions for SH3 processors
+ *	SH7706
+ *	SH7709S
+ *	SH7727
+ *	SH7729R
+ *	SH7710
+ *	SH7720
+ *	SH7300
+ * ---------------------------------------------------------------------------
+ */
+
+#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
+#define TMU_TSTR	0xa412fe92	/* Byte access */
+
+#define TMU0_TCOR	0xa412fe94	/* Long access */
+#define TMU0_TCNT	0xa412fe98	/* Long access */
+#define TMU0_TCR	0xa412fe9c	/* Word access */
+
+#define TMU1_TCOR	0xa412fea0	/* Long access */
+#define TMU1_TCNT	0xa412fea4	/* Long access */
+#define TMU1_TCR	0xa412fea8	/* Word access */
+
+#define TMU2_TCOR	0xa412feac	/* Long access */
+#define TMU2_TCNT	0xa412feb0	/* Long access */
+#define TMU2_TCR	0xa412feb4	/* Word access */
+
+#else
+#if !defined(CONFIG_CPU_SUBTYPE_SH7727)
+#define TMU_TOCR	0xfffffe90	/* Byte access */
+#endif
+#define TMU_TSTR	0xfffffe92	/* Byte access */
+
+#define TMU0_TCOR	0xfffffe94	/* Long access */
+#define TMU0_TCNT	0xfffffe98	/* Long access */
+#define TMU0_TCR	0xfffffe9c	/* Word access */
+
+#define TMU1_TCOR	0xfffffea0	/* Long access */
+#define TMU1_TCNT	0xfffffea4	/* Long access */
+#define TMU1_TCR	0xfffffea8	/* Word access */
+
+#define TMU2_TCOR	0xfffffeac	/* Long access */
+#define TMU2_TCNT	0xfffffeb0	/* Long access */
+#define TMU2_TCR	0xfffffeb4	/* Word access */
+#if !defined(CONFIG_CPU_SUBTYPE_SH7727)
+#define TMU2_TCPR2	0xfffffeb8	/* Long access */
+#endif
+#endif
+
+#endif /* __ASM_CPU_SH3_TIMER_H */
+

include/asm-sh/cpu-sh4/timer.h

+/*
+ * include/asm-sh/cpu-sh4/timer.h
+ *
+ * Copyright (C) 2004 Lineo Solutions, Inc. 
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_CPU_SH4_TIMER_H
+#define __ASM_CPU_SH4_TIMER_H
+
+/*
+ * ---------------------------------------------------------------------------
+ * TMU Common definitions for SH4 processors
+ *	SH7750S/SH7750R
+ *	SH7751/SH7751R
+ *	SH7760
+ * ---------------------------------------------------------------------------
+ */
+
+#if !defined(CONFIG_CPU_SUBTYPE_SH7760)
+#define TMU_TOCR        0xffd80000      /* Byte access */
+#endif
+#define TMU_TSTR        0xffd80004      /* Byte access */
+
+#define TMU0_TCOR       0xffd80008      /* Long access */
+#define TMU0_TCNT       0xffd8000c      /* Long access */
+#define TMU0_TCR        0xffd80010      /* Word access */
+
+#define TMU1_TCOR       0xffd80014      /* Long access */
+#define TMU1_TCNT       0xffd80018      /* Long access */
+#define TMU1_TCR        0xffd8001c      /* Word access */
+
+#define TMU2_TCOR       0xffd80020      /* Long access */
+#define TMU2_TCNT       0xffd80024      /* Long access */
+#define TMU2_TCR        0xffd80028      /* Word access */
+#define TMU2_TCPR	0xffd8002c	/* Long access */
+
+#if !defined(CONFIG_CPU_SUBTYPE_SH7760)
+#define TMU3_TCOR       0xfe100008      /* Long access */
+#define TMU3_TCNT       0xfe10000c      /* Long access */
+#define TMU3_TCR        0xfe100010      /* Word access */
+
+#define TMU4_TCOR       0xfe100014      /* Long access */
+#define TMU4_TCNT       0xfe100018      /* Long access */
+#define TMU4_TCR        0xfe10001c      /* Word access */
+#endif
+
+#endif /* __ASM_CPU_SH4_TIMER_H */
+

include/asm-sh/dma-mapping.h

@@ -3,7 +3,6 @@
 
 #include <linux/config.h>
 #include <linux/mm.h>
-#include <linux/device.h>
 #include <asm/scatterlist.h>
 #include <asm/io.h>
 

include/asm-sh/irq.h

@@ -17,7 +17,8 @@
 
 #if defined(CONFIG_SH_HP600) || \
     defined(CONFIG_SH_RTS7751R2D) || \
-    defined(CONFIG_SH_HS7751RVOIP)
+    defined(CONFIG_SH_HS7751RVOIP) || \
+    defined(CONFIG_SH_SH03)
 #include <asm/mach/ide.h>
 #endif
 

include/asm-sh/mc146818rtc.h

@@ -16,6 +16,7 @@
 
 /* FIXME:RTC Interrupt feature is not implemented yet. */
 #undef  RTC_IRQ
+#define RTC_IRQ		0
 
 #if defined(CONFIG_CPU_SH3)
 #define RTC_PORT(n)		(R64CNT+(n)*2)

include/asm-sh/sh03/ide.h

+#ifndef __ASM_SH_SH03_IDE_H
+#define __ASM_SH_SH03_IDE_H
+
+#define IRQ_CFCARD	8
+#define IRQ_PCMCIA	8
+
+#endif /* __ASM_SH_SH03_IDE_H */