Commit ad2631b5 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Matthias Brugger

arm64: dts: mt8183: Fix Mali GPU clock

The actual clock feeding into the Mali GPU on the MT8183 is from the
clock gate in the MFGCFG block, not CLK_TOP_MFGPLL_CK from the TOPCKGEN
block, which itself is simply a pass-through placeholder for the MFGPLL
in the APMIXEDSYS block.

Fix the hardware description with the correct clock reference.

Fixes: a8168ceb ("arm64: dts: mt8183: Add node for the Mali GPU")
Signed-off-by: default avatarChen-Yu Tsai <wenst@chromium.org>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: default avatarNícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220927101128.44758-2-angelogioacchino.delregno@collabora.comSigned-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent e4a41752
...@@ -1678,7 +1678,7 @@ gpu: gpu@13040000 { ...@@ -1678,7 +1678,7 @@ gpu: gpu@13040000 {
<GIC_SPI 278 IRQ_TYPE_LEVEL_LOW>; <GIC_SPI 278 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "job", "mmu", "gpu"; interrupt-names = "job", "mmu", "gpu";
clocks = <&topckgen CLK_TOP_MFGPLL_CK>; clocks = <&mfgcfg CLK_MFG_BG3D>;
power-domains = power-domains =
<&spm MT8183_POWER_DOMAIN_MFG_CORE0>, <&spm MT8183_POWER_DOMAIN_MFG_CORE0>,
......
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