Commit b0f2110a authored by Caesar Wang's avatar Caesar Wang Committed by Heiko Stuebner

arm64: dts: rockchip: add SdioAudio pd control for rk3399

The SdioAudio power domain includes the i2s/spdif/spi5/sdio.

So this patch adds the pd control for rk3399 i2s/spdif/spi5/sdio, in order
to save more power consumption.
Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent d4446793
...@@ -293,6 +293,7 @@ sdio0: dwmmc@fe310000 { ...@@ -293,6 +293,7 @@ sdio0: dwmmc@fe310000 {
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>; fifo-depth = <0x100>;
power-domains = <&power RK3399_PD_SDIOAUDIO>;
resets = <&cru SRST_SDIO0>; resets = <&cru SRST_SDIO0>;
reset-names = "reset"; reset-names = "reset";
status = "disabled"; status = "disabled";
...@@ -682,6 +683,7 @@ spi5: spi@ff200000 { ...@@ -682,6 +683,7 @@ spi5: spi@ff200000 {
interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH 0>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&spi5_clk &spi5_tx &spi5_rx &spi5_cs0>; pinctrl-0 = <&spi5_clk &spi5_tx &spi5_rx &spi5_cs0>;
power-domains = <&power RK3399_PD_SDIOAUDIO>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
...@@ -971,6 +973,11 @@ pd_sd@RK3399_PD_SD { ...@@ -971,6 +973,11 @@ pd_sd@RK3399_PD_SD {
<&cru SCLK_SDMMC>; <&cru SCLK_SDMMC>;
pm_qos = <&qos_sd>; pm_qos = <&qos_sd>;
}; };
pd_sdioaudio@RK3399_PD_SDIOAUDIO {
reg = <RK3399_PD_SDIOAUDIO>;
clocks = <&cru HCLK_SDIO>;
pm_qos = <&qos_sdioaudio>;
};
pd_vio@RK3399_PD_VIO { pd_vio@RK3399_PD_VIO {
reg = <RK3399_PD_VIO>; reg = <RK3399_PD_VIO>;
#address-cells = <1>; #address-cells = <1>;
...@@ -1391,6 +1398,7 @@ spdif: spdif@ff870000 { ...@@ -1391,6 +1398,7 @@ spdif: spdif@ff870000 {
clocks = <&cru SCLK_SPDIF_8CH>, <&cru HCLK_SPDIF>; clocks = <&cru SCLK_SPDIF_8CH>, <&cru HCLK_SPDIF>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&spdif_bus>; pinctrl-0 = <&spdif_bus>;
power-domains = <&power RK3399_PD_SDIOAUDIO>;
status = "disabled"; status = "disabled";
}; };
...@@ -1405,6 +1413,7 @@ i2s0: i2s@ff880000 { ...@@ -1405,6 +1413,7 @@ i2s0: i2s@ff880000 {
clocks = <&cru SCLK_I2S0_8CH>, <&cru HCLK_I2S0_8CH>; clocks = <&cru SCLK_I2S0_8CH>, <&cru HCLK_I2S0_8CH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&i2s0_8ch_bus>; pinctrl-0 = <&i2s0_8ch_bus>;
power-domains = <&power RK3399_PD_SDIOAUDIO>;
status = "disabled"; status = "disabled";
}; };
...@@ -1418,6 +1427,7 @@ i2s1: i2s@ff890000 { ...@@ -1418,6 +1427,7 @@ i2s1: i2s@ff890000 {
clocks = <&cru SCLK_I2S1_8CH>, <&cru HCLK_I2S1_8CH>; clocks = <&cru SCLK_I2S1_8CH>, <&cru HCLK_I2S1_8CH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&i2s1_2ch_bus>; pinctrl-0 = <&i2s1_2ch_bus>;
power-domains = <&power RK3399_PD_SDIOAUDIO>;
status = "disabled"; status = "disabled";
}; };
...@@ -1429,6 +1439,7 @@ i2s2: i2s@ff8a0000 { ...@@ -1429,6 +1439,7 @@ i2s2: i2s@ff8a0000 {
dma-names = "tx", "rx"; dma-names = "tx", "rx";
clock-names = "i2s_clk", "i2s_hclk"; clock-names = "i2s_clk", "i2s_hclk";
clocks = <&cru SCLK_I2S2_8CH>, <&cru HCLK_I2S2_8CH>; clocks = <&cru SCLK_I2S2_8CH>, <&cru HCLK_I2S2_8CH>;
power-domains = <&power RK3399_PD_SDIOAUDIO>;
status = "disabled"; status = "disabled";
}; };
......
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