Commit b2bd0a8c authored by Ben Levinsky's avatar Ben Levinsky Committed by Mathieu Poirier

firmware: xilinx: Add ZynqMP firmware ioctl enums for RPU configuration.

Add ZynqMP firmware ioctl enums for RPU configuration and TCM Nodes for
later use via request_node and release_node
Signed-off-by: default avatarBen Levinsky <ben.levinsky@amd.com>
Signed-off-by: default avatarTanmay Shah <tanmay.shah@amd.com>
Acked-by: default avatarMichal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20221114233940.2096237-4-tanmay.shah@amd.comSigned-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
parent 400f6af0
...@@ -135,6 +135,10 @@ enum pm_ret_status { ...@@ -135,6 +135,10 @@ enum pm_ret_status {
}; };
enum pm_ioctl_id { enum pm_ioctl_id {
IOCTL_GET_RPU_OPER_MODE = 0,
IOCTL_SET_RPU_OPER_MODE = 1,
IOCTL_RPU_BOOT_ADDR_CONFIG = 2,
IOCTL_TCM_COMB_CONFIG = 3,
IOCTL_SD_DLL_RESET = 6, IOCTL_SD_DLL_RESET = 6,
IOCTL_SET_SD_TAPDELAY = 7, IOCTL_SET_SD_TAPDELAY = 7,
IOCTL_SET_PLL_FRAC_MODE = 8, IOCTL_SET_PLL_FRAC_MODE = 8,
...@@ -175,6 +179,21 @@ enum pm_query_id { ...@@ -175,6 +179,21 @@ enum pm_query_id {
PM_QID_CLOCK_GET_MAX_DIVISOR = 13, PM_QID_CLOCK_GET_MAX_DIVISOR = 13,
}; };
enum rpu_oper_mode {
PM_RPU_MODE_LOCKSTEP = 0,
PM_RPU_MODE_SPLIT = 1,
};
enum rpu_boot_mem {
PM_RPU_BOOTMEM_LOVEC = 0,
PM_RPU_BOOTMEM_HIVEC = 1,
};
enum rpu_tcm_comb {
PM_RPU_TCM_SPLIT = 0,
PM_RPU_TCM_COMB = 1,
};
enum zynqmp_pm_reset_action { enum zynqmp_pm_reset_action {
PM_RESET_ACTION_RELEASE = 0, PM_RESET_ACTION_RELEASE = 0,
PM_RESET_ACTION_ASSERT = 1, PM_RESET_ACTION_ASSERT = 1,
......
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