Commit b410982c authored by Tej Parkash's avatar Tej Parkash Committed by Christoph Hellwig

qla4xxx: Add support of 0xFF capture mask for minidump

Signed-off-by: default avatarTej Parkash <tej.parkash@qlogic.com>
Signed-off-by: default avatarVikas Chaudhary <vikas.chaudhary@qlogic.com>
Reviewed-by: default avatarMike Christie <michaelc@cs.wisc.edu>
Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
parent a511b4af
......@@ -1415,6 +1415,9 @@ struct ql_iscsi_stats {
#define QLA83XX_DBG_OCM_WNDREG_ARRAY_LEN 16
#define QLA83XX_SS_OCM_WNDREG_INDEX 3
#define QLA83XX_SS_PCI_INDEX 0
#define QLA8022_TEMPLATE_CAP_OFFSET 172
#define QLA83XX_TEMPLATE_CAP_OFFSET 268
#define QLA80XX_TEMPLATE_RESERVED_BITS 16
struct qla4_8xxx_minidump_template_hdr {
uint32_t entry_type;
......@@ -1434,6 +1437,7 @@ struct qla4_8xxx_minidump_template_hdr {
uint32_t saved_state_array[QLA8XXX_DBG_STATE_ARRAY_LEN];
uint32_t capture_size_array[QLA8XXX_DBG_CAP_SIZE_ARRAY_LEN];
uint32_t ocm_window_reg[QLA83XX_DBG_OCM_WNDREG_ARRAY_LEN];
uint32_t capabilities[QLA80XX_TEMPLATE_RESERVED_BITS];
};
#endif /* _QLA4X_FW_H */
......@@ -282,6 +282,25 @@ qla4xxx_wait_for_ip_config(struct scsi_qla_host *ha)
return ipv4_wait|ipv6_wait;
}
static int qla4_80xx_is_minidump_dma_capable(struct scsi_qla_host *ha,
struct qla4_8xxx_minidump_template_hdr *md_hdr)
{
int offset = (is_qla8022(ha)) ? QLA8022_TEMPLATE_CAP_OFFSET :
QLA83XX_TEMPLATE_CAP_OFFSET;
int rval = 1;
uint32_t *cap_offset;
cap_offset = (uint32_t *)((char *)md_hdr + offset);
if (!(le32_to_cpu(*cap_offset) & BIT_0)) {
ql4_printk(KERN_INFO, ha, "PEX DMA Not supported %d\n",
*cap_offset);
rval = 0;
}
return rval;
}
/**
* qla4xxx_alloc_fw_dump - Allocate memory for minidump data.
* @ha: pointer to host adapter structure.
......@@ -294,6 +313,7 @@ void qla4xxx_alloc_fw_dump(struct scsi_qla_host *ha)
void *md_tmp;
dma_addr_t md_tmp_dma;
struct qla4_8xxx_minidump_template_hdr *md_hdr;
int dma_capable;
if (ha->fw_dump) {
ql4_printk(KERN_WARNING, ha,
......@@ -326,13 +346,19 @@ void qla4xxx_alloc_fw_dump(struct scsi_qla_host *ha)
md_hdr = (struct qla4_8xxx_minidump_template_hdr *)md_tmp;
dma_capable = qla4_80xx_is_minidump_dma_capable(ha, md_hdr);
capture_debug_level = md_hdr->capture_debug_level;
/* Get capture mask based on module loadtime setting. */
if (ql4xmdcapmask >= 0x3 && ql4xmdcapmask <= 0x7F)
if ((ql4xmdcapmask >= 0x3 && ql4xmdcapmask <= 0x7F) ||
(ql4xmdcapmask == 0xFF && dma_capable)) {
ha->fw_dump_capture_mask = ql4xmdcapmask;
else
} else {
if (ql4xmdcapmask == 0xFF)
ql4_printk(KERN_INFO, ha, "Falling back to default capture mask, as PEX DMA is not supported\n");
ha->fw_dump_capture_mask = capture_debug_level;
}
md_hdr->driver_capture_mask = ha->fw_dump_capture_mask;
......
......@@ -88,7 +88,7 @@ module_param(ql4xmdcapmask, int, S_IRUGO);
MODULE_PARM_DESC(ql4xmdcapmask,
" Set the Minidump driver capture mask level.\n"
"\t\t Default is 0 (firmware default capture mask)\n"
"\t\t Can be set to 0x3, 0x7, 0xF, 0x1F, 0x3F, 0x7F");
"\t\t Can be set to 0x3, 0x7, 0xF, 0x1F, 0x3F, 0x7F, 0xFF");
int ql4xenablemd = 1;
module_param(ql4xenablemd, int, S_IRUGO | S_IWUSR);
......
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