Commit b52c273b authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Don't ignore level 0 lines watermark for glk+

On glk+ the level 0 lines watermark actually matters. Do not ignore it.
And while at it let's change things so that we always program a
consistnet 0 to the register when the lines watermarks is ignored
by the hardware.
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181221171436.8218-2-ville.syrjala@linux.intel.comReviewed-by: default avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
parent 5b0bd14d
......@@ -4674,6 +4674,15 @@ skl_compute_plane_wm_params(const struct intel_crtc_state *cstate,
return 0;
}
static bool skl_wm_has_lines(struct drm_i915_private *dev_priv, int level)
{
if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
return true;
/* The number of lines are ignored for the level 0 watermark. */
return level > 0;
}
static void skl_compute_plane_wm(const struct intel_crtc_state *cstate,
const struct intel_plane_state *intel_pstate,
int level,
......@@ -4756,8 +4765,10 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *cstate,
}
}
/* The number of lines are ignored for the level 0 watermark. */
if (level > 0 && res_lines > 31)
if (!skl_wm_has_lines(dev_priv, level))
res_lines = 0;
if (res_lines > 31)
return;
/*
......
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