Commit b54ac79e authored by Vojtech Pavlik's avatar Vojtech Pavlik

Merge suse.cz:/data/bk/linus into suse.cz:/data/bk/input

parents 8b1b0ed2 9f53c6cc
......@@ -215,7 +215,6 @@ AES algorithm contributors:
Herbert Valerio Riedel
Kyle McMartin
Adam J. Richter
Fruhwirth Clemens (i586)
CAST5 algorithm contributors:
Kartikey Mahendra Bhatt (original developers unknown, FSF copyright).
......
......@@ -1384,7 +1384,7 @@ MEMORY TECHNOLOGY DEVICES
P: David Woodhouse
M: dwmw2@redhat.com
W: http://www.linux-mtd.infradead.org/
L: mtd@infradead.org
L: linux-mtd@lists.infradead.org
S: Maintained
MICROTEK X6 SCANNER
......
......@@ -34,7 +34,7 @@
mov r0, #0x30
mcr p15, 0, r0, c1, c0, 0
mov r0, #0x13
msr cpsr, r0
msr cpsr_cxsf, r0
mov r12, #0x03000000 @ point to LEDs
orr r12, r12, #0x00020000
orr r12, r12, #0xba00
......@@ -71,7 +71,7 @@
/* Ensure all interrupts are off and MMU disabled */
mrs r0, cpsr
orr r0, r0, #0xc0
msr cpsr, r0
msr cpsr_cxsf, r0
adr lr, 1b
orr lr, lr, #0x10000000
......
This diff is collapsed.
......@@ -952,7 +952,7 @@ __dabt_svc: sub sp, sp, #S_FRAME_SIZE
bl do_DataAbort
disable_irq r0
ldr r0, [sp, #S_PSR]
msr spsr, r0
msr spsr_cxsf, r0
ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
.align 5
......@@ -988,7 +988,7 @@ preempt_return:
strne r0, [r0, -r0] @ bug()
#endif
ldr r0, [sp, #S_PSR] @ irqs are already disabled
msr spsr, r0
msr spsr_cxsf, r0
ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
.ltorg
......@@ -1031,7 +1031,7 @@ __und_svc: sub sp, sp, #S_FRAME_SIZE
1: disable_irq r0
ldr lr, [sp, #S_PSR] @ Get SVC cpsr
msr spsr, lr
msr spsr_cxsf, lr
ldmia sp, {r0 - pc}^ @ Restore SVC registers
.align 5
......@@ -1052,7 +1052,7 @@ __pabt_svc: sub sp, sp, #S_FRAME_SIZE
bl do_PrefetchAbort @ call abort handler
disable_irq r0
ldr r0, [sp, #S_PSR]
msr spsr, r0
msr spsr_cxsf, r0
ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
.align 5
......@@ -1303,7 +1303,7 @@ vector_IRQ: @
mrs r13, cpsr
bic r13, r13, #MODE_MASK
orr r13, r13, #MODE_SVC
msr spsr, r13 @ switch to SVC_32 mode
msr spsr_cxsf, r13 @ switch to SVC_32 mode
and lr, lr, #15
ldr lr, [pc, lr, lsl #2]
......@@ -1346,7 +1346,7 @@ vector_data: @
mrs r13, cpsr
bic r13, r13, #MODE_MASK
orr r13, r13, #MODE_SVC
msr spsr, r13 @ switch to SVC_32 mode
msr spsr_cxsf, r13 @ switch to SVC_32 mode
and lr, lr, #15
ldr lr, [pc, lr, lsl #2]
......@@ -1390,7 +1390,7 @@ vector_prefetch:
mrs r13, cpsr
bic r13, r13, #MODE_MASK
orr r13, r13, #MODE_SVC
msr spsr, r13 @ switch to SVC_32 mode
msr spsr_cxsf, r13 @ switch to SVC_32 mode
ands lr, lr, #15
ldr lr, [pc, lr, lsl #2]
......@@ -1433,7 +1433,7 @@ vector_undefinstr:
mrs r13, cpsr
bic r13, r13, #MODE_MASK
orr r13, r13, #MODE_SVC
msr spsr, r13 @ switch to SVC_32 mode
msr spsr_cxsf, r13 @ switch to SVC_32 mode
and lr, lr, #15
ldr lr, [pc, lr, lsl #2]
......
......@@ -102,7 +102,7 @@ ENTRY(ret_from_fork)
ldr r0, [sp, #S_PSR] @ Get calling cpsr
sub lr, lr, #4
str lr, [r8]
msr spsr, r0
msr spsr_cxsf, r0
ldmia sp, {r0 - lr}^ @ Get calling r0 - lr
mov r0, r0
ldr lr, [sp, #S_PC] @ Get PC
......
......@@ -99,7 +99,7 @@
ldr r1, [sp, #S_PSR] @ Get calling cpsr
disable_irq ip @ disable IRQs
ldr lr, [sp, #S_PC]! @ Get PC
msr spsr, r1 @ save in spsr_svc
msr spsr_cxsf, r1 @ save in spsr_svc
ldmdb sp, {r0 - lr}^ @ Get calling r0 - lr
mov r0, r0
add sp, sp, #S_FRAME_SIZE - S_PC
......@@ -112,7 +112,7 @@
.macro fast_restore_user_regs
ldr r1, [sp, #S_OFF + S_PSR] @ get calling cpsr
ldr lr, [sp, #S_OFF + S_PC]! @ get pc
msr spsr, r1 @ save in spsr_svc
msr spsr_cxsf, r1 @ save in spsr_svc
ldmdb sp, {r1 - lr}^ @ get calling r1 - lr
mov r0, r0
add sp, sp, #S_FRAME_SIZE - S_PC
......@@ -125,7 +125,7 @@
.macro slow_restore_user_regs
ldr r1, [sp, #S_PSR] @ get calling cpsr
ldr lr, [sp, #S_PC]! @ get pc
msr spsr, r1 @ save in spsr_svc
msr spsr_cxsf, r1 @ save in spsr_svc
ldmdb sp, {r0 - lr}^ @ get calling r1 - lr
mov r0, r0
add sp, sp, #S_FRAME_SIZE - S_PC
......
......@@ -16,7 +16,7 @@
#define CPSR2SPSR(rt) \
mrs rt, cpsr; \
msr spsr, rt
msr spsr_cxsf, rt
@ Purpose: call an expansion card loader to read bytes.
@ Proto : char read_loader(int offset, char *card_base, char *loader);
......
......@@ -4,7 +4,7 @@
# Object file lists.
obj-y := s3c2410.o irq.o time.o
obj-y := s3c2410.o irq.o time.o gpio.o
obj-m :=
obj-n :=
obj- :=
......
/* linux/arch/arm/mach-s3c2410/gpio.c
*
* Copyright (c) 2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* S3C2410 GPIO support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/arch/regs-gpio.h>
void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
{
unsigned long base = S3C2410_GPIO_BASE(pin);
unsigned long shift = 1;
unsigned long mask = 3;
unsigned long con;
unsigned long flags;
if (pin < S3C2410_GPIO_BANKB) {
shift = 0;
mask = 1;
}
mask <<= S3C2410_GPIO_OFFSET(pin);
local_irq_save(flags);
con = __raw_readl(base + 0x00);
con &= mask << shift;
con |= function;
__raw_writel(con, base + 0x00);
local_irq_restore(flags);
}
void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
{
unsigned long base = S3C2410_GPIO_BASE(pin);
unsigned long offs = S3C2410_GPIO_OFFSET(pin);
unsigned long flags;
unsigned long up;
if (pin < S3C2410_GPIO_BANKB)
return;
local_irq_save(flags);
up = __raw_readl(base + 0x08);
up &= 1 << offs;
up |= to << offs;
__raw_writel(up, base + 0x08);
local_irq_restore(flags);
}
void s3c2410_gpio_setpin(unsigned int pin, unsigned int to)
{
unsigned long base = S3C2410_GPIO_BASE(pin);
unsigned long offs = S3C2410_GPIO_OFFSET(pin);
unsigned long flags;
unsigned long dat;
local_irq_save(flags);
dat = __raw_readl(base + 0x04);
dat &= 1 << offs;
dat |= to << offs;
__raw_writel(dat, base + 0x04);
local_irq_restore(flags);
}
......@@ -52,7 +52,7 @@ static struct s3c2410_uartcfg ipaq_uartcfgs[] = {
[0] = {
.hwport = 0,
.flags = 0,
.clock = &s3c2410_hclk,
.clock = &s3c2410_pclk,
.ucon = 0x3c5,
.ulcon = 0x03,
.ufcon = 0x51,
......@@ -60,7 +60,7 @@ static struct s3c2410_uartcfg ipaq_uartcfgs[] = {
[1] = {
.hwport = 1,
.flags = 0,
.clock = &s3c2410_hclk,
.clock = &s3c2410_pclk,
.ucon = 0x245,
.ulcon = 0x03,
.ufcon = 0x00,
......@@ -69,7 +69,7 @@ static struct s3c2410_uartcfg ipaq_uartcfgs[] = {
[2] = {
.hwport = 2,
.flags = 0,
.clock = &s3c2410_hclk,
.clock = &s3c2410_pclk,
.ucon = 0x3c5,
.ulcon = 0x43,
.ufcon = 0x51,
......
......@@ -4,5 +4,5 @@ extern void s3c2410_map_io(struct map_desc *, int count);
extern void s3c2410_init_irq(void);
extern s3c2410_init_time(void);
extern void s3c2410_init_time(void);
......@@ -141,4 +141,5 @@ MACHINE_START(COLLIE, "Sharp-Collie")
MAPIO(collie_map_io)
INITIRQ(sa1100_init_irq)
INIT_MACHINE(collie_init)
INITTIME(sa1100_init_time)
MACHINE_END
......@@ -130,6 +130,7 @@ static struct undef_hook blockops_hook __initdata = {
static int __init blockops_check(void)
{
register unsigned int err asm("r4") = 0;
unsigned int err_pos = 1;
unsigned int cache_type;
int i;
......@@ -156,8 +157,8 @@ static int __init blockops_check(void)
unregister_undef_hook(&blockops_hook);
for (i = 0; i < ARRAY_SIZE(func); i++, err >>= 1)
printk("%30s: %ssupported\n", func[i], err & 1 ? "not " : "");
for (i = 0; i < ARRAY_SIZE(func); i++, err_pos <<= 1)
printk("%30s: %ssupported\n", func[i], err & err_pos ? "not " : "");
if ((err & 8) == 0) {
printk(" --> Using %s block cache invalidate\n",
......
......@@ -104,8 +104,7 @@ head-y := arch/i386/kernel/head.o arch/i386/kernel/init_task.o
libs-y += arch/i386/lib/
core-y += arch/i386/kernel/ \
arch/i386/mm/ \
arch/i386/$(mcore-y)/ \
arch/i386/crypto/
arch/i386/$(mcore-y)/
drivers-$(CONFIG_MATH_EMULATION) += arch/i386/math-emu/
drivers-$(CONFIG_PCI) += arch/i386/pci/
# must be linked after kernel/
......
#
# i386/crypto/Makefile
#
# Arch-specific CryptoAPI modules.
#
obj-$(CONFIG_CRYPTO_AES_586) += aes-i586.o
aes-i586-y := aes-i586-asm.o aes-i586-glue.o
This diff is collapsed.
/*
*
* Glue Code for optimized 586 assembler version of AES
*
* Copyright (c) 2001, Dr Brian Gladman <brg@gladman.uk.net>, Worcester, UK.
* Copyright (c) 2003, Adam J. Richter <adam@yggdrasil.com> (conversion to
* 2.5 API).
* Copyright (c) 2003, 2004 Fruhwirth Clemens <clemens@endorphin.org>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/crypto.h>
#include <linux/linkage.h>
#define AES_MIN_KEY_SIZE 16
#define AES_MAX_KEY_SIZE 32
#define AES_BLOCK_SIZE 16
#define AES_KS_LENGTH 4 * AES_BLOCK_SIZE
#define AES_RC_LENGTH (9 * AES_BLOCK_SIZE) / 8 - 8
typedef struct
{
u_int32_t aes_Nkey; // the number of words in the key input block
u_int32_t aes_Nrnd; // the number of cipher rounds
u_int32_t aes_e_key[AES_KS_LENGTH]; // the encryption key schedule
u_int32_t aes_d_key[AES_KS_LENGTH]; // the decryption key schedule
u_int32_t aes_Ncol; // the number of columns in the cipher state
} aes_context;
/*
* The Cipher Interface
*/
asmlinkage void aes_set_key(void *, const unsigned char [], const int, const int);
/* Actually:
* extern void aes_encrypt(const aes_context *, unsigned char [], const unsigned char []);
* extern void aes_decrypt(const aes_context *, unsigned char [], const unsigned char []);
*/
asmlinkage void aes_encrypt(void*, unsigned char [], const unsigned char []);
asmlinkage void aes_decrypt(void*, unsigned char [], const unsigned char []);
static int aes_set_key_glue(void *cx, const u8 *key,unsigned int key_length, u32 *flags)
{
if(key_length != 16 && key_length != 24 && key_length != 32)
{
*flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
return -EINVAL;
}
aes_set_key(cx, key,key_length,0);
return 0;
}
#ifdef CONFIG_REGPARM
static void aes_encrypt_glue(void* a, unsigned char b[], const unsigned char c[]) {
aes_encrypt(a,b,c);
}
static void aes_decrypt_glue(void* a, unsigned char b[], const unsigned char c[]) {
aes_decrypt(a,b,c);
}
#else
#define aes_encrypt_glue aes_encrypt
#define aes_decrypt_glue aes_decrypt
#endif /* CONFIG_REGPARM */
static struct crypto_alg aes_alg = {
.cra_name = "aes",
.cra_flags = CRYPTO_ALG_TYPE_CIPHER,
.cra_blocksize = AES_BLOCK_SIZE,
.cra_ctxsize = sizeof(aes_context),
.cra_module = THIS_MODULE,
.cra_list = LIST_HEAD_INIT(aes_alg.cra_list),
.cra_u = {
.cipher = {
.cia_min_keysize = AES_MIN_KEY_SIZE,
.cia_max_keysize = AES_MAX_KEY_SIZE,
.cia_setkey = aes_set_key_glue,
.cia_encrypt = aes_encrypt_glue,
.cia_decrypt = aes_decrypt_glue
}
}
};
static int __init aes_init(void)
{
return crypto_register_alg(&aes_alg);
}
static void __exit aes_fini(void)
{
crypto_unregister_alg(&aes_alg);
}
module_init(aes_init);
module_exit(aes_fini);
MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, i586 asm optimized");
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Fruhwirth Clemens");
MODULE_ALIAS("aes");
......@@ -170,7 +170,7 @@ config VIRTUAL_MEM_MAP
config DISCONTIGMEM
bool "Discontiguous memory support"
depends on (IA64_DIG || IA64_SGI_SN2 || IA64_GENERIC) && NUMA && VIRTUAL_MEM_MAP
depends on (IA64_DIG || IA64_SGI_SN2 || IA64_GENERIC || IA64_HP_ZX1) && NUMA && VIRTUAL_MEM_MAP
default y if (IA64_SGI_SN2 || IA64_GENERIC) && NUMA
help
Say Y to support efficient handling of discontiguous physical memory,
......@@ -179,10 +179,10 @@ config DISCONTIGMEM
See <file:Documentation/vm/numa> for more.
config IA64_CYCLONE
bool "Support Cyclone(EXA) Time Source"
bool "Cyclone (EXA) Time Source support"
help
Say Y here to enable support for IBM EXA Cyclone time source.
If you're unsure, answer N.
Say Y here to enable support for IBM EXA Cyclone time source.
If you're unsure, answer N.
config IOSAPIC
bool
......
This diff is collapsed.
......@@ -469,6 +469,14 @@ sba_search_bitmap(struct ioc *ioc, unsigned long bits_wanted)
ASSERT(((unsigned long) ioc->res_hint & (sizeof(unsigned long) - 1UL)) == 0);
ASSERT(res_ptr < res_end);
/*
* N.B. REO/Grande defect AR2305 can cause TLB fetch timeouts
* if a TLB entry is purged while in use. sba_mark_invalid()
* purges IOTLB entries in power-of-two sizes, so we also
* allocate IOVA space in power-of-two sizes.
*/
bits_wanted = 1UL << get_iovp_order(bits_wanted << PAGE_SHIFT);
if (likely(bits_wanted == 1)) {
unsigned int bitshiftcnt;
for(; res_ptr < res_end ; res_ptr++) {
......@@ -675,6 +683,8 @@ sba_free_range(struct ioc *ioc, dma_addr_t iova, size_t size)
int bits_not_wanted = size >> iovp_shift;
unsigned long m;
/* Round up to power-of-two size: see AR2305 note above */
bits_not_wanted = 1UL << get_iovp_order(bits_not_wanted << PAGE_SHIFT);
for (; bits_not_wanted > 0 ; res_ptr++) {
if (unlikely(bits_not_wanted > BITS_PER_LONG)) {
......
......@@ -293,20 +293,20 @@ acpi_parse_nmi_src (acpi_table_entry_header *header, const unsigned long end)
return 0;
}
/* Hook from generic ACPI tables.c */
void __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
static void __init
acpi_madt_oem_check (char *oem_id, char *oem_table_id)
{
if (!strncmp(oem_id, "IBM", 3) &&
(!strncmp(oem_table_id, "SERMOW", 6))){
(!strncmp(oem_table_id, "SERMOW", 6))) {
/* Unfortunatly ITC_DRIFT is not yet part of the
/*
* Unfortunately ITC_DRIFT is not yet part of the
* official SAL spec, so the ITC_DRIFT bit is not
* set by the BIOS on this hardware.
*/
sal_platform_features |= IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT;
/*Start cyclone clock*/
cyclone_setup(0);
cyclone_setup();
}
}
......
......@@ -10,10 +10,9 @@
#define CYCLONE_TIMER_FREQ 100000000
int use_cyclone;
int __init cyclone_setup(char *str)
void __init cyclone_setup(void)
{
use_cyclone = 1;
return 1;
}
static u32* volatile cyclone_timer; /* Cyclone MPMC0 register */
......
......@@ -130,6 +130,8 @@ static int cpe_poll_enabled = 1;
extern void salinfo_log_wakeup(int type, u8 *buffer, u64 size, int irqsafe);
static int mca_init;
/*
* IA64_MCA log support
*/
......@@ -542,7 +544,7 @@ ia64_mca_register_cpev (int cpev)
}
IA64_MCA_DEBUG("%s: corrected platform error "
"vector %#x setup and enabled\n", __FUNCTION__, cpev);
"vector %#x registered\n", __FUNCTION__, cpev);
}
#endif /* CONFIG_ACPI */
......@@ -551,8 +553,9 @@ ia64_mca_register_cpev (int cpev)
/*
* ia64_mca_cmc_vector_setup
*
* Setup the corrected machine check vector register in the processor and
* unmask interrupt. This function is invoked on a per-processor basis.
* Setup the corrected machine check vector register in the processor.
* (The interrupt is masked on boot. ia64_mca_late_init unmask this.)
* This function is invoked on a per-processor basis.
*
* Inputs
* None
......@@ -566,12 +569,12 @@ ia64_mca_cmc_vector_setup (void)
cmcv_reg_t cmcv;
cmcv.cmcv_regval = 0;
cmcv.cmcv_mask = 0; /* Unmask/enable interrupt */
cmcv.cmcv_mask = 1; /* Mask/disable interrupt at first */
cmcv.cmcv_vector = IA64_CMC_VECTOR;
ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
IA64_MCA_DEBUG("%s: CPU %d corrected "
"machine check vector %#x setup and enabled.\n",
"machine check vector %#x registered.\n",
__FUNCTION__, smp_processor_id(), IA64_CMC_VECTOR);
IA64_MCA_DEBUG("%s: CPU %d CMCV = %#016lx\n",
......@@ -1293,7 +1296,7 @@ ia64_mca_init(void)
*/
register_percpu_irq(IA64_CMC_VECTOR, &cmci_irqaction);
register_percpu_irq(IA64_CMCP_VECTOR, &cmcp_irqaction);
ia64_mca_cmc_vector_setup(); /* Setup vector on BSP & enable */
ia64_mca_cmc_vector_setup(); /* Setup vector on BSP */
/* Setup the MCA rendezvous interrupt vector */
register_percpu_irq(IA64_MCA_RENDEZ_VECTOR, &mca_rdzv_irqaction);
......@@ -1303,23 +1306,8 @@ ia64_mca_init(void)
#ifdef CONFIG_ACPI
/* Setup the CPEI/P vector and handler */
{
irq_desc_t *desc;
unsigned int irq;
cpe_vector = acpi_request_vector(ACPI_INTERRUPT_CPEI);
if (cpe_vector >= 0) {
for (irq = 0; irq < NR_IRQS; ++irq)
if (irq_to_vector(irq) == cpe_vector) {
desc = irq_descp(irq);
desc->status |= IRQ_PER_CPU;
setup_irq(irq, &mca_cpe_irqaction);
}
ia64_mca_register_cpev(cpe_vector);
}
register_percpu_irq(IA64_CPEP_VECTOR, &mca_cpep_irqaction);
}
cpe_vector = acpi_request_vector(ACPI_INTERRUPT_CPEI);
register_percpu_irq(IA64_CPEP_VECTOR, &mca_cpep_irqaction);
#endif
/* Initialize the areas set aside by the OS to buffer the
......@@ -1331,6 +1319,7 @@ ia64_mca_init(void)
ia64_log_init(SAL_INFO_TYPE_CMC);
ia64_log_init(SAL_INFO_TYPE_CPE);
mca_init = 1;
printk(KERN_INFO "MCA related initialization done\n");
}
......@@ -1347,21 +1336,46 @@ ia64_mca_init(void)
static int __init
ia64_mca_late_init(void)
{
if (!mca_init)
return 0;
/* Setup the CMCI/P vector and handler */
init_timer(&cmc_poll_timer);
cmc_poll_timer.function = ia64_mca_cmc_poll;
/* Reset to the correct state */
/* Unmask/enable the vector */
cmc_polling_enabled = 0;
schedule_work(&cmc_enable_work);
IA64_MCA_DEBUG("%s: CMCI/P setup and enabled.\n", __FUNCTION__);
#ifdef CONFIG_ACPI
/* Setup the CPEI/P vector and handler */
init_timer(&cpe_poll_timer);
cpe_poll_timer.function = ia64_mca_cpe_poll;
#ifdef CONFIG_ACPI
/* If platform doesn't support CPEI, get the timer going. */
if (cpe_vector < 0 && cpe_poll_enabled) {
ia64_mca_cpe_poll(0UL);
} else {
cpe_poll_enabled = 0;
{
irq_desc_t *desc;
unsigned int irq;
if (cpe_vector >= 0) {
/* If platform supports CPEI, enable the irq. */
cpe_poll_enabled = 0;
for (irq = 0; irq < NR_IRQS; ++irq)
if (irq_to_vector(irq) == cpe_vector) {
desc = irq_descp(irq);
desc->status |= IRQ_PER_CPU;
setup_irq(irq, &mca_cpe_irqaction);
}
ia64_mca_register_cpev(cpe_vector);
IA64_MCA_DEBUG("%s: CPEI/P setup and enabled.\n", __FUNCTION__);
} else {
/* If platform doesn't support CPEI, get the timer going. */
if (cpe_poll_enabled) {
ia64_mca_cpe_poll(0UL);
IA64_MCA_DEBUG("%s: CPEP setup and enabled.\n", __FUNCTION__);
}
}
}
#endif
......
......@@ -426,8 +426,6 @@ salinfo_log_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
struct inode *inode = file->f_dentry->d_inode;
struct proc_dir_entry *entry = PDE(inode);
struct salinfo_data *data = entry->data;
void *saldata;
size_t size;
u8 *buf;
u64 bufsize;
......@@ -441,18 +439,7 @@ salinfo_log_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
buf = NULL;
bufsize = 0;
}
if (*ppos >= bufsize)
return 0;
saldata = buf + file->f_pos;
size = bufsize - file->f_pos;
if (size > count)
size = count;
if (copy_to_user(buffer, saldata, size))
return -EFAULT;
*ppos += size;
return size;
return simple_read_from_buffer(buffer, count, ppos, buf, bufsize);
}
static void
......
......@@ -375,9 +375,10 @@ setup_arch (char **cmdline_p)
}
#endif
/* enable IA-64 Machine Check Abort Handling */
ia64_mca_init();
/* enable IA-64 Machine Check Abort Handling unless disabled */
if (!strstr(saved_command_line, "nomca"))
ia64_mca_init();
platform_setup(cmdline_p);
paging_init();
}
......
......@@ -299,7 +299,7 @@ smp_callin (void)
smp_setup_percpu_timer();
ia64_mca_cmc_vector_setup(); /* Setup vector on AP & enable */
ia64_mca_cmc_vector_setup(); /* Setup vector on AP */
#ifdef CONFIG_PERFMON
pfm_init_percpu();
......
......@@ -37,7 +37,7 @@ nasid_t master_nasid = INVALID_NASID; /* This is the partition master nasid */
*
* This code is executed once for each Hub chip.
*/
static void
static void __init
per_hub_init(cnodeid_t cnode)
{
nasid_t nasid;
......@@ -130,10 +130,8 @@ sgi_master_io_infr_init(void)
klhwg_add_all_modules(hwgraph_root);
klhwg_add_all_nodes(hwgraph_root);
for (cnode = 0; cnode < numionodes; cnode++) {
extern void per_hub_init(cnodeid_t);
for (cnode = 0; cnode < numionodes; cnode++)
per_hub_init(cnode);
}
/*
*
......
......@@ -188,7 +188,7 @@ sn_irq_desc(unsigned int irq)
}
u8
sn_irq_to_vector(u8 irq)
sn_irq_to_vector(unsigned int irq)
{
return(irq);
}
......
......@@ -15,19 +15,20 @@
#include <sys/stat.h>
#include <unistd.h>
#include <netinet/in.h>
#include <stdint.h>
/* This gets tacked on the front of the image. There are also a few
* bytes allocated after the _start label used by the boot rom (see
* head.S for details).
*/
typedef struct boot_block {
unsigned long bb_magic; /* 0x0052504F */
unsigned long bb_dest; /* Target address of the image */
unsigned long bb_num_512blocks; /* Size, rounded-up, in 512 byte blks */
unsigned long bb_debug_flag; /* Run debugger or image after load */
unsigned long bb_entry_point; /* The image address to start */
unsigned long bb_checksum; /* 32 bit checksum including header */
unsigned long reserved[2];
uint32_t bb_magic; /* 0x0052504F */
uint32_t bb_dest; /* Target address of the image */
uint32_t bb_num_512blocks; /* Size, rounded-up, in 512 byte blks */
uint32_t bb_debug_flag; /* Run debugger or image after load */
uint32_t bb_entry_point; /* The image address to start */
uint32_t bb_checksum; /* 32 bit checksum including header */
uint32_t reserved[2];
} boot_block_t;
#define IMGBLK 512
......
......@@ -19,6 +19,7 @@
#include <linux/ctype.h>
#include <linux/threads.h>
#include <linux/smp_lock.h>
#include <linux/seq_file.h>
#include <asm/uaccess.h>
#include <asm/bitops.h>
......@@ -30,11 +31,9 @@
#include <asm/system.h>
#include <asm/reg.h>
static ssize_t ppc_htab_read(struct file * file, char __user * buf,
size_t count, loff_t *ppos);
static int ppc_htab_show(struct seq_file *m, void *v);
static ssize_t ppc_htab_write(struct file * file, const char __user * buffer,
size_t count, loff_t *ppos);
static long long ppc_htab_lseek(struct file * file, loff_t offset, int orig);
int proc_dol2crvec(ctl_table *table, int write, struct file *filp,
void __user *buffer, size_t *lenp);
......@@ -49,10 +48,17 @@ extern unsigned long pte_errors;
extern unsigned int primary_pteg_full;
extern unsigned int htab_hash_searches;
static int ppc_htab_open(struct inode *inode, struct file *file)
{
return single_open(file, ppc_htab_show, NULL);
}
struct file_operations ppc_htab_operations = {
.llseek = ppc_htab_lseek,
.read = ppc_htab_read,
.write = ppc_htab_write,
.open = ppc_htab_open,
.read = seq_read,
.llseek = seq_lseek,
.write = ppc_htab_write,
.release = single_release,
};
static char *pmc1_lookup(unsigned long mmcr0)
......@@ -96,31 +102,25 @@ static char *pmc2_lookup(unsigned long mmcr0)
* is _REALLY_ slow (see the nested for loops below) but nothing
* in here should be really timing critical. -- Cort
*/
static ssize_t ppc_htab_read(struct file * file, char __user * buf,
size_t count, loff_t *ppos)
static int ppc_htab_show(struct seq_file *m, void *v)
{
unsigned long mmcr0 = 0, pmc1 = 0, pmc2 = 0;
int n = 0;
#if defined(CONFIG_PPC_STD_MMU) && !defined(CONFIG_PPC64BRIDGE)
unsigned int kptes = 0, uptes = 0;
PTE *ptr;
#endif /* CONFIG_PPC_STD_MMU */
char buffer[512];
if (count < 0)
return -EINVAL;
if (cur_cpu_spec[0]->cpu_features & CPU_FTR_604_PERF_MON) {
mmcr0 = mfspr(SPRN_MMCR0);
pmc1 = mfspr(SPRN_PMC1);
pmc2 = mfspr(SPRN_PMC2);
n += sprintf( buffer + n,
seq_printf(m,
"604 Performance Monitoring\n"
"MMCR0\t\t: %08lx %s%s ",
mmcr0,
( mmcr0>>28 & 0x2 ) ? "(user mode counted)" : "",
( mmcr0>>28 & 0x4 ) ? "(kernel mode counted)" : "");
n += sprintf( buffer + n,
seq_printf(m,
"\nPMC1\t\t: %08lx (%s)\n"
"PMC2\t\t: %08lx (%s)\n",
pmc1, pmc1_lookup(mmcr0),
......@@ -129,10 +129,9 @@ static ssize_t ppc_htab_read(struct file * file, char __user * buf,
#ifdef CONFIG_PPC_STD_MMU
/* if we don't have a htab */
if ( Hash_size == 0 )
{
n += sprintf( buffer + n, "No Hash Table used\n");
goto return_string;
if ( Hash_size == 0 ) {
seq_printf(m, "No Hash Table used\n");
return 0;
}
#ifndef CONFIG_PPC64BRIDGE
......@@ -151,7 +150,7 @@ static ssize_t ppc_htab_read(struct file * file, char __user * buf,
}
#endif
n += sprintf( buffer + n,
seq_printf(m,
"PTE Hash Table Information\n"
"Size\t\t: %luKb\n"
"Buckets\t\t: %lu\n"
......@@ -173,7 +172,7 @@ static ssize_t ppc_htab_read(struct file * file, char __user * buf,
#endif
);
n += sprintf( buffer + n,
seq_printf(m,
"Reloads\t\t: %lu\n"
"Preloads\t: %lu\n"
"Searches\t: %u\n"
......@@ -181,23 +180,13 @@ static ssize_t ppc_htab_read(struct file * file, char __user * buf,
"Evicts\t\t: %lu\n",
htab_reloads, htab_preloads, htab_hash_searches,
primary_pteg_full, htab_evicts);
return_string:
#endif /* CONFIG_PPC_STD_MMU */
n += sprintf( buffer + n,
seq_printf(m,
"Non-error misses: %lu\n"
"Error misses\t: %lu\n",
pte_misses, pte_errors);
if (*ppos >= strlen(buffer))
return 0;
if (n > strlen(buffer) - *ppos)
n = strlen(buffer) - *ppos;
if (n > count)
n = count;
if (copy_to_user(buf, buffer + *ppos, n))
return -EFAULT;
*ppos += n;
return n;
return 0;
}
/*
......@@ -210,7 +199,7 @@ static ssize_t ppc_htab_write(struct file * file, const char __user * ubuffer,
unsigned long tmp;
char buffer[16];
if ( current->uid != 0 )
if (!capable(CAP_SYS_ADMIN))
return -EACCES;
if (strncpy_from_user(buffer, ubuffer, 15))
return -EFAULT;
......@@ -330,26 +319,6 @@ static ssize_t ppc_htab_write(struct file * file, const char __user * ubuffer,
#endif /* CONFIG_PPC_STD_MMU */
}
static long long
ppc_htab_lseek(struct file * file, loff_t offset, int orig)
{
long long ret = -EINVAL;
lock_kernel();
switch (orig) {
case 0:
file->f_pos = offset;
ret = file->f_pos;
break;
case 1:
file->f_pos += offset;
ret = file->f_pos;
}
unlock_kernel();
return ret;
}
int proc_dol2crvec(ctl_table *table, int write, struct file *filp,
void __user *buffer_arg, size_t *lenp)
{
......
......@@ -161,21 +161,10 @@ static loff_t page_map_seek( struct file *file, loff_t off, int whence)
return (file->f_pos = new);
}
static ssize_t page_map_read( struct file *file, char *buf, size_t nbytes, loff_t *ppos)
static ssize_t page_map_read( struct file *file, char __user *buf, size_t nbytes, loff_t *ppos)
{
unsigned pos = *ppos;
struct proc_dir_entry *dp = PDE(file->f_dentry->d_inode);
if ( pos >= dp->size )
return 0;
if ( nbytes >= dp->size )
nbytes = dp->size;
if ( pos + nbytes > dp->size )
nbytes = dp->size - pos;
copy_to_user( buf, (char *)dp->data + pos, nbytes );
*ppos = pos + nbytes;
return nbytes;
return simple_read_from_buffer(buf, nbytes, ppos, dp->data, dp->size);
}
static int page_map_mmap( struct file *file, struct vm_area_struct *vma )
......
This diff is collapsed.
......@@ -118,9 +118,9 @@ config CRYPTO_SERPENT
See also:
http://www.cl.cam.ac.uk/~rja14/serpent.html
config CRYPTO_AES_GENERIC
config CRYPTO_AES
tristate "AES cipher algorithms"
depends on CRYPTO && !(X86 && !X86_64)
depends on CRYPTO
help
AES cipher algorithms (FIPS-197). AES uses the Rijndael
algorithm.
......@@ -138,26 +138,6 @@ config CRYPTO_AES_GENERIC
See http://csrc.nist.gov/CryptoToolkit/aes/ for more information.
config CRYPTO_AES_586
tristate "AES cipher algorithms (i586)"
depends on CRYPTO && (X86 && !X86_64)
help
AES cipher algorithms (FIPS-197). AES uses the Rijndael
algorithm.
Rijndael appears to be consistently a very good performer in
both hardware and software across a wide range of computing
environments regardless of its use in feedback or non-feedback
modes. Its key setup time is excellent, and its key agility is
good. Rijndael's very low memory requirements make it very well
suited for restricted-space environments, in which it also
demonstrates excellent performance. Rijndael's operations are
among the easiest to defend against power and timing attacks.
The AES specifies three key sizes: 128, 192 and 256 bits
See http://csrc.nist.gov/encryption/aes/ for more information.
config CRYPTO_CAST5
tristate "CAST5 (CAST-128) cipher algorithm"
depends on CRYPTO
......
......@@ -92,8 +92,7 @@ acpi_system_read_dsdt (
{
acpi_status status = AE_OK;
struct acpi_buffer dsdt = {ACPI_ALLOCATE_BUFFER, NULL};
void *data = NULL;
size_t size = 0;
ssize_t res;
ACPI_FUNCTION_TRACE("acpi_system_read_dsdt");
......@@ -101,22 +100,11 @@ acpi_system_read_dsdt (
if (ACPI_FAILURE(status))
return_VALUE(-ENODEV);
if (*ppos < dsdt.length) {
data = dsdt.pointer + file->f_pos;
size = dsdt.length - file->f_pos;
if (size > count)
size = count;
if (copy_to_user(buffer, data, size)) {
acpi_os_free(dsdt.pointer);
return_VALUE(-EFAULT);
}
}
res = simple_read_from_buffer(buffer, count, ppos,
dsdt.pointer, dsdt.length);
acpi_os_free(dsdt.pointer);
*ppos += size;
return_VALUE(size);
return_VALUE(res);
}
......@@ -135,8 +123,7 @@ acpi_system_read_fadt (
{
acpi_status status = AE_OK;
struct acpi_buffer fadt = {ACPI_ALLOCATE_BUFFER, NULL};
void *data = NULL;
size_t size = 0;
ssize_t res;
ACPI_FUNCTION_TRACE("acpi_system_read_fadt");
......@@ -144,22 +131,11 @@ acpi_system_read_fadt (
if (ACPI_FAILURE(status))
return_VALUE(-ENODEV);
if (*ppos < fadt.length) {
data = fadt.pointer + file->f_pos;
size = fadt.length - file->f_pos;
if (size > count)
size = count;
if (copy_to_user(buffer, data, size)) {
acpi_os_free(fadt.pointer);
return_VALUE(-EFAULT);
}
}
res = simple_read_from_buffer(buffer, count, ppos,
fadt.pointer, fadt.length);
acpi_os_free(fadt.pointer);
*ppos += size;
return_VALUE(size);
return_VALUE(res);
}
......
......@@ -120,7 +120,7 @@ int multipath_end_request(struct bio *bio, unsigned int bytes_done, int error)
if (uptodate)
multipath_end_bh_io(mp_bh, uptodate);
else {
else if ((bio->bi_rw & (1 << BIO_RW_AHEAD)) == 0) {
/*
* oops, IO error:
*/
......@@ -130,7 +130,8 @@ int multipath_end_request(struct bio *bio, unsigned int bytes_done, int error)
bdevname(rdev->bdev,b),
(unsigned long long)bio->bi_sector);
multipath_reschedule_retry(mp_bh);
}
} else
multipath_end_bh_io(mp_bh, 0);
rdev_dec_pending(rdev, conf->mddev);
return 0;
}
......@@ -382,7 +383,11 @@ static void multipathd (mddev_t *mddev)
" to another IO path\n",
bdevname(bio->bi_bdev,b),
(unsigned long long)bio->bi_sector);
*bio = *(mp_bh->master_bio);
bio->bi_bdev = conf->multipaths[mp_bh->path].rdev->bdev;
bio->bi_rw |= (1 << BIO_RW_FAILFAST);
bio->bi_end_io = multipath_end_request;
bio->bi_private = mp_bh;
generic_make_request(bio);
}
}
......
......@@ -4,7 +4,7 @@
*
* (C) 2000 Red Hat. GPL'd
*
* $Id: cfi_cmdset_0020.c,v 1.13 2004/07/12 21:52:50 dwmw2 Exp $
* $Id: cfi_cmdset_0020.c,v 1.14 2004/07/20 02:44:25 dwmw2 Exp $
*
* 10/10/2000 Nicolas Pitre <nico@cam.org>
* - completely revamped method functions so they are aware and
......@@ -1400,11 +1400,6 @@ static void cfi_staa_destroy(struct mtd_info *mtd)
kfree(cfi);
}
#if LINUX_VERSION_CODE < 0x20212 && defined(MODULE)
#define cfi_staa_init init_module
#define cfi_staa_exit cleanup_module
#endif
static char im_name[]="cfi_cmdset_0020";
int __init cfi_staa_init(void)
......
/*
* $Id: pmc551.c,v 1.26 2004/07/14 17:25:07 dwmw2 Exp $
* $Id: pmc551.c,v 1.27 2004/07/20 02:44:26 dwmw2 Exp $
*
* PMC551 PCI Mezzanine Ram Device
*
......@@ -109,12 +109,6 @@
#include <linux/mtd/pmc551.h>
#include <linux/mtd/compatmac.h>
#if LINUX_VERSION_CODE > 0x20300
#define PCI_BASE_ADDRESS(dev) (dev->resource[0].start)
#else
#define PCI_BASE_ADDRESS(dev) (dev->base_address[0])
#endif
static struct mtd_info *pmc551list;
static int pmc551_erase (struct mtd_info *mtd, struct erase_info *instr)
......@@ -564,7 +558,7 @@ static u32 fixup_pmc551 (struct pci_dev *dev)
(size<1024)?size:(size<1048576)?size>>10:size>>20,
(size<1024)?'B':(size<1048576)?'K':'M',
size, ((dcmd&(0x1<<3)) == 0)?"non-":"",
PCI_BASE_ADDRESS(dev)&PCI_BASE_ADDRESS_MEM_MASK );
(dev->resource[0].start)&PCI_BASE_ADDRESS_MEM_MASK );
/*
* Check to see the state of the memory
......@@ -694,7 +688,7 @@ int __init init_pmc551(void)
}
printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%lX\n",
PCI_BASE_ADDRESS(PCI_Device));
PCI_Device->resource[0].start);
/*
* The PMC551 device acts VERY weird if you don't init it
......@@ -748,7 +742,7 @@ int __init init_pmc551(void)
printk(KERN_NOTICE "pmc551: Using specified aperture size %dM\n", asize>>20);
priv->asize = asize;
}
priv->start = ioremap((PCI_BASE_ADDRESS(PCI_Device)
priv->start = ioremap(((PCI_Device->resource[0].start)
& PCI_BASE_ADDRESS_MEM_MASK),
priv->asize);
......
/*
* $Id: mtdcore.c,v 1.42 2004/07/13 10:21:13 dwmw2 Exp $
* $Id: mtdcore.c,v 1.43 2004/07/23 15:20:46 dwmw2 Exp $
*
* Core registration and callback routines for MTD
* drivers and users.
*
*/
#include <linux/version.h>
#include <linux/config.h>
#include <linux/module.h>
#include <linux/kernel.h>
......
......@@ -6,7 +6,7 @@
* Derived from drivers/mtd/spia.c
* Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
*
* $Id: autcpu12.c,v 1.19 2004/07/12 15:02:15 dwmw2 Exp $
* $Id: autcpu12.c,v 1.20 2004/07/20 02:44:26 dwmw2 Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
......@@ -44,14 +44,6 @@
*/
static struct mtd_info *autcpu12_mtd = NULL;
/*
* Module stuff
*/
#if LINUX_VERSION_CODE < 0x20212 && defined(MODULE)
#define autcpu12_init init_module
#define autcpu12_cleanup cleanup_module
#endif
static int autcpu12_io_base = CS89712_VIRT_BASE;
static int autcpu12_fio_pbase = AUTCPU12_PHYS_SMC;
static int autcpu12_fio_ctrl = AUTCPU12_SMC_SELECT_OFFSET;
......
......@@ -11,7 +11,7 @@
* Derived from drivers/mtd/autcpu12.c
* Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
*
* $Id: tx4925ndfmc.c,v 1.2 2004/03/27 19:55:53 gleixner Exp $
* $Id: tx4925ndfmc.c,v 1.3 2004/07/20 02:44:26 dwmw2 Exp $
*
* Copyright (C) 2001 Toshiba Corporation
*
......@@ -39,14 +39,6 @@ extern struct nand_oobinfo jffs2_oobinfo;
*/
static struct mtd_info *tx4925ndfmc_mtd = NULL;
/*
* Module stuff
*/
#if LINUX_VERSION_CODE < 0x20212 && defined(MODULE)
#define tx4925ndfmc_init init_module
#define tx4925ndfmc_cleanup cleanup_module
#endif
/*
* Define partitions for flash devices
*/
......
......@@ -47,23 +47,7 @@ static struct super_operations s_ops = {
ssize_t oprofilefs_str_to_user(char const * str, char __user * buf, size_t count, loff_t * offset)
{
size_t len = strlen(str);
if (!count)
return 0;
if (*offset > len)
return 0;
if (count > len - *offset)
count = len - *offset;
if (copy_to_user(buf, str + *offset, count))
return -EFAULT;
*offset += count;
return count;
return simple_read_from_buffer(buf, count, offset, str, strlen(str));
}
......@@ -72,29 +56,10 @@ ssize_t oprofilefs_str_to_user(char const * str, char __user * buf, size_t count
ssize_t oprofilefs_ulong_to_user(unsigned long val, char __user * buf, size_t count, loff_t * offset)
{
char tmpbuf[TMPBUFSIZE];
size_t maxlen;
if (!count)
return 0;
spin_lock(&oprofilefs_lock);
maxlen = snprintf(tmpbuf, TMPBUFSIZE, "%lu\n", val);
spin_unlock(&oprofilefs_lock);
size_t maxlen = snprintf(tmpbuf, TMPBUFSIZE, "%lu\n", val);
if (maxlen > TMPBUFSIZE)
maxlen = TMPBUFSIZE;
if (*offset > maxlen)
return 0;
if (count > maxlen - *offset)
count = maxlen - *offset;
if (copy_to_user(buf, tmpbuf + *offset, count))
return -EFAULT;
*offset += count;
return count;
return simple_read_from_buffer(buf, count, offset, tmpbuf, maxlen);
}
......
......@@ -1118,6 +1118,12 @@ static int device_check(imm_struct *dev)
return -ENODEV;
}
static int imm_adjust_queue(struct scsi_device *device)
{
blk_queue_bounce_limit(device->request_queue, BLK_BOUNCE_HIGH);
return 0;
}
static struct scsi_host_template imm_template = {
.module = THIS_MODULE,
.proc_name = "imm",
......@@ -1133,6 +1139,7 @@ static struct scsi_host_template imm_template = {
.cmd_per_lun = 1,
.use_clustering = ENABLE_CLUSTERING,
.can_queue = 1,
.slave_alloc = imm_adjust_queue,
};
/***************************************************************************
......
......@@ -571,22 +571,7 @@ static ssize_t uhci_proc_read(struct file *file, char __user *buf,
size_t nbytes, loff_t *ppos)
{
struct uhci_proc *up = file->private_data;
unsigned int pos;
unsigned int size;
pos = *ppos;
size = up->size;
if (pos >= size)
return 0;
if (nbytes > size - pos)
nbytes = size - pos;
if (copy_to_user(buf, up->data + pos, nbytes))
return -EFAULT;
*ppos += nbytes;
return nbytes;
return simple_read_from_buffer(buf, nbytes, ppos, up->data, up->size);
}
static int uhci_proc_release(struct inode *inode, struct file *file)
......
......@@ -1076,24 +1076,20 @@ config JFFS2_FS_DEBUG
messages at debug level 1 while the misbehaviour was occurring.
config JFFS2_FS_NAND
bool "JFFS2 support for NAND flash (EXPERIMENTAL)"
depends on JFFS2_FS && EXPERIMENTAL
bool "JFFS2 support for NAND flash"
depends on JFFS2_FS
default n
help
This enables the experimental support for NAND flash in JFFS2. NAND
is a newer type of flash chip design than the traditional NOR flash,
with higher density but a handful of characteristics which make it
more interesting for the file system to use. Support for NAND flash
is not yet complete and may corrupt data. For further information,
including a link to the mailing list where details of the remaining
work to be completed for NAND flash support can be found, see the
JFFS2 web site at <http://sources.redhat.com/jffs2>.
This enables the support for NAND flash in JFFS2. NAND is a newer
type of flash chip design than the traditional NOR flash, with
higher density but a handful of characteristics which make it more
interesting for the file system to use.
Say 'N' unless you have NAND flash and you are willing to test and
develop JFFS2 support for it.
Say 'N' unless you have NAND flash.
config JFFS2_COMPRESSION_OPTIONS
bool "Advanced compression options for JFFS2"
depends on JFFS2_FS
default n
help
Enabling this option allows you to explicitly choose which
......
......@@ -628,7 +628,7 @@ void shrink_dcache_anon(struct hlist_head *head)
struct dentry *this = hlist_entry(lp, struct dentry, d_hash);
if (!list_empty(&this->d_lru)) {
dentry_stat.nr_unused--;
list_del(&this->d_lru);
list_del_init(&this->d_lru);
}
/*
......
......@@ -7,6 +7,7 @@
#include <linux/pagemap.h>
#include <linux/mount.h>
#include <linux/vfs.h>
#include <asm/uaccess.h>
int simple_getattr(struct vfsmount *mnt, struct dentry *dentry,
struct kstat *stat)
......@@ -439,6 +440,22 @@ void simple_release_fs(struct vfsmount **mount, int *count)
mntput(mnt);
}
ssize_t simple_read_from_buffer(void __user *to, size_t count, loff_t *ppos,
const void *from, size_t available)
{
loff_t pos = *ppos;
if (pos < 0)
return -EINVAL;
if (pos >= available)
return 0;
if (count > available - pos)
count = available - pos;
if (copy_to_user(to, from + pos, count))
return -EFAULT;
*ppos = pos + count;
return count;
}
EXPORT_SYMBOL(dcache_dir_close);
EXPORT_SYMBOL(dcache_dir_lseek);
EXPORT_SYMBOL(dcache_dir_open);
......@@ -461,3 +478,4 @@ EXPORT_SYMBOL(simple_rmdir);
EXPORT_SYMBOL(simple_statfs);
EXPORT_SYMBOL(simple_sync_file);
EXPORT_SYMBOL(simple_unlink);
EXPORT_SYMBOL(simple_read_from_buffer);
......@@ -137,6 +137,7 @@ static inline const char * get_task_state(struct task_struct *tsk)
TASK_INTERRUPTIBLE |
TASK_UNINTERRUPTIBLE |
TASK_ZOMBIE |
TASK_DEAD |
TASK_STOPPED);
const char **p = &task_state_array[0];
......
......@@ -26,6 +26,41 @@ extern unsigned long s3c2410_pclk;
extern unsigned long s3c2410_hclk;
extern unsigned long s3c2410_fclk;
/* external functions for GPIO support
*
* These allow various different clients to access the same GPIO
* registers without conflicting. If your driver only owns the entire
* GPIO register, then it is safe to ioremap/__raw_{read|write} to it.
*/
/* s3c2410_gpio_cfgpin
*
* set the configuration of the given pin to the value passed.
*
* eg:
* s3c2410_gpio_cfgpin(S3C2410_GPA0, S3C2410_GPA0_ADDR0);
* s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2410_GPE8_SDDAT1);
*/
extern void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function);
/* s3c2410_gpio_pullup
*
* configure the pull-up control on the given pin
*
* to = 1 => disable the pull-up
* 0 => enable the pull-up
*
* eg;
*
* s3c2410_gpio_pullup(S3C2410_GPB0, 0);
* s3c2410_gpio_pullup(S3C2410_GPE8, 0);
*/
extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to);
extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to);
#endif /* __ASSEMBLY__ */
#include <asm/sizes.h>
......
This diff is collapsed.
......@@ -3,10 +3,10 @@
#ifdef CONFIG_IA64_CYCLONE
extern int use_cyclone;
extern int __init cyclone_setup(char*);
extern void __init cyclone_setup(void);
#else /* CONFIG_IA64_CYCLONE */
#define use_cyclone 0
static inline void cyclone_setup(char* s)
static inline void cyclone_setup(void)
{
printk(KERN_ERR "Cyclone Counter: System not configured"
" w/ CONFIG_IA64_CYCLONE.\n");
......
......@@ -29,8 +29,8 @@ typedef void ia64_mv_timer_interrupt_t (int, void *, struct pt_regs *);
typedef void ia64_mv_global_tlb_purge_t (unsigned long, unsigned long, unsigned long);
typedef void ia64_mv_tlb_migrate_finish_t (struct mm_struct *);
typedef struct irq_desc *ia64_mv_irq_desc (unsigned int);
typedef u8 ia64_mv_irq_to_vector (u8);
typedef unsigned int ia64_mv_local_vector_to_irq (u8 vector);
typedef u8 ia64_mv_irq_to_vector (unsigned int);
typedef unsigned int ia64_mv_local_vector_to_irq (u8);
/* DMA-mapping interface: */
typedef void ia64_mv_dma_init (void);
......
......@@ -4,6 +4,9 @@
#ifdef CONFIG_IA64_DIG
/* Max 8 Nodes */
#define NODES_SHIFT 3
#elif defined(CONFIG_IA64_HP_ZX1)
/* Max 32 Nodes */
#define NODES_SHIFT 5
#elif defined(CONFIG_IA64_SGI_SN2) || defined(CONFIG_IA64_GENERIC)
/* Max 256 Nodes */
#define NODES_SHIFT 8
......
......@@ -1527,6 +1527,8 @@ extern int simple_fill_super(struct super_block *, int, struct tree_descr *);
extern int simple_pin_fs(char *name, struct vfsmount **mount, int *count);
extern void simple_release_fs(struct vfsmount **mount, int *count);
extern ssize_t simple_read_from_buffer(void __user *, size_t, loff_t *, const void *, size_t);
extern int inode_change_ok(struct inode *, struct iattr *);
extern int __must_check inode_setattr(struct inode *, struct iattr *);
......
/* Common Flash Interface structures
* See http://support.intel.com/design/flash/technote/index.htm
* $Id: cfi.h,v 1.44 2004/07/13 22:32:52 dwmw2 Exp $
* $Id: cfi.h,v 1.45 2004/07/20 02:44:27 dwmw2 Exp $
*/
#ifndef __MTD_CFI_H__
......@@ -328,14 +328,12 @@ static inline uint8_t cfi_read_query(struct map_info *map, uint32_t addr)
static inline void cfi_udelay(int us)
{
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0)
unsigned long t = us * HZ / 1000000;
if (t) {
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(t);
return;
}
#endif
udelay(us);
cond_resched();
}
......
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