Merge tag 'qcom-arm64-for-4.10-2' of...

Merge tag 'qcom-arm64-for-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64

Pull "Qualcomm ARM64 Updates for v4.10 - Part 2" from Andy Gross:

* Add SDHC xo clk and 1.8V DDR support

* tag 'qcom-arm64-for-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  arm64: dts: qcom: msm8916: Add ddr support to sdhc1
  ARM: dts: Add xo to sdhc clock node on qcom platforms

arch/arm64/boot/dts/qcom/msm8916.dtsi

@@ -521,8 +521,10 @@ sdhc_1: sdhci@07824000 {
 			interrupts = <0 123 0>, <0 138 0>;
 			interrupt-names = "hc_irq", "pwr_irq";
 			clocks = <&gcc GCC_SDCC1_APPS_CLK>,
-				 <&gcc GCC_SDCC1_AHB_CLK>;
-			clock-names = "core", "iface";
+				 <&gcc GCC_SDCC1_AHB_CLK>,
+				 <&xo_board>;
+			clock-names = "core", "iface", "xo";
+			mmc-ddr-1_8v;
 			bus-width = <8>;
 			non-removable;
 			status = "disabled";
@@ -536,8 +538,9 @@ sdhc_2: sdhci@07864000 {
 			interrupts = <0 125 0>, <0 221 0>;
 			interrupt-names = "hc_irq", "pwr_irq";
 			clocks = <&gcc GCC_SDCC2_APPS_CLK>,
-				 <&gcc GCC_SDCC2_AHB_CLK>;
-			clock-names = "core", "iface";
+				 <&gcc GCC_SDCC2_AHB_CLK>,
+				 <&xo_board>;
+			clock-names = "core", "iface", "xo";
 			bus-width = <4>;
 			status = "disabled";
 		};

arch/arm64/boot/dts/qcom/msm8996.dtsi

@@ -228,14 +228,14 @@ timer {
 	};
 
 	clocks {
-		xo_board {
+		xo_board: xo_board {
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
 			clock-frequency = <19200000>;
 			clock-output-names = "xo_board";
 		};
 
-		sleep_clk {
+		sleep_clk: sleep_clk {
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
 			clock-frequency = <32764>;
@@ -405,9 +405,10 @@ sdhc2: sdhci@74a4900 {
 			 interrupts = <0 125 0>, <0 221 0>;
 			 interrupt-names = "hc_irq", "pwr_irq";
 
-			 clock-names = "iface", "core";
+			 clock-names = "iface", "core", "xo";
 			 clocks = <&gcc GCC_SDCC2_AHB_CLK>,
-			 <&gcc GCC_SDCC2_APPS_CLK>;
+			 <&gcc GCC_SDCC2_APPS_CLK>,
+			 <&xo_board>;
 			 bus-width = <4>;
 		 };