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Commit bcec2919 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'qcom-arm64-fixes-for-6.10' of... 

Merge tag 'qcom-arm64-fixes-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes

Qualcomm Arm64 DeviceTree fixes for v6.10

This marks the PSHOLD node on SC8280XP as reserved, to resolve a
regression where a reset is triggered instead of a clean shutdown. Also
on SC8280XP the touchscreen properties are adjusted to make it properly
described on CRD and make it work on the Lenovo Thinkpad X13s.

Corrects the LLCC definitions on SC8180X and QDU1000 to allow these
drivers and their dependencies to probe.

X1 Elite CRD is given more CMA space, to avoid running out during boot,
as PCIe SMMU is not accessible.  Audio configuration is corrected, on
the same.

SM6115 SDHC is given an IOMMU stream, to avoid access issues.

Lastly the EL2 non-secure physical timer interrupt on SA8775P is
corrected from its previous incorrect value.

* tag 'qcom-arm64-fixes-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  arm64: dts: qcom: qdu1000: Fix LLCC reg property
  arm64: dts: qcom: sm6115: add iommu for sdhc_1
  arm64: dts: qcom: x1e80100-crd: fix DAI used for headset recording
  arm64: dts: qcom: x1e80100-crd: fix WCD audio codec TX port mapping
  arm64: dts: qcom: sc8280xp-crd: use external pull up for touch reset
  arm64: dts: qcom: sc8280xp-x13s: fix touchscreen power on
  arm64: dts: qcom: x1e80100: Fix PCIe 6a reg offsets and add MHI
  arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer
  arm64: dts: qcom: sc8280xp: Set status = "reserved" on PSHOLD
  arm64: dts: qcom: x1e80100-*: Allocate some CMA buffers
  arm64: dts: qcom: sc8180x: Fix LLCC reg property again

Link: https://lore.kernel.org/r/20240702030913.340814-1-andersson@kernel.orgSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 256abd8e af355e79
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Showing with 61 additions and 21 deletions
arch/arm64/boot/dts/qcom/qdu1000.dtsi
View file @ bcec2919
...@@ -1459,9 +1459,23 @@ gem_noc: interconnect@19100000 { ...@@ -1459,9 +1459,23 @@ gem_noc: interconnect@19100000 {
system-cache-controller@19200000 { system-cache-controller@19200000 {
compatible = "qcom,qdu1000-llcc"; compatible = "qcom,qdu1000-llcc";
reg = <0 0x19200000 0 0xd80000>, reg = <0 0x19200000 0 0x80000>,
<0 0x19300000 0 0x80000>,
<0 0x19600000 0 0x80000>,
<0 0x19700000 0 0x80000>,
<0 0x19a00000 0 0x80000>,
<0 0x19b00000 0 0x80000>,
<0 0x19e00000 0 0x80000>,
<0 0x19f00000 0 0x80000>,
<0 0x1a200000 0 0x80000>; <0 0x1a200000 0 0x80000>;
reg-names = "llcc0_base", reg-names = "llcc0_base",
"llcc1_base",
"llcc2_base",
"llcc3_base",
"llcc4_base",
"llcc5_base",
"llcc6_base",
"llcc7_base",
"llcc_broadcast_base"; "llcc_broadcast_base";
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
}; };
......
arch/arm64/boot/dts/qcom/sa8775p.dtsi
View file @ bcec2919
...@@ -3605,7 +3605,7 @@ arch_timer: timer { ...@@ -3605,7 +3605,7 @@ arch_timer: timer {
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
}; };
pcie0: pcie@1c00000 { pcie0: pcie@1c00000 {
......
arch/arm64/boot/dts/qcom/sc8180x.dtsi
View file @ bcec2919
...@@ -2647,11 +2647,14 @@ usb_sec_dpphy: dp-phy@88ef200 { ...@@ -2647,11 +2647,14 @@ usb_sec_dpphy: dp-phy@88ef200 {
system-cache-controller@9200000 { system-cache-controller@9200000 {
compatible = "qcom,sc8180x-llcc"; compatible = "qcom,sc8180x-llcc";
reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>,
<0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>,
<0 0x09600000 0 0x50000>; <0 0x09400000 0 0x58000>, <0 0x09480000 0 0x58000>,
<0 0x09500000 0 0x58000>, <0 0x09580000 0 0x58000>,
<0 0x09600000 0 0x58000>;
reg-names = "llcc0_base", "llcc1_base", "llcc2_base", reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
"llcc3_base", "llcc_broadcast_base"; "llcc3_base", "llcc4_base", "llcc5_base",
"llcc6_base", "llcc7_base", "llcc_broadcast_base";
interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
}; };
......
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
View file @ bcec2919
...@@ -977,8 +977,7 @@ int-n-pins { ...@@ -977,8 +977,7 @@ int-n-pins {
reset-n-pins { reset-n-pins {
pins = "gpio99"; pins = "gpio99";
function = "gpio"; function = "gpio";
output-high; bias-disable;
drive-strength = <16>;
}; };
}; };
......
arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
View file @ bcec2919
...@@ -655,15 +655,16 @@ &i2c4 { ...@@ -655,15 +655,16 @@ &i2c4 {
status = "okay"; status = "okay";
/* FIXME: verify */
touchscreen@10 { touchscreen@10 {
compatible = "hid-over-i2c"; compatible = "elan,ekth5015m", "elan,ekth6915";
reg = <0x10>; reg = <0x10>;
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>; interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vreg_misc_3p3>; reset-gpios = <&tlmm 99 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
vddl-supply = <&vreg_s10b>; no-reset-on-power-off;
vcc33-supply = <&vreg_misc_3p3>;
vccio-supply = <&vreg_misc_3p3>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&ts0_default>; pinctrl-0 = <&ts0_default>;
...@@ -1496,8 +1497,8 @@ int-n-pins { ...@@ -1496,8 +1497,8 @@ int-n-pins {
reset-n-pins { reset-n-pins {
pins = "gpio99"; pins = "gpio99";
function = "gpio"; function = "gpio";
output-high; drive-strength = <2>;
drive-strength = <16>; bias-disable;
}; };
}; };
......
arch/arm64/boot/dts/qcom/sc8280xp.dtsi
View file @ bcec2919
...@@ -4623,6 +4623,8 @@ tsens0: thermal-sensor@c263000 { ...@@ -4623,6 +4623,8 @@ tsens0: thermal-sensor@c263000 {
restart@c264000 { restart@c264000 {
compatible = "qcom,pshold"; compatible = "qcom,pshold";
reg = <0 0x0c264000 0 0x4>; reg = <0 0x0c264000 0 0x4>;
/* TZ seems to block access */
status = "reserved";
}; };
tsens1: thermal-sensor@c265000 { tsens1: thermal-sensor@c265000 {
......
arch/arm64/boot/dts/qcom/sm6115.dtsi
View file @ bcec2919
...@@ -1090,6 +1090,7 @@ sdhc_1: mmc@4744000 { ...@@ -1090,6 +1090,7 @@ sdhc_1: mmc@4744000 {
power-domains = <&rpmpd SM6115_VDDCX>; power-domains = <&rpmpd SM6115_VDDCX>;
operating-points-v2 = <&sdhc1_opp_table>; operating-points-v2 = <&sdhc1_opp_table>;
iommus = <&apps_smmu 0x00c0 0x0>;
interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG
&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>, &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>,
<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
......
arch/arm64/boot/dts/qcom/x1e80100-crd.dts
View file @ bcec2919
...@@ -49,6 +49,15 @@ chosen { ...@@ -49,6 +49,15 @@ chosen {
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
reserved-memory {
linux,cma {
compatible = "shared-dma-pool";
size = <0x0 0x8000000>;
reusable;
linux,cma-default;
};
};
sound { sound {
compatible = "qcom,x1e80100-sndcard"; compatible = "qcom,x1e80100-sndcard";
model = "X1E80100-CRD"; model = "X1E80100-CRD";
...@@ -93,7 +102,7 @@ cpu { ...@@ -93,7 +102,7 @@ cpu {
}; };
codec { codec {
sound-dai = <&wcd938x 1>, <&swr2 0>, <&lpass_txmacro 0>; sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>;
}; };
platform { platform {
...@@ -744,7 +753,7 @@ &swr2 { ...@@ -744,7 +753,7 @@ &swr2 {
wcd_tx: codec@0,3 { wcd_tx: codec@0,3 {
compatible = "sdw20217010d00"; compatible = "sdw20217010d00";
reg = <0 3>; reg = <0 3>;
qcom,tx-port-mapping = <1 1 2 3>; qcom,tx-port-mapping = <2 2 3 4>;
}; };
}; };
......
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
View file @ bcec2919
...@@ -23,6 +23,15 @@ chosen { ...@@ -23,6 +23,15 @@ chosen {
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
reserved-memory {
linux,cma {
compatible = "shared-dma-pool";
size = <0x0 0x8000000>;
reusable;
linux,cma-default;
};
};
vph_pwr: vph-pwr-regulator { vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
......
arch/arm64/boot/dts/qcom/x1e80100.dtsi
View file @ bcec2919
...@@ -2737,15 +2737,17 @@ pcie6a: pci@1bf8000 { ...@@ -2737,15 +2737,17 @@ pcie6a: pci@1bf8000 {
device_type = "pci"; device_type = "pci";
compatible = "qcom,pcie-x1e80100"; compatible = "qcom,pcie-x1e80100";
reg = <0 0x01bf8000 0 0x3000>, reg = <0 0x01bf8000 0 0x3000>,
<0 0x70000000 0 0xf1d>, <0 0x70000000 0 0xf20>,
<0 0x70000f20 0 0xa8>, <0 0x70000f40 0 0xa8>,
<0 0x70001000 0 0x1000>, <0 0x70001000 0 0x1000>,
<0 0x70100000 0 0x100000>; <0 0x70100000 0 0x100000>,
<0 0x01bfb000 0 0x1000>;
reg-names = "parf", reg-names = "parf",
"dbi", "dbi",
"elbi", "elbi",
"atu", "atu",
"config"; "config",
"mhi";
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
ranges = <0x01000000 0 0x00000000 0 0x70200000 0 0x100000>, ranges = <0x01000000 0 0x00000000 0 0x70200000 0 0x100000>,
......
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