Commit c06d780c authored by Steven Cole's avatar Steven Cole Committed by Linus Torvalds

[PATCH] spelling fix for interupt -> interrupt

This patch provides the following spelling fix.

 interupt -> interrupt
parent 2c632ed5
......@@ -97,7 +97,7 @@ s/390 z/Architecture
6 6 Input/Output interrupt Mask
7 7 External interrupt Mask used primarily for interprocessor signalling &
clock interupts.
clock interrupts.
8-11 8-11 PSW Key used for complex memory protection mechanism not used under linux
......@@ -2423,7 +2423,7 @@ chandev
There is a new device layer for channel devices, some
drivers e.g. lcs are registered with this layer.
If the device uses the channel device layer you'll be
able to find what interupts it uses & the current state
able to find what interrupts it uses & the current state
of the device.
See the manpage chandev.8 &type cat /proc/chandev for more info.
......
......@@ -164,7 +164,7 @@ the table are always safe :)
If for some reason you feel the need to call the handle_sysrq function from
within a function called by handle_sysrq, you must be aware that you are in
a lock (you are also in an interupt handler, which means don't sleep!), so
a lock (you are also in an interrupt handler, which means don't sleep!), so
you must call __handle_sysrq_nolock instead.
* I have more questions, who can I ask?
......
......@@ -1904,7 +1904,7 @@ static void _INLINE_ handle_ser_interrupt(struct e100_serial *info)
}
#ifdef SERIAL_DEBUG_INTR
printk("** OK, disabling ser_interupts\n");
printk("** OK, disabling ser_interrupts\n");
#endif
e100_disable_serial_data_irq(info);
......
......@@ -149,7 +149,7 @@ netdev_connect(int irq)
static inline int
netdev_attach(int fd, int irq, unsigned int ipaddr)
{
/* this puts the host interface in the right mode (start interupting) */
/* this puts the host interface in the right mode (start interrupting) */
return ia64_ssc(fd, ipaddr, 0,0, SSC_NETDEV_ATTACH);
}
......
......@@ -305,7 +305,7 @@ xbow_attach(devfs_handle_t conn)
/*
* get the name of this xbow vertex and keep the info.
* This is needed during errors and interupts, but as
* This is needed during errors and interrupts, but as
* long as we have it, we can use it elsewhere.
*/
s = dev_to_name(vhdl, devnm, MAXDEVNAME);
......
......@@ -890,7 +890,7 @@ xwidget_register(xwidget_hwid_t hwid, /* widget's hardware ID */
widget_info->w_einfo = 0;
/*
* get the name of this xwidget vertex and keep the info.
* This is needed during errors and interupts, but as
* This is needed during errors and interrupts, but as
* long as we have it, we can use it elsewhere.
*/
s = dev_to_name(widget,devnm,MAXDEVNAME);
......
......@@ -95,7 +95,7 @@ Lkernel_return:
Luser_return:
/* only allow interrupts when we are really the last one on the*/
/* kernel stack, otherwise stack overflow can occur during*/
/* heavy interupt load*/
/* heavy interrupt load*/
andw #ALLOWINT,%sr
movel %sp,%d1 /* get thread_info pointer */
......
......@@ -90,7 +90,7 @@ void m360_cpm_reset()
while (pquicc->cp_cr & CMD_FLAG);
/* On the recommendation of the 68360 manual, p. 7-60
* - Set sdma interupt service mask to 7
* - Set sdma interrupt service mask to 7
* - Set sdma arbitration ID to 4
*/
pquicc->sdma_sdcr = 0x0740;
......
......@@ -91,7 +91,7 @@ Lkernel_return:
Luser_return:
/* only allow interrupts when we are really the last one on the*/
/* kernel stack, otherwise stack overflow can occur during*/
/* heavy interupt load*/
/* heavy interrupt load*/
andw #ALLOWINT,%sr
movel %sp,%d1 /* get thread_info pointer */
......
......@@ -72,7 +72,7 @@ high_priority:
nop
/*
* Ok, we've got one of over a hundred other interupts.
* Ok, we've got one of over a hundred other interrupts.
*/
low_priority:
lui t0, %hi(IntStatus1)
......
......@@ -447,7 +447,7 @@ void do_cpu_irq_mask(struct pt_regs *regs)
/* 1) only process IRQs that are enabled/unmasked (cpu_eiem)
* 2) We loop here on EIRR contents in order to avoid
* nested interrupts or having to take another interupt
* nested interrupts or having to take another interrupt
* when we could have just handled it right away.
* 3) Limit the number of times we loop to make sure other
* processing can occur.
......
......@@ -337,8 +337,8 @@ label##_common: \
* Start of pSeries system interrupt routines
*/
. = 0x100
.globl __start_interupts
__start_interupts:
.globl __start_interrupts
__start_interrupts:
STD_EXCEPTION_PSERIES( 0x100, SystemReset )
STD_EXCEPTION_PSERIES( 0x200, MachineCheck )
......@@ -367,7 +367,7 @@ __start_interupts:
. = 0x4000
.globl __end_interrupts
.globl __start_naca
__end_interupts:
__end_interrupts:
__start_naca:
#ifdef CONFIG_PPC_ISERIES
.llong itVpdAreas
......
......@@ -757,8 +757,8 @@ io_int_handler:
la %r2,SP_PTREGS(%r15) # address of register-save area
sr %r3,%r3
icm %r3,3,__LC_SUBCHANNEL_NR # load subchannel nr & extend to int
l %r4,__LC_IO_INT_PARM # load interuption parm
l %r5,__LC_IO_INT_WORD # load interuption word
l %r4,__LC_IO_INT_PARM # load interruption parm
l %r5,__LC_IO_INT_WORD # load interruption word
basr %r14,%r1 # branch to standard irq handler
io_return:
......
......@@ -781,8 +781,8 @@ io_int_handler:
GET_THREAD_INFO # load pointer to task_struct to R9
la %r2,SP_PTREGS(%r15) # address of register-save area
llgh %r3,__LC_SUBCHANNEL_NR # load subchannel number
llgf %r4,__LC_IO_INT_PARM # load interuption parm
llgf %r5,__LC_IO_INT_WORD # load interuption word
llgf %r4,__LC_IO_INT_PARM # load interruption parm
llgf %r5,__LC_IO_INT_WORD # load interruption word
brasl %r14,do_IRQ # call standard irq handler
io_return:
......
......@@ -52,7 +52,7 @@ void __init multi_init (void)
register unsigned long jr_fixup = (char *)&_intv_start - (char *)dst;
register long *ii;
/* Copy interupt vectors as instructed by multi_intv_install_table. */
/* Copy interrupt vectors as instructed by multi_intv_install_table. */
for (ii = multi_intv_install_table; *ii >= 0; ii++) {
/* Copy 16-byte interrupt vector at offset *ii. */
int boffs;
......
......@@ -400,7 +400,7 @@ typedef struct _i2eBordStr
rwlock_t read_fifo_spinlock;
rwlock_t write_fifo_spinlock;
// For queuing interupt bottom half handlers. /\/\|=mhw=|\/\/
// For queuing interrupt bottom half handlers. /\/\|=mhw=|\/\/
struct work_struct tqueue_interrupt;
struct timer_list SendPendingTimer; // Used by iiSendPending
......
......@@ -128,7 +128,7 @@ struct kcs_info
/* The driver will disable interrupts when it gets into a
situation where it cannot handle messages due to lack of
memory. Once that situation clears up, it will re-enable
interupts. */
interrupts. */
int interrupt_disabled;
};
......
......@@ -698,7 +698,7 @@ int dsp3780I_GetIPCSource(unsigned short usDspBaseIO,
usDspBaseIO, pusIPCSource);
/*
* Disable DSP to PC interrupts, read the interupt register,
* Disable DSP to PC interrupts, read the interrupt register,
* clear the pending IPC bits, and reenable DSP to PC interrupts
*/
spin_lock_irqsave(&dsp_lock, flags);
......
......@@ -257,7 +257,7 @@ static int i8042_open(struct serio *port)
/*
* i8042_close() frees the interrupt, so that it can possibly be used
* by another driver. We never know - if the user doesn't have a mouse,
* the BIOS could have used the AUX interupt for PCI.
* the BIOS could have used the AUX interrupt for PCI.
*/
static void i8042_close(struct serio *port)
......
......@@ -110,7 +110,7 @@ extern char * __init prom_getcmdline(void);
/*
* Base address and interupt of the Au1xxx ethernet macs
* Base address and interrupt of the Au1xxx ethernet macs
*/
static struct {
unsigned int port;
......
......@@ -2608,7 +2608,7 @@ static int natsemi_suspend (struct pci_dev *pdev, u32 state)
if (wol) {
/* restart the NIC in WOL mode.
* The nic must be stopped for this.
* FIXME: use the WOL interupt
* FIXME: use the WOL interrupt
*/
enable_wol_mode(dev, 0);
} else {
......
......@@ -1227,7 +1227,7 @@ tc35815_rx(struct net_device *dev)
lp->rfd_cur = next_rfd;
}
/* re-enable BL/FDA Exhaust interupts. */
/* re-enable BL/FDA Exhaust interrupts. */
if (fd_free_count) {
tc_writel(tc_readl(&tr->Int_En) | Int_FDAExEn, &tr->Int_En);
if (buf_free_count)
......
......@@ -501,7 +501,7 @@ void tulip_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
dev->name, csr5);
#ifdef CONFIG_NET_HW_FLOWCONTROL
if (tp->fc_bit && (test_bit(tp->fc_bit, &netdev_fc_xoff)))
if (net_ratelimit()) printk("BUG!! enabling interupt when FC off (timerintr.) \n");
if (net_ratelimit()) printk("BUG!! enabling interrupt when FC off (timerintr.) \n");
#endif
outl(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
tp->ttimer = 0;
......
......@@ -289,7 +289,7 @@
* which are used as the dev->open, dev->stop, priv->reset
* callbacks if none are specified when alloc_orinocodev() is
* called.
* o Removed orinoco_plx_interupt() and orinoco_pci_interrupt().
* o Removed orinoco_plx_interrupt() and orinoco_pci_interrupt().
* They didn't do anything.
*
* v0.12 -> v0.12a - 4 Jul 2002 - David Gibson
......
......@@ -403,7 +403,7 @@ dino_isr(int irq, void *intr_dev, struct pt_regs *regs)
/*
* Perform a binary search on set bits.
* `Less than Fatal' and PS2 interupts aren't supported.
* `Less than Fatal' and PS2 interrupts aren't supported.
*/
if (mask & 0xf) {
if (mask & 0x3) {
......
......@@ -404,7 +404,7 @@ struct target_status {
* Initiator mode SCB shared data area.
* If the embedded CDB is 12 bytes or less, we embed
* the sense buffer address in the SCB. This allows
* us to retrieve sense information without interupting
* us to retrieve sense information without interrupting
* the host in packetized mode.
*/
typedef uint32_t sense_addr_t;
......
......@@ -740,7 +740,7 @@ ahd_pci_intr(struct ahd_softc *ahd)
if (i == 5)
continue;
pci_status[i] = ahd_inb(ahd, reg);
/* Clear latched errors. So our interupt deasserts. */
/* Clear latched errors. So our interrupt deasserts. */
ahd_outb(ahd, reg, pci_status[i]);
}
......@@ -796,14 +796,14 @@ ahd_pci_split_intr(struct ahd_softc *ahd, u_int intstat)
split_status[i] = ahd_inb(ahd, DCHSPLTSTAT0);
split_status1[i] = ahd_inb(ahd, DCHSPLTSTAT1);
/* Clear latched errors. So our interupt deasserts. */
/* Clear latched errors. So our interrupt deasserts. */
ahd_outb(ahd, DCHSPLTSTAT0, split_status[i]);
ahd_outb(ahd, DCHSPLTSTAT1, split_status1[i]);
if (i != 0)
continue;
sg_split_status[i] = ahd_inb(ahd, SGSPLTSTAT0);
sg_split_status1[i] = ahd_inb(ahd, SGSPLTSTAT1);
/* Clear latched errors. So our interupt deasserts. */
/* Clear latched errors. So our interrupt deasserts. */
ahd_outb(ahd, SGSPLTSTAT0, sg_split_status[i]);
ahd_outb(ahd, SGSPLTSTAT1, sg_split_status1[i]);
}
......
......@@ -2389,7 +2389,7 @@ static USHORT GetRegs (struct Scsi_Host *pshost, BOOL bigd, struct pci_dev *pcid
padapter->regRemap = zr + RTR_LOCAL_REMAP; // 32 bit local space remap
padapter->regDesc = zr + RTR_REGIONS; // 32 bit local region descriptor
padapter->regRange = zr + RTR_LOCAL_RANGE; // 32 bit local range
padapter->regIrqControl = zr + RTR_INT_CONTROL_STATUS; // 16 bit interupt control and status
padapter->regIrqControl = zr + RTR_INT_CONTROL_STATUS; // 16 bit interrupt control and status
padapter->regScratchPad = zr + RTR_MAILBOX; // 16 byte scratchpad I/O base address
padapter->regBase = zl;
......
......@@ -222,7 +222,7 @@ union IO7_POx_WBASE {
/*
* IO7 IID (Interrupt IDentifier) format
*
* For level-sensative interupts, int_num is encoded as:
* For level-sensative interrupts, int_num is encoded as:
*
* bus/port slot/device INTx
* <7:5> <4:2> <1:0>
......
......@@ -93,7 +93,7 @@
#define ALEC 0x00000000
#define DISFC 0x00000000
#define PADS 0x00000000
#define RET_LIM 0x000f /* retry 15 times to send a frame before interupt */
#define RET_LIM 0x000f /* retry 15 times to send a frame before interrupt */
#define ETH_MFLR 0x05ee /* 1518 max frame size */
#define MINFLR 0x0040 /* Minimum frame size 64 */
#define MAXD1 0x05ee /* Max dma count 1518 */
......
......@@ -99,7 +99,7 @@
** Monarch Processor */
#define PDC_PAT_HPMC_RENDEZ_CPU 0L /* go into spin loop */
#define PDC_PAT_HPMC_SET_PARAMS 1L /* Allows OS to specify intr which PDC
* will use to interupt OS during machine
* will use to interrupt OS during machine
* check rendezvous */
/* parameters for PDC_PAT_HPMC_SET_PARAMS: */
......
......@@ -204,7 +204,7 @@ inline static void snd_uart16550_buffer_output(snd_uart16550_t *uart)
/* This loop should be called with interrupts disabled
* We don't want to interrupt this,
* as we're already handling an interupt
* as we're already handling an interrupt
*/
static void snd_uart16550_io_loop(snd_uart16550_t * uart)
{
......@@ -274,16 +274,16 @@ static void snd_uart16550_io_loop(snd_uart16550_t * uart)
* ---------------------------
* After receiving a interrupt, it is important to indicate to the UART that
* this has been done.
* For a Rx interupt, this is done by reading the received byte.
* For a Tx interupt this is done by either:
* For a Rx interrupt, this is done by reading the received byte.
* For a Tx interrupt this is done by either:
* a) Writing a byte
* b) Reading the IIR
* It is particularly important to read the IIR if a Tx interupt is received
* It is particularly important to read the IIR if a Tx interrupt is received
* when there is no data in tx_buff[], as in this case there no other
* indication that the interupt has been serviced, and it remains outstanding
* indefinitely. This has the curious side effect that and no further interupts
* indication that the interrupt has been serviced, and it remains outstanding
* indefinitely. This has the curious side effect that and no further interrupts
* will be generated from this device AT ALL!!.
* It is also desirable to clear outstanding interupts when the device is
* It is also desirable to clear outstanding interrupts when the device is
* opened/closed.
*
*
......@@ -300,7 +300,7 @@ static void snd_uart16550_interrupt(int irq, void *dev_id, struct pt_regs *regs)
spin_unlock(&uart->open_lock);
return;
}
inb(uart->base + UART_IIR); /* indicate to the UART that the interupt has been serviced */
inb(uart->base + UART_IIR); /* indicate to the UART that the interrupt has been serviced */
snd_uart16550_io_loop(uart);
spin_unlock(&uart->open_lock);
}
......@@ -378,7 +378,7 @@ static void snd_uart16550_do_open(snd_uart16550_t * uart)
| UART_FCR_CLEAR_RCVR /* Clear receiver FIFO */
| UART_FCR_CLEAR_XMIT /* Clear transmitter FIFO */
| UART_FCR_TRIGGER_4 /* Set FIFO trigger at 4-bytes */
/* NOTE: interupt generated after T=(time)4-bytes
/* NOTE: interrupt generated after T=(time)4-bytes
* if less than UART_FCR_TRIGGER bytes received
*/
,uart->base + UART_FCR); /* FIFO Control Register */
......@@ -430,8 +430,8 @@ static void snd_uart16550_do_open(snd_uart16550_t * uart)
}
if (uart->irq < 0) {
byte = (0 & UART_IER_RDI) /* Disable Receiver data interupt */
|(0 & UART_IER_THRI) /* Disable Transmitter holding register empty interupt */
byte = (0 & UART_IER_RDI) /* Disable Receiver data interrupt */
|(0 & UART_IER_THRI) /* Disable Transmitter holding register empty interrupt */
;
} else if (uart->adaptor == SNDRV_SERIAL_MS124W_SA) {
byte = UART_IER_RDI /* Enable Receiver data interrupt */
......@@ -440,11 +440,11 @@ static void snd_uart16550_do_open(snd_uart16550_t * uart)
} else if (uart->adaptor == SNDRV_SERIAL_GENERIC) {
byte = UART_IER_RDI /* Enable Receiver data interrupt */
| UART_IER_MSI /* Enable Modem status interrupt */
| UART_IER_THRI /* Enable Transmitter holding register empty interupt */
| UART_IER_THRI /* Enable Transmitter holding register empty interrupt */
;
} else {
byte = UART_IER_RDI /* Enable Receiver data interupt */
| UART_IER_THRI /* Enable Transmitter holding register empty interupt */
byte = UART_IER_RDI /* Enable Receiver data interrupt */
| UART_IER_THRI /* Enable Transmitter holding register empty interrupt */
;
}
outb(byte, uart->base + UART_IER); /* Interupt enable Register */
......@@ -463,8 +463,8 @@ static void snd_uart16550_do_close(snd_uart16550_t * uart)
* For now, the consequences are harmless.
*/
outb((0 & UART_IER_RDI) /* Disable Receiver data interupt */
|(0 & UART_IER_THRI) /* Disable Transmitter holding register empty interupt */
outb((0 & UART_IER_RDI) /* Disable Receiver data interrupt */
|(0 & UART_IER_THRI) /* Disable Transmitter holding register empty interrupt */
,uart->base + UART_IER); /* Interupt enable Register */
switch (uart->adaptor) {
......@@ -489,7 +489,7 @@ static void snd_uart16550_do_close(snd_uart16550_t * uart)
break;
}
inb(uart->base + UART_IIR); /* Clear any outstanding interupts */
inb(uart->base + UART_IIR); /* Clear any outstanding interrupts */
/* Restore old divisor */
if (uart->divisor != 0) {
......
......@@ -604,7 +604,7 @@ static int rme96xx_startcard(rme96xx_info *s,int stop)
return 1;
}
}
COMM ("interupt disabled");
COMM ("interrupt disabled");
/* first initialize all pointers on card */
for(i=0;i<RME96xx_num_of_init_regs;i++){
writel(0,s->iobase + i);
......
......@@ -370,7 +370,7 @@ static void snd_als4000_interrupt(int irq, void *dev_id, struct pt_regs *regs)
snd_pcm_period_elapsed(chip->playback_substream);
if ((gcr_status & 0x40) && (chip->capture_substream)) /* capturing */
snd_pcm_period_elapsed(chip->capture_substream);
if ((gcr_status & 0x10) && (chip->rmidi)) /* MPU401 interupt */
if ((gcr_status & 0x10) && (chip->rmidi)) /* MPU401 interrupt */
snd_mpu401_uart_interrupt(irq, chip->rmidi, regs);
/* release the gcr */
outb(gcr_status, chip->alt_port + 0xe);
......
......@@ -87,7 +87,7 @@ MODULE_PARM_SYNTAX(dual_codec, SNDRV_ENABLED ",allows:{{0,3}}");
#define BA0_HISR_MIDI (1<<22) /* MIDI port interrupt */
#define BA0_HISR_FIFOI (1<<20) /* FIFO polled interrupt */
#define BA0_HISR_DMAI (1<<18) /* DMA interrupt (half or end) */
#define BA0_HISR_FIFO(c) (1<<(12+(c))) /* FIFO channel interupt */
#define BA0_HISR_FIFO(c) (1<<(12+(c))) /* FIFO channel interrupt */
#define BA0_HISR_DMA(c) (1<<(8+(c))) /* DMA channel interrupt */
#define BA0_HISR_GPPI (1<<5) /* General Purpose Input (Primary chip) */
#define BA0_HISR_GPSI (1<<4) /* General Purpose Input (Secondary chip) */
......
......@@ -1132,7 +1132,7 @@ static void snd_es1968_playback_setup(es1968_t *chip, esschan_t *es,
}
spin_lock_irqsave(&chip->reg_lock, flags);
/* clear WP interupts */
/* clear WP interrupts */
outw(1, chip->io_port + 0x04);
/* enable WP ints */
outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ);
......@@ -1263,7 +1263,7 @@ static void snd_es1968_capture_setup(es1968_t *chip, esschan_t *es,
}
spin_lock_irqsave(&chip->reg_lock, flags);
/* clear WP interupts */
/* clear WP interrupts */
outw(1, chip->io_port + 0x04);
/* enable WP ints */
outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ);
......@@ -1828,7 +1828,7 @@ static void __devinit es1968_measure_clock(es1968_t *chip)
apu_set_register(chip, apu, 10, 0x8F08);
apu_set_register(chip, apu, 11, 0x0000);
spin_lock_irqsave(&chip->reg_lock, flags);
outw(1, chip->io_port + 0x04); /* clear WP interupts */
outw(1, chip->io_port + 0x04); /* clear WP interrupts */
outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ); /* enable WP ints */
spin_unlock_irqrestore(&chip->reg_lock, flags);
......
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