Commit c13e3021 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'gpio-fixes-for-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio fixes from Bartosz Golaszewski:

 - fix wake-up interrupt support on gpio-mxc

 - zero the padding bytes in a structure passed to user-space in the
   GPIO character device

 - require HAS_IOPORT_MAP in two drivers that need it to fix a Kbuild
   issue

* tag 'gpio-fixes-for-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux:
  gpio: AMD8111 and TQMX86 require HAS_IOPORT_MAP
  gpiolib: cdev: zero padding during conversion to gpioline_info_changed
  gpio: mxc: Fix disabled interrupt wake-up support
parents e41fc7c8 c6414e1a
...@@ -1383,6 +1383,7 @@ config GPIO_TPS68470 ...@@ -1383,6 +1383,7 @@ config GPIO_TPS68470
config GPIO_TQMX86 config GPIO_TQMX86
tristate "TQ-Systems QTMX86 GPIO" tristate "TQ-Systems QTMX86 GPIO"
depends on MFD_TQMX86 || COMPILE_TEST depends on MFD_TQMX86 || COMPILE_TEST
depends on HAS_IOPORT_MAP
select GPIOLIB_IRQCHIP select GPIOLIB_IRQCHIP
help help
This driver supports GPIO on the TQMX86 IO controller. This driver supports GPIO on the TQMX86 IO controller.
...@@ -1450,6 +1451,7 @@ menu "PCI GPIO expanders" ...@@ -1450,6 +1451,7 @@ menu "PCI GPIO expanders"
config GPIO_AMD8111 config GPIO_AMD8111
tristate "AMD 8111 GPIO driver" tristate "AMD 8111 GPIO driver"
depends on X86 || COMPILE_TEST depends on X86 || COMPILE_TEST
depends on HAS_IOPORT_MAP
help help
The AMD 8111 south bridge contains 32 GPIO pins which can be used. The AMD 8111 south bridge contains 32 GPIO pins which can be used.
......
...@@ -334,7 +334,7 @@ static int mxc_gpio_init_gc(struct mxc_gpio_port *port, int irq_base) ...@@ -334,7 +334,7 @@ static int mxc_gpio_init_gc(struct mxc_gpio_port *port, int irq_base)
ct->chip.irq_unmask = irq_gc_mask_set_bit; ct->chip.irq_unmask = irq_gc_mask_set_bit;
ct->chip.irq_set_type = gpio_set_irq_type; ct->chip.irq_set_type = gpio_set_irq_type;
ct->chip.irq_set_wake = gpio_set_wake_irq; ct->chip.irq_set_wake = gpio_set_wake_irq;
ct->chip.flags = IRQCHIP_MASK_ON_SUSPEND; ct->chip.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND;
ct->regs.ack = GPIO_ISR; ct->regs.ack = GPIO_ISR;
ct->regs.mask = GPIO_IMR; ct->regs.mask = GPIO_IMR;
......
...@@ -1880,6 +1880,7 @@ static void gpio_v2_line_info_changed_to_v1( ...@@ -1880,6 +1880,7 @@ static void gpio_v2_line_info_changed_to_v1(
struct gpio_v2_line_info_changed *lic_v2, struct gpio_v2_line_info_changed *lic_v2,
struct gpioline_info_changed *lic_v1) struct gpioline_info_changed *lic_v1)
{ {
memset(lic_v1, 0, sizeof(*lic_v1));
gpio_v2_line_info_to_v1(&lic_v2->info, &lic_v1->info); gpio_v2_line_info_to_v1(&lic_v2->info, &lic_v1->info);
lic_v1->timestamp = lic_v2->timestamp_ns; lic_v1->timestamp = lic_v2->timestamp_ns;
lic_v1->event_type = lic_v2->event_type; lic_v1->event_type = lic_v2->event_type;
......
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