drm/i915: Convert the power well descriptor domain mask to an array of domains

The next patch converts the i915_power_well_desc::domain mask from a u64
mask to a bitmap. I didn't find a reasonably simple way to initialize
bitmaps statically, so prepare for the next patch here by converting the
masks to an array of domain enums and initing the masks from these
arrays during module loading.

v2: Clarify list vs. array in the commit message. (Jani)

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220414210657.1785773-8-imre.deak@intel.com

drivers/gpu/drm/i915/display/intel_display_power.c

@@ -24,11 +24,11 @@
 
 #define for_each_power_domain_well(__dev_priv, __power_well, __domain_mask)	\
 	for_each_power_well(__dev_priv, __power_well)				\
-		for_each_if((__power_well)->desc->domains & (__domain_mask))
+		for_each_if((__power_well)->domains & (__domain_mask))
 
 #define for_each_power_domain_well_reverse(__dev_priv, __power_well, __domain_mask) \
 	for_each_power_well_reverse(__dev_priv, __power_well)		        \
-		for_each_if((__power_well)->desc->domains & (__domain_mask))
+		for_each_if((__power_well)->domains & (__domain_mask))
 
 const char *
 intel_display_power_domain_str(enum intel_display_power_domain domain)

drivers/gpu/drm/i915/display/intel_display_power_well.c

@@ -156,7 +156,7 @@ const char *intel_power_well_name(struct i915_power_well *power_well)
 
 u64 intel_power_well_domains(struct i915_power_well *power_well)
 {
-	return power_well->desc->domains;
+	return power_well->domains;
 }
 
 int intel_power_well_refcount(struct i915_power_well *power_well)

drivers/gpu/drm/i915/display/intel_display_power_well.h

@@ -50,7 +50,10 @@ enum i915_power_well_id {
 
 struct i915_power_well_desc {
 	const char *name;
-	u64 domains;
+	const struct i915_power_domain_list {
+		const enum intel_display_power_domain *list;
+		u8 count;
+	} *domain_list;
 	/* Mask of pipes whose IRQ logic is backed by the pw */
 	u16 irq_pipe_mask:4;
 	u16 always_on:1;
@@ -99,6 +102,7 @@ struct i915_power_well_desc {
 
 struct i915_power_well {
 	const struct i915_power_well_desc *desc;
+	u64 domains;
 	/* power well enable/disable usage count */
 	int count;
 	/* cached hw enabled state */