Commit c535fe66 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski

dt-bindings: pinctrl: qcom,sdx65: fix matching pin config

The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'.  Otherwise the subnodes
(level one and two) are not properly matched.  This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
Reviewed-by: default avatarBjorn Andersson <andersson@kernel.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-32-krzysztof.kozlowski@linaro.orgSigned-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent 4e0434d4
...@@ -49,8 +49,10 @@ patternProperties: ...@@ -49,8 +49,10 @@ patternProperties:
oneOf: oneOf:
- $ref: "#/$defs/qcom-sdx65-tlmm-state" - $ref: "#/$defs/qcom-sdx65-tlmm-state"
- patternProperties: - patternProperties:
".*": "-pins$":
$ref: "#/$defs/qcom-sdx65-tlmm-state" $ref: "#/$defs/qcom-sdx65-tlmm-state"
additionalProperties: false
'$defs': '$defs':
qcom-sdx65-tlmm-state: qcom-sdx65-tlmm-state:
type: object type: object
...@@ -175,13 +177,13 @@ examples: ...@@ -175,13 +177,13 @@ examples:
}; };
uart-w-subnodes-state { uart-w-subnodes-state {
rx { rx-pins {
pins = "gpio4"; pins = "gpio4";
function = "blsp_uart1"; function = "blsp_uart1";
bias-pull-up; bias-pull-up;
}; };
tx { tx-pins {
pins = "gpio5"; pins = "gpio5";
function = "blsp_uart1"; function = "blsp_uart1";
bias-disable; bias-disable;
......
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