clk: meson: s4: fix pwm_j_div parent clock

Update peripherals pwm_j_div's parent clock to pwm_j_mux

Fixes: 57b55c76 ("clk: meson: S4: add support for Amlogic S4 SoC peripheral clock controller")
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/r/20240516071612.2978201-1-xianwei.zhao@amlogic.comSigned-off-by: Jerome Brunet <jbrunet@baylibre.com>

drivers/clk/meson/s4-peripherals.c

@@ -2978,7 +2978,7 @@ static struct clk_regmap s4_pwm_j_div = {
 		.name = "pwm_j_div",
 		.ops = &clk_regmap_divider_ops,
 		.parent_hws = (const struct clk_hw *[]) {
-			&s4_pwm_h_mux.hw
+			&s4_pwm_j_mux.hw
 		},
 		.num_parents = 1,
 		.flags = CLK_SET_RATE_PARENT,