x86/cpufeature: Move some of the scattered feature bits to x86_capability

CVE-2018-3639 (x86)

Turn the CPUID leafs which are proper CPUID feature bit leafs into
separate ->x86_capability words.
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/1449481182-27541-2-git-send-email-bp@alien8.deSigned-off-by: Thomas Gleixner <tglx@linutronix.de>

(backported from commit 2ccd71f1)
[juergh: This is a partial backport to clean up some inconsistencies
 introduced by past merges/updates.]
Signed-off-by: Juerg Haefliger <juergh@canonical.com>

arch/x86/include/asm/cpufeatures.h

@@ -207,7 +207,6 @@
 #define X86_FEATURE_FLEXPRIORITY ( 8*32+ 2) /* Intel FlexPriority */
 #define X86_FEATURE_EPT         ( 8*32+ 3) /* Intel Extended Page Table */
 #define X86_FEATURE_VPID        ( 8*32+ 4) /* Intel Virtual Processor ID */
-
 #define X86_FEATURE_VMMCALL     ( 8*32+15) /* Prefer vmmcall to vmcall */
 #define X86_FEATURE_XENPV       ( 8*32+16) /* "" Xen paravirtual guest */
 

arch/x86/kernel/cpu/common.c

@@ -695,6 +695,8 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
 		cpuid_count(0x00000007, 0, &eax, &ebx, &ecx, &edx);
 
 		c->x86_capability[9] = ebx;
+
+		c->x86_capability[14] = cpuid_eax(0x00000006);
 	}
 
 	/* Extended state features: level 0x0000000d */
@@ -759,6 +761,9 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
 	if (c->extended_cpuid_level >= 0x80000007)
 		c->x86_power = cpuid_edx(0x80000007);
 
+	if (c->extended_cpuid_level >= 0x8000000a)
+		c->x86_capability[15] = cpuid_edx(0x8000000a);
+
 	init_scattered_cpuid_features(c);
 }
 

arch/x86/kernel/cpu/scattered.c

@@ -26,33 +26,13 @@ enum cpuid_regs {
 
 /* Please keep the leaf sorted by cpuid_bit.level for faster search. */
 static const struct cpuid_bit cpuid_bits[] = {
-	{ X86_FEATURE_DTHERM,		CR_EAX, 0, 0x00000006, 0 },
+	{ X86_FEATURE_INTEL_PT,		CR_EBX,25, 0x00000007, 0 },
 	{ X86_FEATURE_APERFMPERF,	CR_ECX, 0, 0x00000006, 0 },
-	{ X86_FEATURE_IDA,		CR_EAX, 1, 0x00000006, 0 },
-	{ X86_FEATURE_ARAT,		CR_EAX, 2, 0x00000006, 0 },
 	{ X86_FEATURE_EPB,		CR_ECX, 3, 0x00000006, 0 },
-	{ X86_FEATURE_PLN,		CR_EAX, 4, 0x00000006, 0 },
-	{ X86_FEATURE_PTS,		CR_EAX, 6, 0x00000006, 0 },
-	{ X86_FEATURE_HWP,		CR_EAX, 7, 0x00000006, 0 },
-	{ X86_FEATURE_HWP_NOTIFY,	CR_EAX, 8, 0x00000006, 0 },
-	{ X86_FEATURE_HWP_ACT_WINDOW,	CR_EAX, 9, 0x00000006, 0 },
-	{ X86_FEATURE_HWP_EPP,		CR_EAX,10, 0x00000006, 0 },
-	{ X86_FEATURE_HWP_PKG_REQ,	CR_EAX,11, 0x00000006, 0 },
-	{ X86_FEATURE_INTEL_PT,		CR_EBX,25, 0x00000007, 0 },
 	{ X86_FEATURE_SPEC_CTRL,	CR_EDX,26, 0x00000007, 0 },
 	{ X86_FEATURE_HW_PSTATE,	CR_EDX, 7, 0x80000007, 0 },
 	{ X86_FEATURE_CPB,		CR_EDX, 9, 0x80000007, 0 },
 	{ X86_FEATURE_PROC_FEEDBACK,	CR_EDX,11, 0x80000007, 0 },
-	{ X86_FEATURE_NPT,		CR_EDX, 0, 0x8000000a, 0 },
-	{ X86_FEATURE_LBRV,		CR_EDX, 1, 0x8000000a, 0 },
-	{ X86_FEATURE_SVML,		CR_EDX, 2, 0x8000000a, 0 },
-	{ X86_FEATURE_NRIPS,		CR_EDX, 3, 0x8000000a, 0 },
-	{ X86_FEATURE_TSCRATEMSR,	CR_EDX, 4, 0x8000000a, 0 },
-	{ X86_FEATURE_VMCBCLEAN,	CR_EDX, 5, 0x8000000a, 0 },
-	{ X86_FEATURE_FLUSHBYASID,	CR_EDX, 6, 0x8000000a, 0 },
-	{ X86_FEATURE_DECODEASSISTS,	CR_EDX, 7, 0x8000000a, 0 },
-	{ X86_FEATURE_PAUSEFILTER,	CR_EDX,10, 0x8000000a, 0 },
-	{ X86_FEATURE_PFTHRESHOLD,	CR_EDX,12, 0x8000000a, 0 },
 	{ 0, 0, 0, 0, 0 }
 };