Commit c61cfb94 authored by Alex Elder's avatar Alex Elder Committed by David S. Miller

net: ipa: don't index mem data array by ID

Finally the code handles the IPA memory region array in the
configuration data without assuming it is indexed by region ID.
Get rid of the array index designators where these arrays are
initialized.  As a result, there's no more need to define an
explicitly undefined memory region ID, so get rid of that.

Change ipa_mem_find() so it no longer assumes the ipa->mem[] array
is indexed by memory region ID.  Instead, have it search the array
for the entry having the requested memory ID, and return the address
of the descriptor if found.  Otherwise return NULL.

Stop allowing memory regions to be defined with zero size and zero
canary value.  Check for this condition in ipa_mem_valid_one().
As a result, it is not necessary to check for this case in
ipa_mem_config().

Finally, there is no need for IPA_MEM_UNDEFINED to be defined any
more, so get rid of it.
Signed-off-by: default avatarAlex Elder <elder@linaro.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 5e3bc1e5
......@@ -271,91 +271,91 @@ static const struct ipa_resource_data ipa_resource_data = {
/* IPA-resident memory region data for an SoC having IPA v3.5.1 */
static const struct ipa_mem ipa_mem_local_data[] = {
[IPA_MEM_UC_SHARED] = {
{
.id = IPA_MEM_UC_SHARED,
.offset = 0x0000,
.size = 0x0080,
.canary_count = 0,
},
[IPA_MEM_UC_INFO] = {
{
.id = IPA_MEM_UC_INFO,
.offset = 0x0080,
.size = 0x0200,
.canary_count = 0,
},
[IPA_MEM_V4_FILTER_HASHED] = {
{
.id = IPA_MEM_V4_FILTER_HASHED,
.offset = 0x0288,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V4_FILTER] = {
{
.id = IPA_MEM_V4_FILTER,
.offset = 0x0308,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_FILTER_HASHED] = {
{
.id = IPA_MEM_V6_FILTER_HASHED,
.offset = 0x0388,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_FILTER] = {
{
.id = IPA_MEM_V6_FILTER,
.offset = 0x0408,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V4_ROUTE_HASHED] = {
{
.id = IPA_MEM_V4_ROUTE_HASHED,
.offset = 0x0488,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V4_ROUTE] = {
{
.id = IPA_MEM_V4_ROUTE,
.offset = 0x0508,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_ROUTE_HASHED] = {
{
.id = IPA_MEM_V6_ROUTE_HASHED,
.offset = 0x0588,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_ROUTE] = {
{
.id = IPA_MEM_V6_ROUTE,
.offset = 0x0608,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_MODEM_HEADER] = {
{
.id = IPA_MEM_MODEM_HEADER,
.offset = 0x0688,
.size = 0x0140,
.canary_count = 2,
},
[IPA_MEM_MODEM_PROC_CTX] = {
{
.id = IPA_MEM_MODEM_PROC_CTX,
.offset = 0x07d0,
.size = 0x0200,
.canary_count = 2,
},
[IPA_MEM_AP_PROC_CTX] = {
{
.id = IPA_MEM_AP_PROC_CTX,
.offset = 0x09d0,
.size = 0x0200,
.canary_count = 0,
},
[IPA_MEM_MODEM] = {
{
.id = IPA_MEM_MODEM,
.offset = 0x0bd8,
.size = 0x1024,
.canary_count = 0,
},
[IPA_MEM_UC_EVENT_RING] = {
{
.id = IPA_MEM_UC_EVENT_RING,
.offset = 0x1c00,
.size = 0x0400,
......
......@@ -220,133 +220,133 @@ static const struct ipa_resource_data ipa_resource_data = {
/* IPA-resident memory region data for an SoC having IPA v4.11 */
static const struct ipa_mem ipa_mem_local_data[] = {
[IPA_MEM_UC_SHARED] = {
{
.id = IPA_MEM_UC_SHARED,
.offset = 0x0000,
.size = 0x0080,
.canary_count = 0,
},
[IPA_MEM_UC_INFO] = {
{
.id = IPA_MEM_UC_INFO,
.offset = 0x0080,
.size = 0x0200,
.canary_count = 0,
},
[IPA_MEM_V4_FILTER_HASHED] = {
{
.id = IPA_MEM_V4_FILTER_HASHED,
.offset = 0x0288,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V4_FILTER] = {
{
.id = IPA_MEM_V4_FILTER,
.offset = 0x0308,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_FILTER_HASHED] = {
{
.id = IPA_MEM_V6_FILTER_HASHED,
.offset = 0x0388,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_FILTER] = {
{
.id = IPA_MEM_V6_FILTER,
.offset = 0x0408,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V4_ROUTE_HASHED] = {
{
.id = IPA_MEM_V4_ROUTE_HASHED,
.offset = 0x0488,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V4_ROUTE] = {
{
.id = IPA_MEM_V4_ROUTE,
.offset = 0x0508,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_ROUTE_HASHED] = {
{
.id = IPA_MEM_V6_ROUTE_HASHED,
.offset = 0x0588,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_ROUTE] = {
{
.id = IPA_MEM_V6_ROUTE,
.offset = 0x0608,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_MODEM_HEADER] = {
{
.id = IPA_MEM_MODEM_HEADER,
.offset = 0x0688,
.size = 0x0240,
.canary_count = 2,
},
[IPA_MEM_AP_HEADER] = {
{
.id = IPA_MEM_AP_HEADER,
.offset = 0x08c8,
.size = 0x0200,
.canary_count = 0,
},
[IPA_MEM_MODEM_PROC_CTX] = {
{
.id = IPA_MEM_MODEM_PROC_CTX,
.offset = 0x0ad0,
.size = 0x0200,
.canary_count = 2,
},
[IPA_MEM_AP_PROC_CTX] = {
{
.id = IPA_MEM_AP_PROC_CTX,
.offset = 0x0cd0,
.size = 0x0200,
.canary_count = 0,
},
[IPA_MEM_NAT_TABLE] = {
{
.id = IPA_MEM_NAT_TABLE,
.offset = 0x0ee0,
.size = 0x0d00,
.canary_count = 4,
},
[IPA_MEM_PDN_CONFIG] = {
{
.id = IPA_MEM_PDN_CONFIG,
.offset = 0x1be8,
.size = 0x0050,
.canary_count = 0,
},
[IPA_MEM_STATS_QUOTA_MODEM] = {
{
.id = IPA_MEM_STATS_QUOTA_MODEM,
.offset = 0x1c40,
.size = 0x0030,
.canary_count = 4,
},
[IPA_MEM_STATS_QUOTA_AP] = {
{
.id = IPA_MEM_STATS_QUOTA_AP,
.offset = 0x1c70,
.size = 0x0048,
.canary_count = 0,
},
[IPA_MEM_STATS_TETHERING] = {
{
.id = IPA_MEM_STATS_TETHERING,
.offset = 0x1cb8,
.size = 0x0238,
.canary_count = 0,
},
[IPA_MEM_STATS_DROP] = {
{
.id = IPA_MEM_STATS_DROP,
.offset = 0x1ef0,
.size = 0x0020,
.canary_count = 0,
},
[IPA_MEM_MODEM] = {
{
.id = IPA_MEM_MODEM,
.offset = 0x1f18,
.size = 0x100c,
.canary_count = 2,
},
[IPA_MEM_END_MARKER] = {
{
.id = IPA_MEM_END_MARKER,
.offset = 0x3000,
.size = 0x0000,
......
......@@ -219,109 +219,109 @@ static const struct ipa_resource_data ipa_resource_data = {
/* IPA-resident memory region data for an SoC having IPA v4.2 */
static const struct ipa_mem ipa_mem_local_data[] = {
[IPA_MEM_UC_SHARED] = {
{
.id = IPA_MEM_UC_SHARED,
.offset = 0x0000,
.size = 0x0080,
.canary_count = 0,
},
[IPA_MEM_UC_INFO] = {
{
.id = IPA_MEM_UC_INFO,
.offset = 0x0080,
.size = 0x0200,
.canary_count = 0,
},
[IPA_MEM_V4_FILTER_HASHED] = {
{
.id = IPA_MEM_V4_FILTER_HASHED,
.offset = 0x0288,
.size = 0,
.canary_count = 2,
},
[IPA_MEM_V4_FILTER] = {
{
.id = IPA_MEM_V4_FILTER,
.offset = 0x0290,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_FILTER_HASHED] = {
{
.id = IPA_MEM_V6_FILTER_HASHED,
.offset = 0x0310,
.size = 0,
.canary_count = 2,
},
[IPA_MEM_V6_FILTER] = {
{
.id = IPA_MEM_V6_FILTER,
.offset = 0x0318,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V4_ROUTE_HASHED] = {
{
.id = IPA_MEM_V4_ROUTE_HASHED,
.offset = 0x0398,
.size = 0,
.canary_count = 2,
},
[IPA_MEM_V4_ROUTE] = {
{
.id = IPA_MEM_V4_ROUTE,
.offset = 0x03a0,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_ROUTE_HASHED] = {
{
.id = IPA_MEM_V6_ROUTE_HASHED,
.offset = 0x0420,
.size = 0,
.canary_count = 2,
},
[IPA_MEM_V6_ROUTE] = {
{
.id = IPA_MEM_V6_ROUTE,
.offset = 0x0428,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_MODEM_HEADER] = {
{
.id = IPA_MEM_MODEM_HEADER,
.offset = 0x04a8,
.size = 0x0140,
.canary_count = 2,
},
[IPA_MEM_MODEM_PROC_CTX] = {
{
.id = IPA_MEM_MODEM_PROC_CTX,
.offset = 0x05f0,
.size = 0x0200,
.canary_count = 2,
},
[IPA_MEM_AP_PROC_CTX] = {
{
.id = IPA_MEM_AP_PROC_CTX,
.offset = 0x07f0,
.size = 0x0200,
.canary_count = 0,
},
[IPA_MEM_PDN_CONFIG] = {
{
.id = IPA_MEM_PDN_CONFIG,
.offset = 0x09f8,
.size = 0x0050,
.canary_count = 2,
},
[IPA_MEM_STATS_QUOTA_MODEM] = {
{
.id = IPA_MEM_STATS_QUOTA_MODEM,
.offset = 0x0a50,
.size = 0x0060,
.canary_count = 2,
},
[IPA_MEM_STATS_TETHERING] = {
{
.id = IPA_MEM_STATS_TETHERING,
.offset = 0x0ab0,
.size = 0x0140,
.canary_count = 0,
},
[IPA_MEM_MODEM] = {
{
.id = IPA_MEM_MODEM,
.offset = 0x0bf0,
.size = 0x140c,
.canary_count = 0,
},
[IPA_MEM_END_MARKER] = {
{
.id = IPA_MEM_END_MARKER,
.offset = 0x2000,
.size = 0,
......
......@@ -265,139 +265,139 @@ static const struct ipa_resource_data ipa_resource_data = {
/* IPA-resident memory region data for an SoC having IPA v4.5 */
static const struct ipa_mem ipa_mem_local_data[] = {
[IPA_MEM_UC_SHARED] = {
{
.id = IPA_MEM_UC_SHARED,
.offset = 0x0000,
.size = 0x0080,
.canary_count = 0,
},
[IPA_MEM_UC_INFO] = {
{
.id = IPA_MEM_UC_INFO,
.offset = 0x0080,
.size = 0x0200,
.canary_count = 0,
},
[IPA_MEM_V4_FILTER_HASHED] = {
{
.id = IPA_MEM_V4_FILTER_HASHED,
.offset = 0x0288,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V4_FILTER] = {
{
.id = IPA_MEM_V4_FILTER,
.offset = 0x0308,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_FILTER_HASHED] = {
{
.id = IPA_MEM_V6_FILTER_HASHED,
.offset = 0x0388,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_FILTER] = {
{
.id = IPA_MEM_V6_FILTER,
.offset = 0x0408,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V4_ROUTE_HASHED] = {
{
.id = IPA_MEM_V4_ROUTE_HASHED,
.offset = 0x0488,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V4_ROUTE] = {
{
.id = IPA_MEM_V4_ROUTE,
.offset = 0x0508,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_ROUTE_HASHED] = {
{
.id = IPA_MEM_V6_ROUTE_HASHED,
.offset = 0x0588,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_ROUTE] = {
{
.id = IPA_MEM_V6_ROUTE,
.offset = 0x0608,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_MODEM_HEADER] = {
{
.id = IPA_MEM_MODEM_HEADER,
.offset = 0x0688,
.size = 0x0240,
.canary_count = 2,
},
[IPA_MEM_AP_HEADER] = {
{
.id = IPA_MEM_AP_HEADER,
.offset = 0x08c8,
.size = 0x0200,
.canary_count = 0,
},
[IPA_MEM_MODEM_PROC_CTX] = {
{
.id = IPA_MEM_MODEM_PROC_CTX,
.offset = 0x0ad0,
.size = 0x0b20,
.canary_count = 2,
},
[IPA_MEM_AP_PROC_CTX] = {
{
.id = IPA_MEM_AP_PROC_CTX,
.offset = 0x15f0,
.size = 0x0200,
.canary_count = 0,
},
[IPA_MEM_NAT_TABLE] = {
{
.id = IPA_MEM_NAT_TABLE,
.offset = 0x1800,
.size = 0x0d00,
.canary_count = 4,
},
[IPA_MEM_STATS_QUOTA_MODEM] = {
{
.id = IPA_MEM_STATS_QUOTA_MODEM,
.offset = 0x2510,
.size = 0x0030,
.canary_count = 4,
},
[IPA_MEM_STATS_QUOTA_AP] = {
{
.id = IPA_MEM_STATS_QUOTA_AP,
.offset = 0x2540,
.size = 0x0048,
.canary_count = 0,
},
[IPA_MEM_STATS_TETHERING] = {
{
.id = IPA_MEM_STATS_TETHERING,
.offset = 0x2588,
.size = 0x0238,
.canary_count = 0,
},
[IPA_MEM_STATS_FILTER_ROUTE] = {
{
.id = IPA_MEM_STATS_FILTER_ROUTE,
.offset = 0x27c0,
.size = 0x0800,
.canary_count = 0,
},
[IPA_MEM_STATS_DROP] = {
{
.id = IPA_MEM_STATS_DROP,
.offset = 0x2fc0,
.size = 0x0020,
.canary_count = 0,
},
[IPA_MEM_MODEM] = {
{
.id = IPA_MEM_MODEM,
.offset = 0x2fe8,
.size = 0x0800,
.canary_count = 2,
},
[IPA_MEM_UC_EVENT_RING] = {
{
.id = IPA_MEM_UC_EVENT_RING,
.offset = 0x3800,
.size = 0x1000,
.canary_count = 1,
},
[IPA_MEM_PDN_CONFIG] = {
{
.id = IPA_MEM_PDN_CONFIG,
.offset = 0x4800,
.size = 0x0050,
......
......@@ -263,139 +263,139 @@ static const struct ipa_resource_data ipa_resource_data = {
/* IPA-resident memory region data for an SoC having IPA v4.9 */
static const struct ipa_mem ipa_mem_local_data[] = {
[IPA_MEM_UC_SHARED] = {
{
.id = IPA_MEM_UC_SHARED,
.offset = 0x0000,
.size = 0x0080,
.canary_count = 0,
},
[IPA_MEM_UC_INFO] = {
{
.id = IPA_MEM_UC_INFO,
.offset = 0x0080,
.size = 0x0200,
.canary_count = 0,
},
[IPA_MEM_V4_FILTER_HASHED] = {
{
.id = IPA_MEM_V4_FILTER_HASHED,
.offset = 0x0288,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V4_FILTER] = {
{
.id = IPA_MEM_V4_FILTER,
.offset = 0x0308,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_FILTER_HASHED] = {
{
.id = IPA_MEM_V6_FILTER_HASHED,
.offset = 0x0388,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_FILTER] = {
{
.id = IPA_MEM_V6_FILTER,
.offset = 0x0408,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V4_ROUTE_HASHED] = {
{
.id = IPA_MEM_V4_ROUTE_HASHED,
.offset = 0x0488,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V4_ROUTE] = {
{
.id = IPA_MEM_V4_ROUTE,
.offset = 0x0508,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_ROUTE_HASHED] = {
{
.id = IPA_MEM_V6_ROUTE_HASHED,
.offset = 0x0588,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_V6_ROUTE] = {
{
.id = IPA_MEM_V6_ROUTE,
.offset = 0x0608,
.size = 0x0078,
.canary_count = 2,
},
[IPA_MEM_MODEM_HEADER] = {
{
.id = IPA_MEM_MODEM_HEADER,
.offset = 0x0688,
.size = 0x0240,
.canary_count = 2,
},
[IPA_MEM_AP_HEADER] = {
{
.id = IPA_MEM_AP_HEADER,
.offset = 0x08c8,
.size = 0x0200,
.canary_count = 0,
},
[IPA_MEM_MODEM_PROC_CTX] = {
{
.id = IPA_MEM_MODEM_PROC_CTX,
.offset = 0x0ad0,
.size = 0x0b20,
.canary_count = 2,
},
[IPA_MEM_AP_PROC_CTX] = {
{
.id = IPA_MEM_AP_PROC_CTX,
.offset = 0x15f0,
.size = 0x0200,
.canary_count = 0,
},
[IPA_MEM_NAT_TABLE] = {
{
.id = IPA_MEM_NAT_TABLE,
.offset = 0x1800,
.size = 0x0d00,
.canary_count = 4,
},
[IPA_MEM_STATS_QUOTA_MODEM] = {
{
.id = IPA_MEM_STATS_QUOTA_MODEM,
.offset = 0x2510,
.size = 0x0030,
.canary_count = 4,
},
[IPA_MEM_STATS_QUOTA_AP] = {
{
.id = IPA_MEM_STATS_QUOTA_AP,
.offset = 0x2540,
.size = 0x0048,
.canary_count = 0,
},
[IPA_MEM_STATS_TETHERING] = {
{
.id = IPA_MEM_STATS_TETHERING,
.offset = 0x2588,
.size = 0x0238,
.canary_count = 0,
},
[IPA_MEM_STATS_FILTER_ROUTE] = {
{
.id = IPA_MEM_STATS_FILTER_ROUTE,
.offset = 0x27c0,
.size = 0x0800,
.canary_count = 0,
},
[IPA_MEM_STATS_DROP] = {
{
.id = IPA_MEM_STATS_DROP,
.offset = 0x2fc0,
.size = 0x0020,
.canary_count = 0,
},
[IPA_MEM_MODEM] = {
{
.id = IPA_MEM_MODEM,
.offset = 0x2fe8,
.size = 0x0800,
.canary_count = 2,
},
[IPA_MEM_UC_EVENT_RING] = {
{
.id = IPA_MEM_UC_EVENT_RING,
.offset = 0x3800,
.size = 0x1000,
.canary_count = 1,
},
[IPA_MEM_PDN_CONFIG] = {
{
.id = IPA_MEM_PDN_CONFIG,
.offset = 0x4800,
.size = 0x0050,
......
......@@ -28,8 +28,14 @@
const struct ipa_mem *ipa_mem_find(struct ipa *ipa, enum ipa_mem_id mem_id)
{
if (mem_id < IPA_MEM_COUNT)
return &ipa->mem[mem_id];
u32 i;
for (i = 0; i < ipa->mem_count; i++) {
const struct ipa_mem *mem = &ipa->mem[i];
if (mem->id == mem_id)
return mem;
}
return NULL;
}
......@@ -209,6 +215,11 @@ static bool ipa_mem_valid_one(struct ipa *ipa, const struct ipa_mem *mem)
return false;
}
if (!mem->size && !mem->canary_count) {
dev_err(dev, "empty memory region %u\n", mem_id);
return false;
}
/* Other than modem memory, sizes must be a multiple of 8 */
size_multiple = mem_id == IPA_MEM_MODEM ? 4 : 8;
if (mem->size % size_multiple)
......@@ -244,25 +255,14 @@ static bool ipa_mem_valid(struct ipa *ipa, const struct ipa_mem_data *mem_data)
for (i = 0; i < mem_data->local_count; i++) {
const struct ipa_mem *mem = &mem_data->local[i];
if (mem->id == IPA_MEM_UNDEFINED)
continue;
if (__test_and_set_bit(mem->id, regions)) {
dev_err(dev, "duplicate memory region %u\n", mem->id);
return false;
}
/* Defined regions have non-zero size and/or canary count */
if (mem->size || mem->canary_count) {
if (ipa_mem_valid_one(ipa, mem))
continue;
if (!ipa_mem_valid_one(ipa, mem))
return false;
}
/* It's harmless, but warn if an offset is provided */
if (mem->offset)
dev_warn(dev, "empty region %u has non-zero offset\n",
mem->id);
}
/* Now see if any required regions are not defined */
......@@ -349,20 +349,14 @@ int ipa_mem_config(struct ipa *ipa)
* space prior to the region's base address if indicated.
*/
for (i = 0; i < ipa->mem_count; i++) {
u16 canary_count;
u16 canary_count = ipa->mem[i].canary_count;
__le32 *canary;
/* Skip over undefined regions */
mem = &ipa->mem[i];
if (!mem->offset && !mem->size)
continue;
canary_count = mem->canary_count;
if (!canary_count)
continue;
/* Write canary values in the space before the region */
canary = ipa->mem_virt + ipa->mem_offset + mem->offset;
canary = ipa->mem_virt + ipa->mem_offset + ipa->mem[i].offset;
do
*--canary = IPA_MEM_CANARY_VAL;
while (--canary_count);
......
......@@ -43,7 +43,6 @@ struct ipa_mem_data;
/* IPA-resident memory region ids */
enum ipa_mem_id {
IPA_MEM_UNDEFINED = 0, /* undefined region */
IPA_MEM_UC_SHARED, /* 0 canaries */
IPA_MEM_UC_INFO, /* 0 canaries */
IPA_MEM_V4_FILTER_HASHED, /* 2 canaries */
......
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