Commit c6cf8b00 authored by Bryan Wu's avatar Bryan Wu Committed by Greg Kroah-Hartman

USB: musb: add Blackfin specific configuration to MUSB

Some config registers are not avaiable in Blackfin, we have to comment them out.

v1-v2:
 - remove Blackfin specific header file
 - add Blackfin register version to musb_regs.h header file
Signed-off-by: default avatarBryan Wu <cooloney@kernel.org>
Signed-off-by: default avatarFelipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 6995eb68
...@@ -148,7 +148,8 @@ static inline struct musb *dev_to_musb(struct device *dev) ...@@ -148,7 +148,8 @@ static inline struct musb *dev_to_musb(struct device *dev)
/*-------------------------------------------------------------------------*/ /*-------------------------------------------------------------------------*/
#ifndef CONFIG_USB_TUSB6010 #if !defined(CONFIG_USB_TUSB6010) && !defined(CONFIG_BLACKFIN)
/* /*
* Load an endpoint's FIFO * Load an endpoint's FIFO
*/ */
...@@ -1124,25 +1125,25 @@ fifo_setup(struct musb *musb, struct musb_hw_ep *hw_ep, ...@@ -1124,25 +1125,25 @@ fifo_setup(struct musb *musb, struct musb_hw_ep *hw_ep,
#endif #endif
switch (cfg->style) { switch (cfg->style) {
case FIFO_TX: case FIFO_TX:
musb_writeb(mbase, MUSB_TXFIFOSZ, c_size); musb_write_txfifosz(mbase, c_size);
musb_writew(mbase, MUSB_TXFIFOADD, c_off); musb_write_txfifoadd(mbase, c_off);
hw_ep->tx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB); hw_ep->tx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB);
hw_ep->max_packet_sz_tx = maxpacket; hw_ep->max_packet_sz_tx = maxpacket;
break; break;
case FIFO_RX: case FIFO_RX:
musb_writeb(mbase, MUSB_RXFIFOSZ, c_size); musb_write_rxfifosz(mbase, c_size);
musb_writew(mbase, MUSB_RXFIFOADD, c_off); musb_write_rxfifoadd(mbase, c_off);
hw_ep->rx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB); hw_ep->rx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB);
hw_ep->max_packet_sz_rx = maxpacket; hw_ep->max_packet_sz_rx = maxpacket;
break; break;
case FIFO_RXTX: case FIFO_RXTX:
musb_writeb(mbase, MUSB_TXFIFOSZ, c_size); musb_write_txfifosz(mbase, c_size);
musb_writew(mbase, MUSB_TXFIFOADD, c_off); musb_write_txfifoadd(mbase, c_off);
hw_ep->rx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB); hw_ep->rx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB);
hw_ep->max_packet_sz_rx = maxpacket; hw_ep->max_packet_sz_rx = maxpacket;
musb_writeb(mbase, MUSB_RXFIFOSZ, c_size); musb_write_rxfifosz(mbase, c_size);
musb_writew(mbase, MUSB_RXFIFOADD, c_off); musb_write_rxfifoadd(mbase, c_off);
hw_ep->tx_double_buffered = hw_ep->rx_double_buffered; hw_ep->tx_double_buffered = hw_ep->rx_double_buffered;
hw_ep->max_packet_sz_tx = maxpacket; hw_ep->max_packet_sz_tx = maxpacket;
...@@ -1246,9 +1247,10 @@ static int __init ep_config_from_table(struct musb *musb) ...@@ -1246,9 +1247,10 @@ static int __init ep_config_from_table(struct musb *musb)
*/ */
static int __init ep_config_from_hw(struct musb *musb) static int __init ep_config_from_hw(struct musb *musb)
{ {
u8 epnum = 0, reg; u8 epnum = 0;
struct musb_hw_ep *hw_ep; struct musb_hw_ep *hw_ep;
void *mbase = musb->mregs; void *mbase = musb->mregs;
int ret = 0;
DBG(2, "<== static silicon ep config\n"); DBG(2, "<== static silicon ep config\n");
...@@ -1258,26 +1260,9 @@ static int __init ep_config_from_hw(struct musb *musb) ...@@ -1258,26 +1260,9 @@ static int __init ep_config_from_hw(struct musb *musb)
musb_ep_select(mbase, epnum); musb_ep_select(mbase, epnum);
hw_ep = musb->endpoints + epnum; hw_ep = musb->endpoints + epnum;
/* read from core using indexed model */ ret = musb_read_fifosize(musb, hw_ep, epnum);
reg = musb_readb(hw_ep->regs, 0x10 + MUSB_FIFOSIZE); if (ret < 0)
if (!reg) {
/* 0's returned when no more endpoints */
break; break;
}
musb->nr_endpoints++;
musb->epmask |= (1 << epnum);
hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
/* shared TX/RX FIFO? */
if ((reg & 0xf0) == 0xf0) {
hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
hw_ep->is_shared_fifo = true;
continue;
} else {
hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
hw_ep->is_shared_fifo = false;
}
/* FIXME set up hw_ep->{rx,tx}_double_buffered */ /* FIXME set up hw_ep->{rx,tx}_double_buffered */
...@@ -1326,7 +1311,7 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb) ...@@ -1326,7 +1311,7 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb)
/* log core options (read using indexed model) */ /* log core options (read using indexed model) */
musb_ep_select(mbase, 0); musb_ep_select(mbase, 0);
reg = musb_readb(mbase, 0x10 + MUSB_CONFIGDATA); reg = musb_read_configdata(mbase);
strcpy(aInfo, (reg & MUSB_CONFIGDATA_UTMIDW) ? "UTMI-16" : "UTMI-8"); strcpy(aInfo, (reg & MUSB_CONFIGDATA_UTMIDW) ? "UTMI-16" : "UTMI-8");
if (reg & MUSB_CONFIGDATA_DYNFIFO) if (reg & MUSB_CONFIGDATA_DYNFIFO)
...@@ -1391,7 +1376,7 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb) ...@@ -1391,7 +1376,7 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb)
} }
/* log release info */ /* log release info */
hwvers = musb_readw(mbase, MUSB_HWVERS); hwvers = musb_read_hwvers(mbase);
rev_major = (hwvers >> 10) & 0x1f; rev_major = (hwvers >> 10) & 0x1f;
rev_minor = hwvers & 0x3ff; rev_minor = hwvers & 0x3ff;
snprintf(aRevision, 32, "%d.%d%s", rev_major, snprintf(aRevision, 32, "%d.%d%s", rev_major,
...@@ -1400,8 +1385,7 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb) ...@@ -1400,8 +1385,7 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb)
musb_driver_name, type, aRevision, aDate); musb_driver_name, type, aRevision, aDate);
/* configure ep0 */ /* configure ep0 */
musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; musb_configure_ep0(musb);
musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
/* discover endpoint configuration */ /* discover endpoint configuration */
musb->nr_endpoints = 1; musb->nr_endpoints = 1;
...@@ -1445,7 +1429,7 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb) ...@@ -1445,7 +1429,7 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb)
hw_ep->regs = MUSB_EP_OFFSET(i, 0) + mbase; hw_ep->regs = MUSB_EP_OFFSET(i, 0) + mbase;
#ifdef CONFIG_USB_MUSB_HDRC_HCD #ifdef CONFIG_USB_MUSB_HDRC_HCD
hw_ep->target_regs = MUSB_BUSCTL_OFFSET(i, 0) + mbase; hw_ep->target_regs = musb_read_target_reg_base(i, mbase);
hw_ep->rx_reinit = 1; hw_ep->rx_reinit = 1;
hw_ep->tx_reinit = 1; hw_ep->tx_reinit = 1;
#endif #endif
......
...@@ -191,7 +191,7 @@ enum musb_g_ep0_state { ...@@ -191,7 +191,7 @@ enum musb_g_ep0_state {
*/ */
#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_ARCH_OMAP2430) \ #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_ARCH_OMAP2430) \
|| defined(CONFIG_ARCH_OMAP3430) || defined(CONFIG_ARCH_OMAP3430) || defined(CONFIG_BLACKFIN)
/* REVISIT indexed access seemed to /* REVISIT indexed access seemed to
* misbehave (on DaVinci) for at least peripheral IN ... * misbehave (on DaVinci) for at least peripheral IN ...
*/ */
...@@ -448,6 +448,70 @@ static inline struct musb *gadget_to_musb(struct usb_gadget *g) ...@@ -448,6 +448,70 @@ static inline struct musb *gadget_to_musb(struct usb_gadget *g)
} }
#endif #endif
#ifdef CONFIG_BLACKFIN
static inline int musb_read_fifosize(struct musb *musb,
struct musb_hw_ep *hw_ep, u8 epnum)
{
musb->nr_endpoints++;
musb->epmask |= (1 << epnum);
if (epnum < 5) {
hw_ep->max_packet_sz_tx = 128;
hw_ep->max_packet_sz_rx = 128;
} else {
hw_ep->max_packet_sz_tx = 1024;
hw_ep->max_packet_sz_rx = 1024;
}
hw_ep->is_shared_fifo = false;
return 0;
}
static inline void musb_configure_ep0(struct musb *musb)
{
musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
musb->endpoints[0].is_shared_fifo = true;
}
#else
static inline int musb_read_fifosize(struct musb *musb,
struct musb_hw_ep *hw_ep, u8 epnum)
{
u8 reg = 0;
/* read from core using indexed model */
reg = musb_readb(hw_ep->regs, 0x10 + MUSB_FIFOSIZE);
/* 0's returned when no more endpoints */
if (!reg)
return -ENODEV;
musb->nr_endpoints++;
musb->epmask |= (1 << epnum);
hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
/* shared TX/RX FIFO? */
if ((reg & 0xf0) == 0xf0) {
hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
hw_ep->is_shared_fifo = true;
return 0;
} else {
hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
hw_ep->is_shared_fifo = false;
}
return 0;
}
static inline void musb_configure_ep0(struct musb *musb)
{
musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
}
#endif /* CONFIG_BLACKFIN */
/***************************** Glue it together *****************************/ /***************************** Glue it together *****************************/
...@@ -470,14 +534,14 @@ extern void musb_hnp_stop(struct musb *musb); ...@@ -470,14 +534,14 @@ extern void musb_hnp_stop(struct musb *musb);
extern int musb_platform_set_mode(struct musb *musb, u8 musb_mode); extern int musb_platform_set_mode(struct musb *musb, u8 musb_mode);
#if defined(CONFIG_USB_TUSB6010) || \ #if defined(CONFIG_USB_TUSB6010) || defined(CONFIG_BLACKFIN) || \
defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP34XX) defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP34XX)
extern void musb_platform_try_idle(struct musb *musb, unsigned long timeout); extern void musb_platform_try_idle(struct musb *musb, unsigned long timeout);
#else #else
#define musb_platform_try_idle(x, y) do {} while (0) #define musb_platform_try_idle(x, y) do {} while (0)
#endif #endif
#ifdef CONFIG_USB_TUSB6010 #if defined(CONFIG_USB_TUSB6010) || defined(CONFIG_BLACKFIN)
extern int musb_platform_get_vbus_status(struct musb *musb); extern int musb_platform_get_vbus_status(struct musb *musb);
#else #else
#define musb_platform_get_vbus_status(x) 0 #define musb_platform_get_vbus_status(x) 0
......
...@@ -596,12 +596,10 @@ musb_rx_reinit(struct musb *musb, struct musb_qh *qh, struct musb_hw_ep *ep) ...@@ -596,12 +596,10 @@ musb_rx_reinit(struct musb *musb, struct musb_qh *qh, struct musb_hw_ep *ep)
/* target addr and (for multipoint) hub addr/port */ /* target addr and (for multipoint) hub addr/port */
if (musb->is_multipoint) { if (musb->is_multipoint) {
musb_writeb(ep->target_regs, MUSB_RXFUNCADDR, musb_write_rxfunaddr(ep->target_regs, qh->addr_reg);
qh->addr_reg); musb_write_rxhubaddr(ep->target_regs, qh->h_addr_reg);
musb_writeb(ep->target_regs, MUSB_RXHUBADDR, musb_write_rxhubport(ep->target_regs, qh->h_port_reg);
qh->h_addr_reg);
musb_writeb(ep->target_regs, MUSB_RXHUBPORT,
qh->h_port_reg);
} else } else
musb_writeb(musb->mregs, MUSB_FADDR, qh->addr_reg); musb_writeb(musb->mregs, MUSB_FADDR, qh->addr_reg);
...@@ -715,15 +713,9 @@ static void musb_ep_program(struct musb *musb, u8 epnum, ...@@ -715,15 +713,9 @@ static void musb_ep_program(struct musb *musb, u8 epnum,
/* target addr and (for multipoint) hub addr/port */ /* target addr and (for multipoint) hub addr/port */
if (musb->is_multipoint) { if (musb->is_multipoint) {
musb_writeb(mbase, musb_write_txfunaddr(mbase, epnum, qh->addr_reg);
MUSB_BUSCTL_OFFSET(epnum, MUSB_TXFUNCADDR), musb_write_txhubaddr(mbase, epnum, qh->h_addr_reg);
qh->addr_reg); musb_write_txhubport(mbase, epnum, qh->h_port_reg);
musb_writeb(mbase,
MUSB_BUSCTL_OFFSET(epnum, MUSB_TXHUBADDR),
qh->h_addr_reg);
musb_writeb(mbase,
MUSB_BUSCTL_OFFSET(epnum, MUSB_TXHUBPORT),
qh->h_port_reg);
/* FIXME if !epnum, do the same for RX ... */ /* FIXME if !epnum, do the same for RX ... */
} else } else
musb_writeb(mbase, MUSB_FADDR, qh->addr_reg); musb_writeb(mbase, MUSB_FADDR, qh->addr_reg);
......
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