Commit c99428d0 authored by Xiubo Li's avatar Xiubo Li Committed by Mark Brown

spi: fsl-dspi: Convert to use regmap framework's endianness method.

Signed-off-by: default avatarXiubo Li <Li.Xiubo@freescale.com>
Acked-by: default avatarChao Fu <b44548@freescale.com>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent dc8fcd71
......@@ -10,7 +10,12 @@ Required properties:
- pinctrl-names: must contain a "default" entry.
- spi-num-chipselects : the number of the chipselect signals.
- bus-num : the slave chip chipselect signal number.
- big-endian : if DSPI modudle is big endian, the bool will be set in node.
Optional property:
- big-endian: If present the dspi device's registers are implemented
in big endian mode, otherwise in native mode(same with CPU), for more
detail please see: Documentation/devicetree/bindings/regmap/regmap.txt.
Example:
dspi0@4002c000 {
......
......@@ -493,9 +493,6 @@ static int dspi_probe(struct platform_device *pdev)
}
dspi_regmap_config.lock_arg = dspi;
dspi_regmap_config.val_format_endian =
of_property_read_bool(np, "big-endian")
? REGMAP_ENDIAN_BIG : REGMAP_ENDIAN_DEFAULT;
dspi->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "dspi", base,
&dspi_regmap_config);
if (IS_ERR(dspi->regmap)) {
......
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