Commit c9f4f26e authored by Borislav Petkov's avatar Borislav Petkov

amd64_edac: Cleanup NBCTL code

Remove family names from macro names, drop single bit defines and
comment their meaning instead.

No functional change.
Signed-off-by: default avatarBorislav Petkov <borislav.petkov@amd.com>
parent 78da121e
......@@ -2196,21 +2196,20 @@ static bool enable_ecc_error_reporting(struct ecc_settings *s, u8 nid,
struct pci_dev *F3)
{
bool ret = true;
u32 value, mask = K8_NBCTL_CECCEn | K8_NBCTL_UECCEn;
u32 value, mask = 0x3; /* UECC/CECC enable */
if (toggle_ecc_err_reporting(s, nid, ON)) {
amd64_warn("Error enabling ECC reporting over MCGCTL!\n");
return false;
}
amd64_read_pci_cfg(F3, K8_NBCTL, &value);
amd64_read_pci_cfg(F3, NBCTL, &value);
/* turn on UECCEn and CECCEn bits */
s->old_nbctl = value & mask;
s->nbctl_valid = true;
value |= mask;
amd64_write_pci_cfg(F3, K8_NBCTL, value);
amd64_write_pci_cfg(F3, NBCTL, value);
amd64_read_pci_cfg(F3, K8_NBCFG, &value);
......@@ -2250,16 +2249,17 @@ static bool enable_ecc_error_reporting(struct ecc_settings *s, u8 nid,
static void restore_ecc_error_reporting(struct ecc_settings *s, u8 nid,
struct pci_dev *F3)
{
u32 value, mask = K8_NBCTL_CECCEn | K8_NBCTL_UECCEn;
u32 value, mask = 0x3; /* UECC/CECC enable */
if (!s->nbctl_valid)
return;
amd64_read_pci_cfg(F3, K8_NBCTL, &value);
amd64_read_pci_cfg(F3, NBCTL, &value);
value &= ~mask;
value |= s->old_nbctl;
amd64_write_pci_cfg(F3, K8_NBCTL, value);
amd64_write_pci_cfg(F3, NBCTL, value);
/* restore previous BIOS DRAM ECC "off" setting we force-enabled */
if (!s->flags.nb_ecc_prev) {
......
......@@ -244,13 +244,7 @@
/*
* Function 3 - Misc Control
*/
#define K8_NBCTL 0x40
/* Correctable ECC error reporting enable */
#define K8_NBCTL_CECCEn BIT(0)
/* UnCorrectable ECC error reporting enable */
#define K8_NBCTL_UECCEn BIT(1)
#define NBCTL 0x40
#define K8_NBCFG 0x44
#define K8_NBCFG_CHIPKILL BIT(23)
......
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