Commit caa72788 authored by Sean Christopherson's avatar Sean Christopherson

KVM: x86/mmu: Rephrase comment about synthetic PFERR flags in #PF handler

Reword the BUILD_BUG_ON() comment in the legacy #PF handler to explicitly
describe how asserting that synthetic PFERR flags are limited to bits 31:0
protects KVM against inadvertently passing a synthetic flag to the common
page fault handler.

No functional change intended.
Suggested-by: default avatarXiaoyao Li <xiaoyao.li@intel.com>
Reviewed-by: default avatarXiaoyao Li <xiaoyao.li@intel.com>
Link: https://lore.kernel.org/r/20240608001108.3296879-1-seanjc@google.comSigned-off-by: default avatarSean Christopherson <seanjc@google.com>
parent 9ecc1c11
...@@ -4552,7 +4552,10 @@ int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code, ...@@ -4552,7 +4552,10 @@ int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code,
if (WARN_ON_ONCE(error_code >> 32)) if (WARN_ON_ONCE(error_code >> 32))
error_code = lower_32_bits(error_code); error_code = lower_32_bits(error_code);
/* Ensure the above sanity check also covers KVM-defined flags. */ /*
* Restrict KVM-defined flags to bits 63:32 so that it's impossible for
* them to conflict with #PF error codes, which are limited to 32 bits.
*/
BUILD_BUG_ON(lower_32_bits(PFERR_SYNTHETIC_MASK)); BUILD_BUG_ON(lower_32_bits(PFERR_SYNTHETIC_MASK));
vcpu->arch.l1tf_flush_l1d = true; vcpu->arch.l1tf_flush_l1d = true;
......
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