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Commit caa966a7 authored by Ben Skeggs's avatar Ben Skeggs
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drm/nouveau/kms/nv50-: convert core head_mode() to new push macros 

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
parent 1f772f5a
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Showing with 84 additions and 82 deletions
drivers/gpu/drm/nouveau/dispnv50/head.h
View file @ caa966a7
...@@ -26,7 +26,7 @@ void nv50_head_flush_clr(struct nv50_head *head, ...@@ -26,7 +26,7 @@ void nv50_head_flush_clr(struct nv50_head *head,
struct nv50_head_func { struct nv50_head_func {
int (*view)(struct nv50_head *, struct nv50_head_atom *); int (*view)(struct nv50_head *, struct nv50_head_atom *);
void (*mode)(struct nv50_head *, struct nv50_head_atom *); int (*mode)(struct nv50_head *, struct nv50_head_atom *);
bool (*olut)(struct nv50_head *, struct nv50_head_atom *, int); bool (*olut)(struct nv50_head *, struct nv50_head_atom *, int);
bool olut_identity; bool olut_identity;
int olut_size; int olut_size;
...@@ -51,7 +51,7 @@ struct nv50_head_func { ...@@ -51,7 +51,7 @@ struct nv50_head_func {
extern const struct nv50_head_func head507d; extern const struct nv50_head_func head507d;
int head507d_view(struct nv50_head *, struct nv50_head_atom *); int head507d_view(struct nv50_head *, struct nv50_head_atom *);
void head507d_mode(struct nv50_head *, struct nv50_head_atom *); int head507d_mode(struct nv50_head *, struct nv50_head_atom *);
bool head507d_olut(struct nv50_head *, struct nv50_head_atom *, int); bool head507d_olut(struct nv50_head *, struct nv50_head_atom *, int);
void head507d_core_calc(struct nv50_head *, struct nv50_head_atom *); void head507d_core_calc(struct nv50_head *, struct nv50_head_atom *);
void head507d_core_clr(struct nv50_head *); void head507d_core_clr(struct nv50_head *);
...@@ -68,7 +68,7 @@ extern const struct nv50_head_func head827d; ...@@ -68,7 +68,7 @@ extern const struct nv50_head_func head827d;
extern const struct nv50_head_func head907d; extern const struct nv50_head_func head907d;
int head907d_view(struct nv50_head *, struct nv50_head_atom *); int head907d_view(struct nv50_head *, struct nv50_head_atom *);
void head907d_mode(struct nv50_head *, struct nv50_head_atom *); int head907d_mode(struct nv50_head *, struct nv50_head_atom *);
bool head907d_olut(struct nv50_head *, struct nv50_head_atom *, int); bool head907d_olut(struct nv50_head *, struct nv50_head_atom *, int);
void head907d_olut_set(struct nv50_head *, struct nv50_head_atom *); void head907d_olut_set(struct nv50_head *, struct nv50_head_atom *);
void head907d_olut_clr(struct nv50_head *); void head907d_olut_clr(struct nv50_head *);
......
drivers/gpu/drm/nouveau/dispnv50/head507d.c
View file @ caa966a7
...@@ -288,28 +288,28 @@ head507d_olut(struct nv50_head *head, struct nv50_head_atom *asyh, int size) ...@@ -288,28 +288,28 @@ head507d_olut(struct nv50_head *head, struct nv50_head_atom *asyh, int size)
return true; return true;
} }
void int
head507d_mode(struct nv50_head *head, struct nv50_head_atom *asyh) head507d_mode(struct nv50_head *head, struct nv50_head_atom *asyh)
{ {
struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan; struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
struct nv50_head_mode *m = &asyh->mode; struct nv50_head_mode *m = &asyh->mode;
u32 *push; const int i = head->base.index;
if ((push = evo_wait(core, 13))) { int ret;
evo_mthd(push, 0x0804 + (head->base.index * 0x400), 2);
evo_data(push, 0x00800000 | m->clock); if ((ret = PUSH_WAIT(push, 13)))
evo_data(push, m->interlace ? 0x00000002 : 0x00000000); return ret;
evo_mthd(push, 0x0810 + (head->base.index * 0x400), 7);
evo_data(push, 0x00000000); PUSH_NVSQ(push, NV507D, 0x0804 + (i * 0x400), 0x00800000 | m->clock,
evo_data(push, m->v.active << 16 | m->h.active ); 0x0808 + (i * 0x400), m->interlace ? 0x00000002 : 0x00000000);
evo_data(push, m->v.synce << 16 | m->h.synce ); PUSH_NVSQ(push, NV507D, 0x0810 + (i * 0x400), 0x00000000,
evo_data(push, m->v.blanke << 16 | m->h.blanke ); 0x0814 + (i * 0x400), m->v.active << 16 | m->h.active,
evo_data(push, m->v.blanks << 16 | m->h.blanks ); 0x0818 + (i * 0x400), m->v.synce << 16 | m->h.synce,
evo_data(push, m->v.blank2e << 16 | m->v.blank2s); 0x081c + (i * 0x400), m->v.blanke << 16 | m->h.blanke,
evo_data(push, asyh->mode.v.blankus); 0x0820 + (i * 0x400), m->v.blanks << 16 | m->h.blanks,
evo_mthd(push, 0x082c + (head->base.index * 0x400), 1); 0x0824 + (i * 0x400), m->v.blank2e << 16 | m->v.blank2s,
evo_data(push, 0x00000000); 0x0828 + (i * 0x400), asyh->mode.v.blankus);
evo_kick(push, core); PUSH_NVSQ(push, NV507D, 0x082c + (i * 0x400), 0x00000000);
} return 0;
} }
int int
......
drivers/gpu/drm/nouveau/dispnv50/head907d.c
View file @ caa966a7
...@@ -251,29 +251,29 @@ head907d_olut(struct nv50_head *head, struct nv50_head_atom *asyh, int size) ...@@ -251,29 +251,29 @@ head907d_olut(struct nv50_head *head, struct nv50_head_atom *asyh, int size)
return true; return true;
} }
void int
head907d_mode(struct nv50_head *head, struct nv50_head_atom *asyh) head907d_mode(struct nv50_head *head, struct nv50_head_atom *asyh)
{ {
struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan; struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
struct nv50_head_mode *m = &asyh->mode; struct nv50_head_mode *m = &asyh->mode;
u32 *push; const int i = head->base.index;
if ((push = evo_wait(core, 14))) { int ret;
evo_mthd(push, 0x0410 + (head->base.index * 0x300), 6);
evo_data(push, 0x00000000); if ((ret = PUSH_WAIT(push, 14)))
evo_data(push, m->v.active << 16 | m->h.active ); return ret;
evo_data(push, m->v.synce << 16 | m->h.synce );
evo_data(push, m->v.blanke << 16 | m->h.blanke ); PUSH_NVSQ(push, NV907D, 0x0410 + (i * 0x300), 0x00000000,
evo_data(push, m->v.blanks << 16 | m->h.blanks ); 0x0414 + (i * 0x300), m->v.active << 16 | m->h.active,
evo_data(push, m->v.blank2e << 16 | m->v.blank2s); 0x0418 + (i * 0x300), m->v.synce << 16 | m->h.synce,
evo_mthd(push, 0x042c + (head->base.index * 0x300), 2); 0x041c + (i * 0x300), m->v.blanke << 16 | m->h.blanke,
evo_data(push, 0x00000000); /* ??? */ 0x0420 + (i * 0x300), m->v.blanks << 16 | m->h.blanks,
evo_data(push, 0xffffff00); 0x0424 + (i * 0x300), m->v.blank2e << 16 | m->v.blank2s);
evo_mthd(push, 0x0450 + (head->base.index * 0x300), 3); PUSH_NVSQ(push, NV907D, 0x042c + (i * 0x300), 0x00000000,
evo_data(push, m->clock * 1000); 0x0430 + (i * 0x300), 0xffffff00);
evo_data(push, 0x00200000); /* ??? */ PUSH_NVSQ(push, NV907D, 0x0450 + (i * 0x300), m->clock * 1000,
evo_data(push, m->clock * 1000); 0x0454 + (i * 0x300), 0x00200000,
evo_kick(push, core); 0x0458 + (i * 0x300), m->clock * 1000);
} return 0;
} }
int int
......
drivers/gpu/drm/nouveau/dispnv50/headc37d.c
View file @ caa966a7
...@@ -167,29 +167,29 @@ headc37d_olut(struct nv50_head *head, struct nv50_head_atom *asyh, int size) ...@@ -167,29 +167,29 @@ headc37d_olut(struct nv50_head *head, struct nv50_head_atom *asyh, int size)
return true; return true;
} }
static void static int
headc37d_mode(struct nv50_head *head, struct nv50_head_atom *asyh) headc37d_mode(struct nv50_head *head, struct nv50_head_atom *asyh)
{ {
struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan; struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
struct nv50_head_mode *m = &asyh->mode; struct nv50_head_mode *m = &asyh->mode;
u32 *push; const int i = head->base.index;
if ((push = evo_wait(core, 13))) { int ret;
evo_mthd(push, 0x2064 + (head->base.index * 0x400), 5);
evo_data(push, (m->v.active << 16) | m->h.active ); if ((ret = PUSH_WAIT(push, 13)))
evo_data(push, (m->v.synce << 16) | m->h.synce ); return ret;
evo_data(push, (m->v.blanke << 16) | m->h.blanke );
evo_data(push, (m->v.blanks << 16) | m->h.blanks ); PUSH_NVSQ(push, NVC37D, 0x2064 + (i * 0x400), m->v.active << 16 | m->h.active,
evo_data(push, (m->v.blank2e << 16) | m->v.blank2s); 0x2068 + (i * 0x400), m->v.synce << 16 | m->h.synce,
evo_mthd(push, 0x2008 + (head->base.index * 0x400), 2); 0x206c + (i * 0x400), m->v.blanke << 16 | m->h.blanke,
evo_data(push, m->interlace); 0x2070 + (i * 0x400), m->v.blanks << 16 | m->h.blanks,
evo_data(push, m->clock * 1000); 0x2074 + (i * 0x400), m->v.blank2e << 16 | m->v.blank2s);
evo_mthd(push, 0x2028 + (head->base.index * 0x400), 1); PUSH_NVSQ(push, NVC37D, 0x2008 + (i * 0x400), m->interlace,
evo_data(push, m->clock * 1000); 0x200c + (i * 0x400), m->clock * 1000);
/*XXX: HEAD_USAGE_BOUNDS, doesn't belong here. */ PUSH_NVSQ(push, NVC37D, 0x2028 + (i * 0x400), m->clock * 1000);
evo_mthd(push, 0x2030 + (head->base.index * 0x400), 1);
evo_data(push, 0x00000124); /*XXX: HEAD_USAGE_BOUNDS, doesn't belong here. */
evo_kick(push, core); PUSH_NVSQ(push, NVC37D, 0x2030 + (i * 0x400), 0x00000124);
} return 0;
} }
int int
......
drivers/gpu/drm/nouveau/dispnv50/headc57d.c
View file @ caa966a7
...@@ -23,6 +23,8 @@ ...@@ -23,6 +23,8 @@
#include "atom.h" #include "atom.h"
#include "core.h" #include "core.h"
#include <nvif/pushc37b.h>
static void static void
headc57d_or(struct nv50_head *head, struct nv50_head_atom *asyh) headc57d_or(struct nv50_head *head, struct nv50_head_atom *asyh)
{ {
...@@ -171,29 +173,29 @@ headc57d_olut(struct nv50_head *head, struct nv50_head_atom *asyh, int size) ...@@ -171,29 +173,29 @@ headc57d_olut(struct nv50_head *head, struct nv50_head_atom *asyh, int size)
return true; return true;
} }
static void static int
headc57d_mode(struct nv50_head *head, struct nv50_head_atom *asyh) headc57d_mode(struct nv50_head *head, struct nv50_head_atom *asyh)
{ {
struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan; struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
struct nv50_head_mode *m = &asyh->mode; struct nv50_head_mode *m = &asyh->mode;
u32 *push; const int i = head->base.index;
if ((push = evo_wait(core, 13))) { int ret;
evo_mthd(push, 0x2064 + (head->base.index * 0x400), 5);
evo_data(push, (m->v.active << 16) | m->h.active ); if ((ret = PUSH_WAIT(push, 13)))
evo_data(push, (m->v.synce << 16) | m->h.synce ); return ret;
evo_data(push, (m->v.blanke << 16) | m->h.blanke );
evo_data(push, (m->v.blanks << 16) | m->h.blanks ); PUSH_NVSQ(push, NVC57D, 0x2064 + (i * 0x400), m->v.active << 16 | m->h.active,
evo_data(push, (m->v.blank2e << 16) | m->v.blank2s); 0x2068 + (i * 0x400), m->v.synce << 16 | m->h.synce,
evo_mthd(push, 0x2008 + (head->base.index * 0x400), 2); 0x206c + (i * 0x400), m->v.blanke << 16 | m->h.blanke,
evo_data(push, m->interlace); 0x2070 + (i * 0x400), m->v.blanks << 16 | m->h.blanks,
evo_data(push, m->clock * 1000); 0x2074 + (i * 0x400), m->v.blank2e << 16 | m->v.blank2s);
evo_mthd(push, 0x2028 + (head->base.index * 0x400), 1); PUSH_NVSQ(push, NVC57D, 0x2008 + (i * 0x400), m->interlace,
evo_data(push, m->clock * 1000); 0x200c + (i * 0x400), m->clock * 1000);
/*XXX: HEAD_USAGE_BOUNDS, doesn't belong here. */ PUSH_NVSQ(push, NVC57D, 0x2028 + (i * 0x400), m->clock * 1000);
evo_mthd(push, 0x2030 + (head->base.index * 0x400), 1);
evo_data(push, 0x00001114); /*XXX: HEAD_USAGE_BOUNDS, doesn't belong here. */
evo_kick(push, core); PUSH_NVSQ(push, NVC57D, 0x2030 + (i * 0x400), 0x00001114);
} return 0;
} }
const struct nv50_head_func const struct nv50_head_func
......
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