Commit cdaf6417 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman

ARM: dts: r8a73a4: Remove unit-addresses and regs from integrated caches

The Cortex-A15/A7 cache controllers are integrated controllers, and thus
the device nodes representing them should not have unit-addresses or reg
properties.

Fixes: b0da45c6 ("ARM: dts: r8a73a4: Fix W=1 dtc warnings")
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 9ed2d4bc
...@@ -32,18 +32,16 @@ cpu0: cpu@0 { ...@@ -32,18 +32,16 @@ cpu0: cpu@0 {
next-level-cache = <&L2_CA15>; next-level-cache = <&L2_CA15>;
}; };
L2_CA15: cache-controller@0 { L2_CA15: cache-controller-0 {
compatible = "cache"; compatible = "cache";
reg = <0>;
clocks = <&cpg_clocks R8A73A4_CLK_Z>; clocks = <&cpg_clocks R8A73A4_CLK_Z>;
power-domains = <&pd_a3sm>; power-domains = <&pd_a3sm>;
cache-unified; cache-unified;
cache-level = <2>; cache-level = <2>;
}; };
L2_CA7: cache-controller@100 { L2_CA7: cache-controller-1 {
compatible = "cache"; compatible = "cache";
reg = <0x100>;
clocks = <&cpg_clocks R8A73A4_CLK_Z2>; clocks = <&cpg_clocks R8A73A4_CLK_Z2>;
power-domains = <&pd_a3km>; power-domains = <&pd_a3km>;
cache-unified; cache-unified;
......
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