Commit d0ac249b authored by Rob Radez's avatar Rob Radez Committed by David S. Miller

Sparc32 code cleanups from 2.4.x.

parent a9907091
......@@ -22,8 +22,8 @@ extern void cpu_probe(void);
extern void clock_stop_probe(void); /* tadpole.c */
extern void sun4c_probe_memerr_reg(void);
unsigned long __init
device_scan(unsigned long mem_start)
void __init
device_scan(void)
{
char node_str[128];
int thismid;
......@@ -37,46 +37,45 @@ device_scan(unsigned long mem_start)
int scan;
scan = prom_getchild(prom_root_node);
/* One can look it up in PROM instead */
/* prom_printf("root child is %08lx\n", (unsigned long) scan); */
while((scan = prom_getsibling(scan)) != 0) {
prom_getstring(scan, "device_type", node_str, sizeof(node_str));
if(strcmp(node_str, "cpu") == 0) {
while ((scan = prom_getsibling(scan)) != 0) {
prom_getstring(scan, "device_type",
node_str, sizeof(node_str));
if (strcmp(node_str, "cpu") == 0) {
linux_cpus[linux_num_cpus].prom_node = scan;
prom_getproperty(scan, "mid", (char *) &thismid, sizeof(thismid));
prom_getproperty(scan, "mid",
(char *) &thismid, sizeof(thismid));
linux_cpus[linux_num_cpus].mid = thismid;
/* prom_printf("Found CPU %d <node=%08lx,mid=%d>\n", linux_num_cpus, (unsigned long) scan, thismid); */
printk("Found CPU %d <node=%08lx,mid=%d>\n", linux_num_cpus, (unsigned long) scan, thismid);
printk("Found CPU %d <node=%08lx,mid=%d>\n",
linux_num_cpus, (unsigned long) scan, thismid);
linux_num_cpus++;
}
}
if(linux_num_cpus == 0) {
if (sparc_cpu_model == sun4d) {
scan = prom_getchild(prom_root_node);
for (scan = prom_searchsiblings(scan, "cpu-unit"); scan;
scan = prom_searchsiblings(prom_getsibling(scan), "cpu-unit")) {
int node = prom_getchild(scan);
if (linux_num_cpus == 0 && sparc_cpu_model == sun4d) {
scan = prom_getchild(prom_root_node);
for (scan = prom_searchsiblings(scan, "cpu-unit"); scan;
scan = prom_searchsiblings(prom_getsibling(scan), "cpu-unit")) {
int node = prom_getchild(scan);
prom_getstring(node, "device_type", node_str, sizeof(node_str));
if (strcmp(node_str, "cpu") == 0) {
prom_getproperty(node, "cpu-id", (char *) &thismid, sizeof(thismid));
linux_cpus[linux_num_cpus].prom_node = node;
linux_cpus[linux_num_cpus].mid = thismid;
/* prom_printf("Found CPU %d <node=%08lx,mid=%d>\n",
linux_num_cpus, (unsigned long) node, thismid); */
printk("Found CPU %d <node=%08lx,mid=%d>\n",
linux_num_cpus, (unsigned long) node, thismid);
linux_num_cpus++;
}
prom_getstring(node, "device_type",
node_str, sizeof(node_str));
if (strcmp(node_str, "cpu") == 0) {
prom_getproperty(node, "cpu-id",
(char *) &thismid, sizeof(thismid));
linux_cpus[linux_num_cpus].prom_node = node;
linux_cpus[linux_num_cpus].mid = thismid;
printk("Found CPU %d <node=%08lx,mid=%d>\n",
linux_num_cpus, (unsigned long) node, thismid);
linux_num_cpus++;
}
}
}
if(linux_num_cpus == 0) {
if (linux_num_cpus == 0) {
printk("No CPU nodes found, cannot continue.\n");
/* Probably a sun4e, Sun is trying to trick us ;-) */
halt();
}
printk("Found %d CPU prom device tree node(s).\n", linux_num_cpus);
};
}
cpu_probe();
#ifdef CONFIG_SUN_AUXIO
......@@ -92,5 +91,5 @@ device_scan(unsigned long mem_start)
if (ARCH_SUN4C_SUN4)
sun4c_probe_memerr_reg();
return mem_start;
return;
}
This diff is collapsed.
......@@ -16,7 +16,22 @@ extern unsigned int ___illegal_use_of_BTFIXUP_SIMM13_in_module(void);
extern unsigned int ___illegal_use_of_BTFIXUP_SETHI_in_module(void);
extern unsigned int ___illegal_use_of_BTFIXUP_HALF_in_module(void);
extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);
#endif
#define BTFIXUP_SIMM13(__name) ___illegal_use_of_BTFIXUP_SIMM13_in_module()
#define BTFIXUP_HALF(__name) ___illegal_use_of_BTFIXUP_HALF_in_module()
#define BTFIXUP_SETHI(__name) ___illegal_use_of_BTFIXUP_SETHI_in_module()
#define BTFIXUP_INT(__name) ___illegal_use_of_BTFIXUP_INT_in_module()
#define BTFIXUP_BLACKBOX(__name) ___illegal_use_of_BTFIXUP_BLACKBOX_in_module
#else
#define BTFIXUP_SIMM13(__name) ___sf_##__name()
#define BTFIXUP_HALF(__name) ___af_##__name()
#define BTFIXUP_SETHI(__name) ___hf_##__name()
#define BTFIXUP_INT(__name) ((unsigned int)&___i_##__name)
/* This must be written in assembly and present in a sethi */
#define BTFIXUP_BLACKBOX(__name) ___b_##__name
#endif /* MODULE */
/* Fixup call xx */
......@@ -30,12 +45,6 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);
#define BTFIXUPDEF_BLACKBOX(__name) \
extern unsigned ___bs_##__name[2];
#ifdef MODULE
#define BTFIXUP_BLACKBOX(__name) ___illegal_use_of_BTFIXUP_BLACKBOX_in_module
#else
/* This must be written in assembly and present in a sethi */
#define BTFIXUP_BLACKBOX(__name) ___b_##__name
#endif
/* Put bottom 13bits into some register variable */
......@@ -55,11 +64,6 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);
__asm__ ("or %%g0, ___s_" #__name "__btset_" #__val ", %0" : "=r"(ret));\
return ret; \
}
#ifdef MODULE
#define BTFIXUP_SIMM13(__name) ___illegal_use_of_BTFIXUP_SIMM13_in_module()
#else
#define BTFIXUP_SIMM13(__name) ___sf_##__name()
#endif
/* Put either bottom 13 bits, or upper 22 bits into some register variable
* (depending on the value, this will lead into sethi FIX, reg; or
......@@ -82,11 +86,6 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);
__asm__ ("or %%g0, ___a_" #__name "__btset_" #__val ", %0" : "=r"(ret));\
return ret; \
}
#ifdef MODULE
#define BTFIXUP_HALF(__name) ___illegal_use_of_BTFIXUP_HALF_in_module()
#else
#define BTFIXUP_HALF(__name) ___af_##__name()
#endif
/* Put upper 22 bits into some register variable */
......@@ -107,22 +106,12 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);
"=r"(ret)); \
return ret; \
}
#ifdef MODULE
#define BTFIXUP_SETHI(__name) ___illegal_use_of_BTFIXUP_SETHI_in_module()
#else
#define BTFIXUP_SETHI(__name) ___hf_##__name()
#endif
/* Put a full 32bit integer into some register variable */
#define BTFIXUPDEF_INT(__name) \
extern unsigned char ___i_##__name; \
extern unsigned ___is_##__name[2];
#ifdef MODULE
#define BTFIXUP_INT(__name) ___illegal_use_of_BTFIXUP_INT_in_module()
#else
#define BTFIXUP_INT(__name) ((unsigned int)&___i_##__name)
#endif
#define BTFIXUPCALL_NORM 0x00000000 /* Always call */
#define BTFIXUPCALL_NOP 0x01000000 /* Possibly optimize to nop */
......
/* $Id: ultra.h,v 1.2 1995/11/25 02:33:10 davem Exp $
* ultra.h: Definitions and defines for the TI V9 UltraSparc.
*
* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
*/
#ifndef _SPARC_ULTRA_H
#define _SPARC_ULTRA_H
/* Spitfire MMU control register:
*
* ----------------------------------------------------------
* | | IMPL | VERS | | MID | |
* ----------------------------------------------------------
* 64 31-28 27-24 23-22 21-17 16 0
*
* IMPL: Implementation of this Spitfire.
* VERS: Version of this Spitfire.
* MID: Module ID of this processor.
*/
#define SPITFIRE_MIDMASK 0x00000000003e0000
/* Spitfire Load Store Unit control register:
*
* ---------------------------------------------------------------------
* | RSV | PWR | PWW | VWR | VWW | RSV | PMASK | DME | IME | DCE | ICE |
* ---------------------------------------------------------------------
* 63-25 24 23 22 21 20 19-4 3 2 1 0
*
* PWR: Physical Watchpoint Read enable: 0=off 1=on
* PWW: Physical Watchpoint Write enable: 0=off 1=on
* VWR: Virtual Watchpoint Read enable: 0=off 1=on
* VWW: Virtual Watchpoint Write enable: 0=off 1=on
* PMASK: Parity MASK ???
* DME: Data MMU Enable: 0=off 1=on
* IME: Instruction MMU Enable: 0=off 1=on
* DCE: Data Cache Enable: 0=off 1=on
* ICE: Instruction Cache Enable: 0=off 1=on
*/
#define SPITFIRE_LSU_PWR 0x01000000
#define SPITFIRE_LSU_PWW 0x00800000
#define SPITFIRE_LSU_VWR 0x00400000
#define SPITFIRE_LSU_VWW 0x00200000
#define SPITFIRE_LSU_PMASK 0x000ffff0
#define SPITFIRE_LSU_DME 0x00000008
#define SPITFIRE_LSU_IME 0x00000004
#define SPITFIRE_LSU_DCE 0x00000002
#define SPITFIRE_LSU_ICE 0x00000001
#endif /* !(_SPARC_ULTRA_H) */
......@@ -107,8 +107,6 @@ struct sun4c_vac_props {
extern struct sun4c_vac_props sun4c_vacinfo;
extern void sun4c_flush_all(void);
/* sun4c_enable_vac() enables the sun4c virtual address cache. */
extern __inline__ void sun4c_enable_vac(void)
{
......
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