Commit d0d76d57 authored by Linus Walleij's avatar Linus Walleij Committed by Daniel Lezcano

clocksource/drivers/fttmr010: Switch to use bitops

This switches the drivers to use the bitops BIT() macro
to define bits.

Cc: Joel Stanley <joel@jms.id.au>
Tested-by: default avatarJonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
parent e7bad212
...@@ -16,6 +16,7 @@ ...@@ -16,6 +16,7 @@
#include <linux/sched_clock.h> #include <linux/sched_clock.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/slab.h> #include <linux/slab.h>
#include <linux/bitops.h>
/* /*
* Register definitions for the timers * Register definitions for the timers
...@@ -36,31 +37,31 @@ ...@@ -36,31 +37,31 @@
#define TIMER_INTR_STATE (0x34) #define TIMER_INTR_STATE (0x34)
#define TIMER_INTR_MASK (0x38) #define TIMER_INTR_MASK (0x38)
#define TIMER_1_CR_ENABLE (1 << 0) #define TIMER_1_CR_ENABLE BIT(0)
#define TIMER_1_CR_CLOCK (1 << 1) #define TIMER_1_CR_CLOCK BIT(1)
#define TIMER_1_CR_INT (1 << 2) #define TIMER_1_CR_INT BIT(2)
#define TIMER_2_CR_ENABLE (1 << 3) #define TIMER_2_CR_ENABLE BIT(3)
#define TIMER_2_CR_CLOCK (1 << 4) #define TIMER_2_CR_CLOCK BIT(4)
#define TIMER_2_CR_INT (1 << 5) #define TIMER_2_CR_INT BIT(5)
#define TIMER_3_CR_ENABLE (1 << 6) #define TIMER_3_CR_ENABLE BIT(6)
#define TIMER_3_CR_CLOCK (1 << 7) #define TIMER_3_CR_CLOCK BIT(7)
#define TIMER_3_CR_INT (1 << 8) #define TIMER_3_CR_INT BIT(8)
#define TIMER_1_CR_UPDOWN (1 << 9) #define TIMER_1_CR_UPDOWN BIT(9)
#define TIMER_2_CR_UPDOWN (1 << 10) #define TIMER_2_CR_UPDOWN BIT(10)
#define TIMER_3_CR_UPDOWN (1 << 11) #define TIMER_3_CR_UPDOWN BIT(11)
#define TIMER_DEFAULT_FLAGS (TIMER_1_CR_UPDOWN | \ #define TIMER_DEFAULT_FLAGS (TIMER_1_CR_UPDOWN | \
TIMER_3_CR_ENABLE | \ TIMER_3_CR_ENABLE | \
TIMER_3_CR_UPDOWN) TIMER_3_CR_UPDOWN)
#define TIMER_1_INT_MATCH1 (1 << 0) #define TIMER_1_INT_MATCH1 BIT(0)
#define TIMER_1_INT_MATCH2 (1 << 1) #define TIMER_1_INT_MATCH2 BIT(1)
#define TIMER_1_INT_OVERFLOW (1 << 2) #define TIMER_1_INT_OVERFLOW BIT(2)
#define TIMER_2_INT_MATCH1 (1 << 3) #define TIMER_2_INT_MATCH1 BIT(3)
#define TIMER_2_INT_MATCH2 (1 << 4) #define TIMER_2_INT_MATCH2 BIT(4)
#define TIMER_2_INT_OVERFLOW (1 << 5) #define TIMER_2_INT_OVERFLOW BIT(5)
#define TIMER_3_INT_MATCH1 (1 << 6) #define TIMER_3_INT_MATCH1 BIT(6)
#define TIMER_3_INT_MATCH2 (1 << 7) #define TIMER_3_INT_MATCH2 BIT(7)
#define TIMER_3_INT_OVERFLOW (1 << 8) #define TIMER_3_INT_OVERFLOW BIT(8)
#define TIMER_INT_ALL_MASK 0x1ff #define TIMER_INT_ALL_MASK 0x1ff
struct fttmr010 { struct fttmr010 {
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment