Commit d14f6f40 authored by Bartosz Golaszewski's avatar Bartosz Golaszewski

gpio: davinci: use devm_clk_get_enabled()

Simplify the code in error paths by using the managed variant of the
clock getter that controls the clock state as well.
Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20240819151705.37258-2-brgl@bgdev.plSigned-off-by: default avatarBartosz Golaszewski <bartosz.golaszewski@linaro.org>
parent d29e741c
......@@ -446,7 +446,6 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
{
unsigned gpio, bank;
int irq;
int ret;
struct clk *clk;
u32 binten = 0;
unsigned ngpio;
......@@ -467,21 +466,16 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
ngpio = chips->chip.ngpio;
clk = devm_clk_get(dev, "gpio");
clk = devm_clk_get_enabled(dev, "gpio");
if (IS_ERR(clk)) {
dev_err(dev, "Error %ld getting gpio clock\n", PTR_ERR(clk));
return PTR_ERR(clk);
}
ret = clk_prepare_enable(clk);
if (ret)
return ret;
if (chips->gpio_unbanked) {
irq = devm_irq_alloc_descs(dev, -1, 0, ngpio, 0);
if (irq < 0) {
dev_err(dev, "Couldn't allocate IRQ numbers\n");
clk_disable_unprepare(clk);
return irq;
}
......@@ -490,7 +484,6 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
chips);
if (!irq_domain) {
dev_err(dev, "Couldn't register an IRQ domain\n");
clk_disable_unprepare(clk);
return -ENODEV;
}
}
......@@ -559,10 +552,8 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
sizeof(struct
davinci_gpio_irq_data),
GFP_KERNEL);
if (!irqdata) {
clk_disable_unprepare(clk);
if (!irqdata)
return -ENOMEM;
}
irqdata->regs = g;
irqdata->bank_num = bank;
......
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