Commit d42f157b authored by Tobias Klauser's avatar Tobias Klauser Committed by David S. Miller

Altera TSE: Remove unnecessary cast of void pointers

No need to cast void pointers.
Signed-off-by: default avatarTobias Klauser <tklauser@distanz.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent f01ec1c0
......@@ -32,10 +32,8 @@ void msgdma_uninitialize(struct altera_tse_private *priv)
void msgdma_reset(struct altera_tse_private *priv)
{
int counter;
struct msgdma_csr *txcsr =
(struct msgdma_csr *)priv->tx_dma_csr;
struct msgdma_csr *rxcsr =
(struct msgdma_csr *)priv->rx_dma_csr;
struct msgdma_csr *txcsr = priv->tx_dma_csr;
struct msgdma_csr *rxcsr = priv->rx_dma_csr;
/* Reset Rx mSGDMA */
iowrite32(MSGDMA_CSR_STAT_MASK, &rxcsr->status);
......@@ -133,8 +131,7 @@ u32 msgdma_tx_completions(struct altera_tse_private *priv)
u32 ready = 0;
u32 inuse;
u32 status;
struct msgdma_csr *txcsr =
(struct msgdma_csr *)priv->tx_dma_csr;
struct msgdma_csr *txcsr = priv->tx_dma_csr;
/* Get number of sent descriptors */
inuse = ioread32(&txcsr->rw_fill_level) & 0xffff;
......@@ -186,10 +183,8 @@ u32 msgdma_rx_status(struct altera_tse_private *priv)
u32 rxstatus = 0;
u32 pktlength;
u32 pktstatus;
struct msgdma_csr *rxcsr =
(struct msgdma_csr *)priv->rx_dma_csr;
struct msgdma_response *rxresp =
(struct msgdma_response *)priv->rx_dma_resp;
struct msgdma_csr *rxcsr = priv->rx_dma_csr;
struct msgdma_response *rxresp = priv->rx_dma_resp;
if (ioread32(&rxcsr->resp_fill_level) & 0xffff) {
pktlength = ioread32(&rxresp->bytes_transferred);
......
......@@ -112,12 +112,12 @@ void sgdma_uninitialize(struct altera_tse_private *priv)
*/
void sgdma_reset(struct altera_tse_private *priv)
{
u32 *ptxdescripmem = (u32 *)priv->tx_dma_desc;
u32 *ptxdescripmem = priv->tx_dma_desc;
u32 txdescriplen = priv->txdescmem;
u32 *prxdescripmem = (u32 *)priv->rx_dma_desc;
u32 *prxdescripmem = priv->rx_dma_desc;
u32 rxdescriplen = priv->rxdescmem;
struct sgdma_csr *ptxsgdma = (struct sgdma_csr *)priv->tx_dma_csr;
struct sgdma_csr *prxsgdma = (struct sgdma_csr *)priv->rx_dma_csr;
struct sgdma_csr *ptxsgdma = priv->tx_dma_csr;
struct sgdma_csr *prxsgdma = priv->rx_dma_csr;
/* Initialize descriptor memory to 0 */
memset(ptxdescripmem, 0, txdescriplen);
......@@ -132,14 +132,14 @@ void sgdma_reset(struct altera_tse_private *priv)
void sgdma_enable_rxirq(struct altera_tse_private *priv)
{
struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr;
struct sgdma_csr *csr = priv->rx_dma_csr;
priv->rxctrlreg |= SGDMA_CTRLREG_INTEN;
tse_set_bit(&csr->control, SGDMA_CTRLREG_INTEN);
}
void sgdma_enable_txirq(struct altera_tse_private *priv)
{
struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr;
struct sgdma_csr *csr = priv->tx_dma_csr;
priv->txctrlreg |= SGDMA_CTRLREG_INTEN;
tse_set_bit(&csr->control, SGDMA_CTRLREG_INTEN);
}
......@@ -156,13 +156,13 @@ void sgdma_disable_txirq(struct altera_tse_private *priv)
void sgdma_clear_rxirq(struct altera_tse_private *priv)
{
struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr;
struct sgdma_csr *csr = priv->rx_dma_csr;
tse_set_bit(&csr->control, SGDMA_CTRLREG_CLRINT);
}
void sgdma_clear_txirq(struct altera_tse_private *priv)
{
struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr;
struct sgdma_csr *csr = priv->tx_dma_csr;
tse_set_bit(&csr->control, SGDMA_CTRLREG_CLRINT);
}
......@@ -174,8 +174,7 @@ void sgdma_clear_txirq(struct altera_tse_private *priv)
int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer)
{
int pktstx = 0;
struct sgdma_descrip *descbase =
(struct sgdma_descrip *)priv->tx_dma_desc;
struct sgdma_descrip *descbase = priv->tx_dma_desc;
struct sgdma_descrip *cdesc = &descbase[0];
struct sgdma_descrip *ndesc = &descbase[1];
......@@ -208,7 +207,7 @@ int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer)
u32 sgdma_tx_completions(struct altera_tse_private *priv)
{
u32 ready = 0;
struct sgdma_descrip *desc = (struct sgdma_descrip *)priv->tx_dma_desc;
struct sgdma_descrip *desc = priv->tx_dma_desc;
if (!sgdma_txbusy(priv) &&
((desc->control & SGDMA_CONTROL_HW_OWNED) == 0) &&
......@@ -231,8 +230,8 @@ int sgdma_add_rx_desc(struct altera_tse_private *priv,
*/
u32 sgdma_rx_status(struct altera_tse_private *priv)
{
struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr;
struct sgdma_descrip *base = (struct sgdma_descrip *)priv->rx_dma_desc;
struct sgdma_csr *csr = priv->rx_dma_csr;
struct sgdma_descrip *base = priv->rx_dma_desc;
struct sgdma_descrip *desc = NULL;
int pktsrx;
unsigned int rxstatus = 0;
......@@ -312,10 +311,8 @@ static void sgdma_descrip(struct sgdma_descrip *desc,
*/
static int sgdma_async_read(struct altera_tse_private *priv)
{
struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr;
struct sgdma_descrip *descbase =
(struct sgdma_descrip *)priv->rx_dma_desc;
struct sgdma_csr *csr = priv->rx_dma_csr;
struct sgdma_descrip *descbase = priv->rx_dma_desc;
struct sgdma_descrip *cdesc = &descbase[0];
struct sgdma_descrip *ndesc = &descbase[1];
......@@ -364,7 +361,7 @@ static int sgdma_async_read(struct altera_tse_private *priv)
static int sgdma_async_write(struct altera_tse_private *priv,
struct sgdma_descrip *desc)
{
struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr;
struct sgdma_csr *csr = priv->tx_dma_csr;
if (sgdma_txbusy(priv))
return 0;
......@@ -485,7 +482,7 @@ queue_rx_peekhead(struct altera_tse_private *priv)
*/
static int sgdma_rxbusy(struct altera_tse_private *priv)
{
struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr;
struct sgdma_csr *csr = priv->rx_dma_csr;
return ioread32(&csr->status) & SGDMA_STSREG_BUSY;
}
......@@ -495,7 +492,7 @@ static int sgdma_rxbusy(struct altera_tse_private *priv)
static int sgdma_txbusy(struct altera_tse_private *priv)
{
int delay = 0;
struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr;
struct sgdma_csr *csr = priv->tx_dma_csr;
/* if DMA is busy, wait for current transactino to finish */
while ((ioread32(&csr->status) & SGDMA_STSREG_BUSY) && (delay++ < 100))
......
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