Commit d4da6773 authored by Ralf Bächle's avatar Ralf Bächle Committed by Linus Torvalds

[PATCH] Baget update

This is an update for the Russian Baget industrial controller.  Suffers a
bit from bitrot, the authors have promised an update to me.
parent a16b2ff6
......@@ -4,10 +4,11 @@
#
obj-y := baget.o print.o setup.o time.o irq.o bagetIRQ.o \
reset.o wbflush.o
obj-$(CONFIG_SERIAL) += vacserial.o
reset.o
obj-$(CONFIG_VAC_RTC) += vacrtc.o
EXTRA_AFLAGS := $(CFLAGS)
bagetIRQ.o : bagetIRQ.S
$(CC) $(CFLAGS) -c -o $@ $<
......@@ -28,7 +29,7 @@ dummy.c:
dummy.o: dummy.c image.bin ramdisk.bin
$(CC) $(CFLAGS) -c -o $@ $<
$(OBJCOPY) --add-section=.vmlinux=image.bin \
--add-section=.ramdisk=ramdisk.bin $@
--add-section=.ramdisk=ramdisk.bin $@
balo.h: image
$(NM) $< | awk ' \
......@@ -39,13 +40,13 @@ balo.h: image
/balo_ramdisk_size/ { printf "#define RAMDISK_SIZE 0x%s\n", $$1 } \
' > $@
balo.o: balo.c balo.h
$(CC) $(CFLAGS) -c $<
$(CC) $(CFLAGS) -c $<
balo_supp.o: balo_supp.S
$(CC) $(CFLAGS) -c $<
balo: balo.o dummy.o balo_supp.o print.o
$(LD) $(LDFLAGS) -T ld.script.balo -o $@ $^
$(LD) $(LDFLAGS) -T ld.script.balo -o $@ $^
clean:
rm -f balo balo.h dummy.c image image.bin
......
/* $Id: baget.c,v 1.1 1999/01/17 03:49:37 ralf Exp $
*
/*
* baget.c: Baget low level stuff
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
......@@ -21,7 +20,7 @@
* Following code is based on routines from 'mm/vmalloc.c'
* Additional parameters ioaddr is needed to iterate across real I/O address.
*/
static inline int alloc_area_pte(pte_t * pte, unsigned long address,
static inline int alloc_area_pte(pte_t * pte, unsigned long address,
unsigned long size, unsigned long ioaddr)
{
unsigned long end;
......@@ -36,7 +35,7 @@ static inline int alloc_area_pte(pte_t * pte, unsigned long address,
printk("kseg2_alloc_io: page already exists\n");
/*
* For MIPS looks pretty to have transparent mapping
* for KSEG2 areas -- user can't access one, and no
* for KSEG2 areas -- user can't access one, and no
* problems with virtual <--> physical translation.
*/
page = ioaddr & PAGE_MASK;
......@@ -50,7 +49,7 @@ static inline int alloc_area_pte(pte_t * pte, unsigned long address,
return 0;
}
static inline int alloc_area_pmd(pmd_t * pmd, unsigned long address,
static inline int alloc_area_pmd(pmd_t * pmd, unsigned long address,
unsigned long size, unsigned long ioaddr)
{
unsigned long end;
......
/* $Id: bagetIRQ.S,v 1.1 1999/01/17 03:49:37 ralf Exp $
/*
* bagetIRQ.S: Interrupt exception dispatch code for Baget/MIPS
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*/
#include <asm/asm.h>
#include <asm/mipsregs.h>
#include <asm/regdef.h>
......@@ -25,28 +24,28 @@ NESTED(bagetIRQ, PT_SIZE, sp)
.set push
.set noreorder
jal a1
.set pop
move a0, sp
.set pop
move a0, sp
la a1, ret_from_irq
jr a1
END(bagetIRQ)
#define DBE_HANDLER 0x1C
NESTED(try_read, PT_SIZE, sp)
mfc0 t3, CP0_STATUS # save flags and
CLI # disable interrupts
li t0, KSEG2
sltu t1, t0, a0 # Is it KSEG2 address ?
beqz t1, mapped # No - already mapped !
move t0, a0
sltu t1, t0, a0 # Is it KSEG2 address ?
beqz t1, mapped # No - already mapped !
move t0, a0
ori t0, 0xfff
xori t0, 0xfff # round address to page
ori t1, t0, 0xf00 # prepare EntryLo (N,V,D,G)
ori t1, t0, 0xf00 # prepare EntryLo (N,V,D,G)
mfc0 t2, CP0_ENTRYHI # save ASID value
mtc0 zero, CP0_INDEX
......@@ -57,15 +56,15 @@ NESTED(try_read, PT_SIZE, sp)
tlbwi # ... and write ones
nop
nop
mtc0 t2, CP0_ENTRYHI
mapped:
mtc0 t2, CP0_ENTRYHI
mapped:
la t0, exception_handlers
lw t1, DBE_HANDLER(t0) # save real handler
la t2, dbe_handler
la t2, dbe_handler
sw t2, DBE_HANDLER(t0) # set temporary local handler
li v0, -1 # default (failure) value
li t2, 1
beq t2, a1, 1f
li t2, 2
......@@ -81,13 +80,13 @@ mapped:
b out
4: lw v0, (a0) # word
out:
out:
sw t1, DBE_HANDLER(t0) # restore real handler
mtc0 t3, CP0_STATUS # restore CPU flags
jr ra
dbe_handler:
jr ra
dbe_handler:
li v0, -1 # mark our failure
.set push
.set noreorder
......
/* $Id$
*
/*
* balo.c: BAget LOader
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*
*/
#include <linux/kernel.h>
#include <asm/system.h>
......@@ -18,7 +16,7 @@ static char *banner = "\nBaget Linux Loader v0.2\n";
static void mem_move (long *to, long *from, long size)
{
while (size > 0) {
while (size > 0) {
*to++ = *from++;
size -= sizeof(long);
}
......@@ -42,27 +40,29 @@ static volatile enum balo_state_enum {
static __inline__ void reset_and_jump(int start, int mem_upper)
{
unsigned long tmp;
__asm__ __volatile__(
".set\tnoreorder\n\t"
".set\tnoat\n\t"
"mfc0\t$1,$12\n\t"
"mfc0\t$1, $12\n\t"
"nop\n\t"
"nop\n\t"
"nop\n\t"
"ori\t$1,$1,0xff00\n\t"
"xori\t$1,$1,0xff00\n\t"
"mtc0\t$1,$12\n\t"
"ori\t$1, $1, 0xff00\n\t"
"xori\t$1, $1, 0xff00\n\t"
"mtc0\t$1, $12\n\t"
"nop\n\t"
"nop\n\t"
"nop\n\t"
"move\t$4,%1\n\t"
"jr\t%0\n\t"
"move\t%0, %2\n\t"
"jr\t%1\n\t"
"nop\n\t"
".set\tat\n\t"
".set\treorder"
: /* no outputs */
:"Ir" (start), "Ir" (mem_upper)
:"$1", "$4", "memory");
".set\treorder"
: "=&r" (tmp)
: "Ir" (start), "Ir" (mem_upper)
: "memory");
}
static void start_kernel(void)
......@@ -71,7 +71,7 @@ static void start_kernel(void)
extern char _ramdisk_start, _ramdisk_end;
outs( "Relocating Linux... " );
mem_move((long*)KSEG0, (long*)&_vmlinux_start,
mem_move((long*)KSEG0, (long*)&_vmlinux_start,
&_vmlinux_end-&_vmlinux_start);
outs("done.\n");
......@@ -86,7 +86,7 @@ static void start_kernel(void)
outs("done.\n");
}
{
{
extern void flush_cache_low(int isize, int dsize);
flush_cache_low(256*1024,256*1024);
}
......@@ -102,10 +102,10 @@ static void mem_probe(void)
balo_state = MEM_PROBE;
outs("RAM: <");
while(mem_limit < mem_limit_dbe) {
if (can_write(mem_limit) && *mem_limit != 0)
if (can_write(mem_limit) && *mem_limit != 0)
break; /* cycle found */
outc('.');
if (can_write(mem_limit))
if (can_write(mem_limit))
*mem_limit = -1; /* mark */
mem_limit += 0x40000;
}
......@@ -124,7 +124,7 @@ static void print_regs(void)
}
void int_handler(struct pt_regs *regs)
{
{
switch (balo_state) {
case BALO_INIT:
balo_printf("\nBALO: trap in balo itself.\n");
......@@ -162,7 +162,7 @@ static void mem_init(void)
while(1) {
*mem_limit_dbe;
if (can_write(mem_limit_dbe))
if (can_write(mem_limit_dbe))
*mem_limit_dbe = 0;
mem_limit_dbe += 0x40000; /* +1M */
......@@ -174,7 +174,7 @@ void balo_entry(void)
{
extern void except_vec3_generic(void);
cli();
cli();
outs(banner);
memcpy((void *)(KSEG0 + 0x80), &except_vec3_generic, 0x80);
mem_init();
......
/* $Id: balo_supp.S,v 1.1 1999/01/17 03:49:38 ralf Exp $
/*
* balo_supp.S: BAget Loader supplement
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*/
#include <asm/asm.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
#include <asm/mipsregs.h>
#include <asm/addrspace.h>
.text
.set mips1
/* General exception vector. */
NESTED(except_vec3_generic, 0, sp)
.set noat
......@@ -21,7 +20,7 @@ NESTED(except_vec3_generic, 0, sp)
END(except_vec3_generic)
NESTED(except_vec3_generic_code, 0, sp)
SAVE_ALL
SAVE_ALL
mfc0 k1, CP0_CAUSE
la k0, int_cause
sw k1, (k0)
......@@ -34,7 +33,7 @@ NESTED(except_vec3_generic_code, 0, sp)
la k0, badvaddr
sw k1, (k0)
la k0, int_handler
la k0, int_handler
.set noreorder
jal k0
.set reorder
......@@ -48,7 +47,7 @@ NESTED(flush_cache_low, PT_SIZE, sp)
.set at
.set macro
.set noreorder
move t1, a0 # ISIZE
move t2, a1 # DSIZE
......@@ -89,7 +88,7 @@ NESTED(flush_cache_low, PT_SIZE, sp)
sb zero, -8(t0)
bne t0, t1, 1b
sb zero, -4(t0)
la v0, 1f
or v0, KSEG1
j v0 # Run uncached
......
......@@ -17,7 +17,6 @@
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/delay.h>
#include <linux/seq_file.h>
#include <asm/bitops.h>
#include <asm/bootinfo.h>
......@@ -28,24 +27,24 @@
#include <asm/baget/baget.h>
unsigned long spurious_count = 0;
volatile unsigned long irq_err_count;
/*
* This table is a correspondence between IRQ numbers and CPU PILs
*/
static int irq_to_pil_map[BAGET_IRQ_NR] = {
static int irq_to_pil_map[BAGET_IRQ_NR] = {
7/*fixme: dma_err -1*/,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1, /* 0x00 - 0x0f */
-1,-1,-1,-1, 3,-1,-1,-1, 2, 2, 2,-1, 3,-1,-1,3/*fixme: lance*/, /* 0x10 - 0x1f */
-1,-1,-1,-1,-1,-1, 5,-1,-1,-1,-1,-1, 7,-1,-1,-1, /* 0x20 - 0x2f */
-1, 3, 2/*fixme systimer:3*/, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 /* 0x30 - 0x3f */
};
static inline int irq_to_pil(int irq_nr)
static inline int irq_to_pil(int irq_nr)
{
int pil = -1;
if (irq_nr >= BAGET_IRQ_NR)
if (irq_nr >= BAGET_IRQ_NR)
baget_printk("irq_to_pil: too large irq_nr = 0x%x\n", irq_nr);
else {
pil = irq_to_pil_map[irq_nr];
......@@ -60,13 +59,13 @@ static inline int irq_to_pil(int irq_nr)
static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask)
{
unsigned long status = read_32bit_cp0_register(CP0_STATUS);
unsigned long status = read_c0_status();
status &= ~((clr_mask & 0xFF) << 8);
status |= (set_mask & 0xFF) << 8;
write_32bit_cp0_register(CP0_STATUS, status);
write_c0_status(status);
}
/*
/*
* These two functions may be used for unconditional IRQ
* masking via their PIL protection.
*/
......@@ -92,26 +91,26 @@ static inline void unmask_irq(unsigned int irq_nr)
static volatile unsigned int pil_in_use[BAGET_PIL_NR] = { 0, };
void mask_irq_count(int irq_nr)
void mask_irq_count(int irq_nr)
{
unsigned long flags;
int pil = irq_to_pil(irq_nr);
save_and_cli(flags);
local_irq_save(flags);
if (!--pil_in_use[pil])
mask_irq(irq_nr);
restore_flags(flags);
local_irq_restore(flags);
}
void unmask_irq_count(int irq_nr)
void unmask_irq_count(int irq_nr)
{
unsigned long flags;
int pil = irq_to_pil(irq_nr);
save_and_cli(flags);
local_irq_save(flags);
if (!pil_in_use[pil]++)
unmask_irq(irq_nr);
restore_flags(flags);
local_irq_restore(flags);
}
/*
......@@ -122,18 +121,18 @@ void disable_irq(unsigned int irq_nr)
{
unsigned long flags;
save_and_cli(flags);
local_irq_save(flags);
mask_irq(irq_nr);
restore_flags(flags);
local_irq_restore(flags);
}
void enable_irq(unsigned int irq_nr)
{
unsigned long flags;
save_and_cli(flags);
local_irq_save(flags);
unmask_irq(irq_nr);
restore_flags(flags);
local_irq_restore(flags);
}
/*
......@@ -142,31 +141,31 @@ void enable_irq(unsigned int irq_nr)
*/
static struct irqaction *irq_action[BAGET_IRQ_NR] = { NULL, };
int show_interrupts(struct seq_file *p, void *v)
int get_irq_list(char *buf)
{
int i;
int i, len = 0;
struct irqaction * action;
unsigned long flags;
for (i = 0 ; i < BAGET_IRQ_NR ; i++) {
local_irq_save(flags);
action = irq_action[i];
if (!action)
goto skip;
seq_printf(p, "%2d: %8d %c %s",
if (!action)
gotos skip;
len += sprintf(buf+len, "%2d: %8d %c %s",
i, kstat_cpu(0).irqs[i],
(action->flags & SA_INTERRUPT) ? '+' : ' ',
action->name);
for (action=action->next; action; action = action->next) {
seq_printf(p, ",%s %s",
len += sprintf(buf+len, ",%s %s",
(action->flags & SA_INTERRUPT) ? " +" : "",
action->name);
}
seq_putc(p, '\n');
len += sprintf(buf+len, "\n");
skip:
local_irq_restore(flags);
}
return 0;
return len;
}
......@@ -183,10 +182,10 @@ static void do_IRQ(int irq, struct pt_regs * regs)
int do_random, cpu;
cpu = smp_processor_id();
irq_enter(cpu, irq);
kstat_cpu(cpu).irqs[irq]++;
irq_enter();
kstat_cpus(cpu)[irq]++;
mask_irq(irq);
mask_irq(irq);
action = *(irq + irq_action);
if (action) {
if (!(action->flags & SA_INTERRUPT))
......@@ -205,7 +204,7 @@ static void do_IRQ(int irq, struct pt_regs * regs)
printk("do_IRQ: Unregistered IRQ (0x%X) occurred\n", irq);
}
unmask_irq(irq);
irq_exit(cpu, irq);
irq_exit();
/* unmasking and bottom half handling is done magically for us. */
}
......@@ -213,14 +212,14 @@ static void do_IRQ(int irq, struct pt_regs * regs)
/*
* What to do in case of 'no VIC register available' for current interrupt
*/
static void vic_reg_error(unsigned long address, unsigned char active_pils)
static void vic_reg_error(unsigned long address, unsigned char active_pils)
{
printk("\nNo VIC register found: reg=%08lx active_pils=%02x\n"
"Current interrupt mask from CP0_CAUSE: %02x\n",
address, 0xff & active_pils,
0xff & (read_32bit_cp0_register(CP0_CAUSE)>>8));
"Current interrupt mask from CP0_CAUSE: %02x\n",
address, 0xff & active_pils,
0xff & (read_c0_cause()>>8));
{ int i; for (i=0; i<10000; i++) udelay(1000); }
}
}
static char baget_fpu_irq = BAGET_FPU_IRQ;
#define BAGET_INT_FPU {(unsigned long)&baget_fpu_irq, 1}
......@@ -230,27 +229,27 @@ static char baget_fpu_irq = BAGET_FPU_IRQ;
*/
asmlinkage void baget_interrupt(struct pt_regs *regs)
{
static struct baget_int_reg int_reg[BAGET_PIL_NR] = {
static struct baget_int_reg int_reg[BAGET_PIL_NR] = {
BAGET_INT_NONE, BAGET_INT_NONE, BAGET_INT0_ACK, BAGET_INT1_ACK,
BAGET_INT_NONE, BAGET_INT_FPU, BAGET_INT_NONE, BAGET_INT5_ACK
BAGET_INT_NONE, BAGET_INT_FPU, BAGET_INT_NONE, BAGET_INT5_ACK
};
unsigned char active_pils;
while ((active_pils = read_32bit_cp0_register(CP0_CAUSE)>>8)) {
while ((active_pils = read_c0_cause()>>8)) {
int pil;
struct baget_int_reg* reg;
for (pil = 0; pil < BAGET_PIL_NR; pil++) {
if (!(active_pils & (1<<pil))) continue;
reg = &int_reg[pil];
if (reg->address) {
extern int try_read(unsigned long,int);
int irq = try_read(reg->address, reg->size);
if (irq != -1)
if (irq != -1)
do_IRQ(BAGET_IRQ_MASK(irq), regs);
else
else
vic_reg_error(reg->address, active_pils);
} else {
printk("baget_interrupt: unknown interrupt "
......@@ -291,9 +290,9 @@ int setup_baget_irq(int irq, struct irqaction * new)
if (new->flags & SA_SAMPLE_RANDOM)
rand_initialize_irq(irq);
save_and_cli(flags);
local_irq_save(flags);
*p = new;
restore_flags(flags);
local_irq_restore(flags);
if (!shared) {
unmask_irq_count(irq);
......@@ -302,9 +301,9 @@ int setup_baget_irq(int irq, struct irqaction * new)
return 0;
}
int request_irq(unsigned int irq,
int request_irq(unsigned int irq,
void (*handler)(int, void *, struct pt_regs *),
unsigned long irqflags,
unsigned long irqflags,
const char * devname,
void *dev_id)
{
......@@ -315,12 +314,12 @@ int request_irq(unsigned int irq,
return -EINVAL;
if (!handler)
return -EINVAL;
if (irq_to_pil_map[irq] < 0)
if (irq_to_pil_map[irq] < 0)
return -EINVAL;
action = (struct irqaction *)
kmalloc(sizeof(struct irqaction), GFP_KERNEL);
if (!action)
if (!action)
return -ENOMEM;
action->handler = handler;
......@@ -337,13 +336,13 @@ int request_irq(unsigned int irq,
return retval;
}
void free_irq(unsigned int irq, void *dev_id)
{
struct irqaction * action, **p;
unsigned long flags;
if (irq >= BAGET_IRQ_NR)
if (irq >= BAGET_IRQ_NR)
printk("Trying to free IRQ%d\n",irq);
for (p = irq + irq_action; (action = *p) != NULL; p = &action->next) {
......@@ -351,11 +350,11 @@ void free_irq(unsigned int irq, void *dev_id)
continue;
/* Found it - now free it */
save_and_cli(flags);
local_irq_save(flags);
*p = action->next;
if (!irq[irq_action])
unmask_irq_count(irq);
restore_flags(flags);
local_irq_restore(flags);
kfree(action);
return;
}
......@@ -380,7 +379,7 @@ static void write_err_interrupt(int irq, void *dev_id, struct pt_regs * regs)
*(volatile char*) BAGET_WRERR_ACK = 0;
}
static struct irqaction irq0 =
static struct irqaction irq0 =
{ write_err_interrupt, SA_INTERRUPT, 0, "bus write error", NULL, NULL};
void __init init_IRQ(void)
......@@ -393,6 +392,6 @@ void __init init_IRQ(void)
/* Enable interrupts for pils 2 and 3 (lines 0 and 1) */
modify_cp0_intmask(0, (1<<2)|(1<<3));
if (setup_baget_irq(0, &irq0) < 0)
if (setup_baget_irq(0, &irq0) < 0)
printk("init_IRQ: unable to register write_err irq\n");
}
OUTPUT_FORMAT("elf32-bigmips")
OUTPUT_FORMAT("elf32-tradbigmips")
OUTPUT_ARCH(mips)
ENTRY(balo_entry)
SECTIONS
......@@ -42,13 +42,13 @@ SECTIONS
/* Startup code */
. = ALIGN(4096);
__init_begin = .;
*(.text.init)
*(.data.init)
*(.text.init)
*(.data.init)
. = ALIGN(4096); /* Align double page for init_task_union */
__init_end = .;
*(.fini)
*(.reginfo)
*(.fini)
*(.reginfo)
/* Adjust the address for the data segment. We want to adjust up to
the same address within the page on the next page up. It would
be more correct to do this:
......@@ -68,18 +68,18 @@ SECTIONS
*(.data)
CONSTRUCTORS
*(.data1)
*(.data1)
_gp = . + 0x8000;
*(.lit8)
*(.lit4)
*(.ctors)
*(.dtors)
*(.got.plt) *(.got)
*(.dynamic)
*(.lit8)
*(.lit4)
*(.ctors)
*(.dtors)
*(.got.plt) *(.got)
*(.dynamic)
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
*(.sdata)
*(.sdata)
_edata = .;
PROVIDE (edata = .);
......@@ -96,21 +96,21 @@ SECTIONS
/* These are needed for ELF backends which have not yet been
converted to the new style linker. */
*(.stab)
*(.stabstr)
*(.stab)
*(.stabstr)
/* DWARF debug sections.
Symbols in the .debug DWARF section are relative to the beginning of the
section so we begin .debug at 0. It's not clear yet what needs to happen
for the others. */
*(.debug)
*(.debug_srcinfo)
*(.debug_aranges)
*(.debug_pubnames)
*(.debug_sfnames)
*(.line)
*(.debug)
*(.debug_srcinfo)
*(.debug_aranges)
*(.debug_pubnames)
*(.debug_sfnames)
*(.line)
/* These must appear regardless of . */
*(.gptab.data) *(.gptab.sdata)
*(.gptab.bss) *(.gptab.sbss)
*(.gptab.data) *(.gptab.sdata)
*(.gptab.bss) *(.gptab.sbss)
_vmlinux_start = .;
*(.vmlinux)
......
/* $Id: print.c,v 1.1 1999/01/17 03:49:38 ralf Exp $
*
/*
* print.c: Simple print fascility
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*
*/
#include <stdarg.h>
#include <linux/kernel.h>
......@@ -16,7 +14,7 @@
*/
// #define BAGET_PRINTK
/*
/*
* This function is same for BALO and Linux baget_printk,
* and normally prints characted to second (UART A) console.
*/
......@@ -27,7 +25,7 @@ static void outc_low(char c)
{
int i;
vac_outb(c, VAC_UART_B_TX);
for (i=0; i<10000; i++)
for (i=0; i<10000; i++)
delay();
}
......@@ -38,7 +36,7 @@ void outc(char c)
outc_low(c);
}
void outs(char *s)
void outs(char *s)
{
while(*s) outc(*s++);
}
......@@ -79,7 +77,7 @@ static __inline__ void puthex( int a )
void __init balo_printf( char *f, ... )
{
int *arg = (int*)&f + 1;
char c;
char c;
int format = 0;
while((c = *f++) != 0) {
......@@ -112,7 +110,7 @@ void __init balo_printf( char *f, ... )
}
void __init balo_hungup(void)
{
{
outs("Hunging up.\n");
while(1);
while(1);
}
/*
* init.c: PROM library initialisation code.
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*/
#include <linux/init.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
char arcs_cmdline[COMMAND_LINE_SIZE];
char arcs_cmdline[CL_SIZE];
const char *get_system_type(void)
{
/* Should probably return one of "BT23-201", "BT23-202" */
return "Baget";
}
void __init prom_init(unsigned int mem_upper)
{
......
/* $Id: setup.c,v 1.4 1999/10/09 00:00:57 ralf Exp $
*
/*
* setup.c: Baget/MIPS specific setup, including init of the feature struct.
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*
*/
#include <linux/init.h>
#include <linux/kernel.h>
......@@ -17,9 +15,9 @@
long int vac_memory_upper;
#define CACHEABLE_STR(val) ((val) ? "not cached" : "cached")
static void __init vac_show(void)
{
{
int i;
unsigned short val, decode = vac_inw(VAC_DECODE_CTRL);
unsigned short a24_base = vac_inw(VAC_A24_BASE);
......@@ -38,7 +36,7 @@ static void __init vac_show(void)
VAC_IOSEL3_CTRL,
VAC_IOSEL4_CTRL,
VAC_IOSEL5_CTRL };
printk("[DSACKi %s, DRAMCS%s qualified, boundary%s qualified%s]\n",
(decode & VAC_DECODE_DSACKI) ? "on" : "off",
(decode & VAC_DECODE_QFY_DRAMCS) ? "" : " not",
......@@ -72,24 +70,24 @@ static void __init vac_show(void)
VAC_ICFSEL_MODULE_VAL(vac_inw(VAC_ICFSEL_BASE)))<<4,
(decode & VAC_DECODE_QFY_ICFSEL) ? "qualified" : "");
printk("region0 at 00000000 (%dMB)\t[dram, %s, delay %d cpuclk"
", cached]\n",
(vac_inw(VAC_DRAM_MASK)+1)>>4,
(decode & VAC_DECODE_DSACK) ? "D32" : "3state",
VAC_DECODE_CPUCLK_VAL(decode));
for (i = 0; i < sizeof(regs)/sizeof(regs[0]); i++) {
unsigned long from =
unsigned long from =
((unsigned long)vac_inw(bndr[i]))<<16;
unsigned long to =
unsigned long to =
((unsigned long)
((i+1 == sizeof(bndr)/sizeof(bndr[0])) ?
((i+1 == sizeof(bndr)/sizeof(bndr[0])) ?
0xff00 : vac_inw(bndr[i+1])))<<16;
val = vac_inw(regs[i]);
printk("region%d at %08lx (%dMB)\t[%s %s/%s, %s]\n",
printk("region%d at %08lx (%dMB)\t[%s %s/%s, %s]\n",
i+1,
from,
(unsigned int)((to - from) >> 20),
......@@ -97,13 +95,13 @@ static void __init vac_show(void)
asiz[VAC_REG_ASIZ_VAL(val)],
((val & VAC_REG_WORD) ? "D16" : "D32"),
CACHEABLE_STR(val&VAC_A24_A24_CACHINH));
if (a24_addr >= from && a24_addr < to)
printk("\ta24 at %08lx (%dMB)\t[vme, A24/%s, %s]\n",
a24_addr,
min((unsigned int)(a24_addr - from)>>20, 32U),
(a24_base & VAC_A24_DATAPATH) ? "user" :
((a24_base & VAC_A24_D32_ENABLE) ?
((a24_base & VAC_A24_D32_ENABLE) ?
"D32" : "D16"),
CACHEABLE_STR(a24_base & VAC_A24_A24_CACHINH));
}
......@@ -123,7 +121,7 @@ static void __init vac_show(void)
(VAC_CTRL_DELAY_IOWR_VAL(val)&1) ? ".5" : "",
VAC_CTRL_DELAY_IOSELI_VAL(val)/2,
(VAC_CTRL_DELAY_IOSELI_VAL(val)&1) ? ".5" : "");
printk("region5 at fff00000 (896KB)\t[local io, %s]\n",
CACHEABLE_STR(vac_inw(VAC_A24_BASE) & VAC_A24_IO_CACHINH));
......@@ -132,7 +130,7 @@ static void __init vac_show(void)
printk("\tio%d[ack %d cpuclk%s, %s%srecovery %d cpuclk, "
"\n\t read %d%s cpuclk, write %d%s cpuclk, "
"assert %d%s%s cpuclk]\n",
i,
i,
VAC_CTRL_DELAY_DSACKI_VAL(val),
state[val & (VAC_CTRL_IORD|VAC_CTRL_IOWR)],
(val & VAC_CTRL_DSACK0) ? "dsack0*, " : "",
......@@ -144,15 +142,15 @@ static void __init vac_show(void)
(VAC_CTRL_DELAY_IOWR_VAL(val)&1) ? ".5" : "",
VAC_CTRL_DELAY_IOSELI_VAL(val)/2,
(VAC_CTRL_DELAY_IOSELI_VAL(val)&1) ? ".5" : "",
(vac_inw(VAC_DEV_LOC) & VAC_DEV_LOC_IOSEL(i)) ?
(vac_inw(VAC_DEV_LOC) & VAC_DEV_LOC_IOSEL(i)) ?
", id" : "");
}
printk("region6 at fffe0000 (128KB)\t[vme, A16/%s, "
"not cached]\n",
(a24_base & VAC_A24_A16D32_ENABLE) ?
(a24_base & VAC_A24_A16D32_ENABLE) ?
((a24_base & VAC_A24_A16D32) ? "D32" : "D16") : "user");
val = vac_inw(VAC_SHRCS_CTRL);
printk("shared[ack %d cpuclk%s, %s%srecovery %d cpuclk, "
"read %d%s, write %d%s, assert %d%s]\n",
......@@ -183,8 +181,8 @@ static void __init vac_init(void)
default:
panic("Unknown VAC revision number");
}
vac_outw(mem_limit-1, VAC_DRAM_MASK);
vac_outw(mem_limit-1, VAC_DRAM_MASK);
vac_outw(mem_limit, VAC_BNDR2);
vac_outw(mem_limit, VAC_BNDR3);
vac_outw(((BAGET_A24M_BASE>>16)&~VAC_A24_D32_ENABLE)|VAC_A24_DATAPATH,
......@@ -294,19 +292,19 @@ static void __init vac_start(void)
vac_outw(VAC_INT_CTRL_TIMER_PIO10|
VAC_INT_CTRL_UART_B_PIO7|
VAC_INT_CTRL_UART_A_PIO7,VAC_INT_CTRL);
/*
/*
* Set quadro speed for both UARTs.
* To do it we need use formulae from VIC/VAC manual,
* keeping in mind Baget's 50MHz frequency...
*/
vac_outw((500000/(384*16))<<8,VAC_CPU_CLK_DIV);
vac_outw((500000/(384*16))<<8,VAC_CPU_CLK_DIV);
}
static void __init vic_show(void)
{
unsigned char val;
char *timeout[] = { "4", "16", "32", "64", "128", "256", "disabled" };
char *deadlock[] = { "[dedlk only]", "[dedlk only]",
char *deadlock[] = { "[dedlk only]", "[dedlk only]",
"[dedlk], [halt w/ rmc], [lberr]",
"[dedlk], [halt w/o rmc], [lberr]" };
......@@ -319,7 +317,7 @@ static void __init vic_show(void)
printk("metastability delay ");
printk("%s ",
deadlock[VIC_IFACE_CFG_DEADLOCK_VAL(val)]);
printk("interrupts: ");
val = vic_inb(VIC_ERR_INT);
......@@ -332,7 +330,7 @@ static void __init vic_show(void)
if (!(val & VIC_ERR_INT_ACFAIL))
printk("[acfail] ");
printk("\n");
printk("timeouts: ");
val = vic_inb(VIC_XFER_TIMO);
printk("local %s, vme %s ",
......@@ -358,7 +356,7 @@ static void __init vic_show(void)
printk("[local boundary cross]");
if (val & VIC_BXFER_DEF_VME_CROSS)
printk("[vme boundary cross]");
}
static void __init vic_init(void)
......@@ -373,7 +371,7 @@ static void __init vic_init(void)
vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT2);
vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT3);
vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT4);
/*
/*
vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_VME_INT5);
*/
vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_VME_INT6);
......@@ -388,7 +386,7 @@ static void __init vic_init(void)
VIC_INT_HIGH|VIC_INT_DISABLE, VIC_LINT3);
vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_EDGE|
VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT4);
/*
/*
vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_LEVEL|
VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT5);
*/
......@@ -447,7 +445,7 @@ static void __init vic_init(void)
VIC_RELEASE_RWD, VIC_RELEASE);
vic_outb(VIC_IC6_RUN, VIC_IC6);
vic_outb(0, VIC_IC7);
vic_show();
}
......@@ -471,7 +469,7 @@ void __init baget_irq_setup(void)
extern void baget_machine_restart(char *command);
extern void baget_machine_halt(void);
extern void baget_machine_power_off(void);
void __init baget_setup(void)
{
printk("BT23/63-201n found.\n");
......
......@@ -20,23 +20,23 @@
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/system.h>
#include <asm/baget/baget.h>
/*
/*
* To have precision clock, we need to fix available clock frequency
*/
#define FREQ_NOM 79125 /* Baget frequency ratio */
#define FREQ_DEN 10000
static inline int timer_intr_valid(void)
static inline int timer_intr_valid(void)
{
static unsigned long long ticks, valid_ticks;
if (ticks++ * FREQ_DEN >= valid_ticks * FREQ_NOM) {
/*
* We need no overflow checks,
/*
* We need no overflow checks,
* due baget unable to work 3000 years...
* At least without reboot...
*/
......@@ -62,10 +62,10 @@ static void __init timer_enable(void)
vic_outb(ss0cr0, VIC_SS0CR0);
vic_outb(VIC_INT_IPL(6)|VIC_INT_NOAUTO|VIC_INT_EDGE|
VIC_INT_LOW|VIC_INT_ENABLE, VIC_LINT2);
VIC_INT_LOW|VIC_INT_ENABLE, VIC_LINT2);
}
static struct irqaction timer_irq =
static struct irqaction timer_irq =
{ timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL};
void __init time_init(void)
......@@ -82,17 +82,19 @@ void do_gettimeofday(struct timeval *tv)
do {
seq = read_seqbegin(&xtime_lock);
*tv = xtime;
tv->tv_sec = xtime.tv_sec;
tv->tv_usec = xtime.tv_nsec / 1000;
} while (read_seqretry(&xtime_lock, seq));
}
void do_settimeofday(struct timeval *tv)
{
write_seqlock_irq (&xtime_lock);
xtime = *tv;
write_seqlock_irq(&xtime_lock);
xtime.tv_usec = tv->tv_sec;
xtime.tv_nsec = tv->tv_usec;
time_adjust = 0; /* stop active adjtime() */
time_status |= STA_UNSYNC;
time_maxerror = NTP_PHASE_LIMIT;
time_esterror = NTP_PHASE_LIMIT;
write_sequnlock_irq (&xtime_lock);
write_sequnlock_irq(&xtime_lock);
}
This diff is collapsed.
/*
* Setup the right wbflush routine for Baget/MIPS.
*
* Copyright (C) 1999 Gleb Raiko & Vladimir Roganov
*/
#include <linux/init.h>
#include <asm/bootinfo.h>
void (*__wbflush) (void);
static void wbflush_baget(void);
void __init wbflush_setup(void)
{
__wbflush = wbflush_baget;
}
/*
* Baget/MIPS doesn't need to write back the WB.
*/
static void wbflush_baget(void)
{
}
/* $Id$
/*
* baget.h: Definitions specific to Baget/MIPS machines.
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
......@@ -9,13 +9,13 @@
#include "vic.h"
#include "vac.h"
#define VIC_BASE 0xBFFC0000
#define VIC_BASE 0xBFFC0000
#define VAC_BASE 0xBFFD0000
/* Baget interrupt registers and their sizes */
struct baget_int_reg {
struct baget_int_reg {
unsigned long address;
int size; /* in bytes */
};
......@@ -43,8 +43,8 @@ struct baget_int_reg {
#define BAGET_IRQ_MASK(x) ((NR_IRQS-1) & (x))
#define BAGET_FPU_IRQ 0x26
#define BAGET_VIC_TIMER_IRQ 0x32
#define BAGET_VAC_TIMER_IRQ 0x36
#define BAGET_VIC_TIMER_IRQ 0x32
#define BAGET_VAC_TIMER_IRQ 0x36
#define BAGET_BSM_IRQ 0x3C
#define BAGET_LANCE_MEM_BASE 0xfcf10000
......
/* $Id$
*
/*
* vac.h: Various VIC controller defines. The VIC is a VME controller
* used in Baget/MIPS series.
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*/
#ifndef _MIPS_VAC_H
#define _MIPS_VAC_H
#ifndef _ASM_VAC_H
#define _ASM_VAC_H
#define VAC_SLSEL1_MASK 0x000
#define VAC_SLSEL1_BASE 0x100
......@@ -22,8 +21,8 @@
#define VAC_A24_MASK (0x3f<<9)
#define VAC_A24_D32_ENABLE (1<<8)
#define VAC_A24_A24_CACHINH (1<<7)
#define VAC_A24_A16D32_ENABLE (1<<6)
#define VAC_A24_A16D32 (1<<5)
#define VAC_A24_A16D32_ENABLE (1<<6)
#define VAC_A24_A16D32 (1<<5)
#define VAC_A24_DATAPATH (1<<4)
#define VAC_A24_IO_CACHINH (1<<3)
#define VAC_REG1 0x900
......@@ -197,13 +196,13 @@
#define VAC_ID 0x2900
#ifndef __LANGUAGE_ASSEMBLY__
#ifndef __ASSEMBLY__
#define vac_inb(p) (*(volatile unsigned char *)(VAC_BASE + (p)))
#define vac_outb(v,p) (*((volatile unsigned char *)(VAC_BASE + (p))) = v)
#define vac_inw(p) (*(volatile unsigned short*)(VAC_BASE + (p)))
#define vac_outw(v,p) (*((volatile unsigned short*)(VAC_BASE + (p))) = v)
#endif /* __LANGUAGE_ASSEMBLY__ */
#endif /* !__ASSEMBLY__ */
#endif /* !(_MIPS_VAC_H) */
#endif /* _ASM_VAC_H */
/* $Id$
*
/*
* vic.h: Various VIC controller defines. The VIC is an interrupt controller
* used in Baget/MIPS series.
*
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
*/
#ifndef _MIPS_VIC_H
#define _MIPS_VIC_H
#ifndef _ASM_BAGET_VIC_H
#define _ASM_BAGET_VIC_H
#define VIC_VME_II 0x3
#define VIC_VME_INT1 0x7
......@@ -168,10 +167,10 @@
#define VIC_SSxCR1_TF1(x) ((x)&0xf)
#define VIC_RELEASE 0xD3
#define VIC_RELEASE_BLKXFER_BLEN(x) ((x)&0x1f)
#define VIC_RELEASE_ROR (0<<6)
#define VIC_RELEASE_RWD (1<<6)
#define VIC_RELEASE_ROC (2<<6)
#define VIC_RELEASE_BCAP (3<<6)
#define VIC_RELEASE_ROR (0<<6)
#define VIC_RELEASE_RWD (1<<6)
#define VIC_RELEASE_ROC (2<<6)
#define VIC_RELEASE_BCAP (3<<6)
#define VIC_BXFER_CTRL 0xD7
#define VIC_BXFER_CTRL_MODULE (1<<7)
#define VIC_BXFER_CTRL_LOCAL (1<<6)
......@@ -183,11 +182,11 @@
#define VIC_BXFER_LEN_HI 0xDF
#define VIC_SYS_RESET 0xE3
#ifndef __LANGUAGE_ASSEMBLY__
#ifndef __ASSEMBLY__
#define vic_inb(p) (*(volatile unsigned char *)(VIC_BASE + (p)))
#define vic_outb(v,p) (*((volatile unsigned char *)(VIC_BASE + (p))) = v)
#endif /* __LANGUAGE_ASSEMBLY__ */
#endif /* !__ASSEMBLY__ */
#endif /* !(_MIPS_VIC_H) */
#endif /* _ASM_BAGET_VIC_H */
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